Franck Jullien 9ac710c31d openrisc: update SPR registers definition ... The OpenRISC architecture specification v1.0 defines new SPR registers. This patch adds registers definition for group 0 and update bit definitions for the CPU configuration register. Signed-off-by: Franck Jullien <franck.jullien@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>		2014-05-22 08:07:21 +02:00
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asm	openrisc: update SPR registers definition	2014-05-22 08:07:21 +02:00