202 lines
4.6 KiB
C
202 lines
4.6 KiB
C
/*
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* Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de>
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*
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* Based on the Linux Tegra clock code
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <common.h>
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#include <io.h>
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#include <malloc.h>
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#include <asm-generic/div64.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include "clk.h"
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#define pll_out_override(p) (BIT((p->shift - 6)))
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#define div_mask(d) ((1 << (d->width)) - 1)
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#define get_mul(d) (1 << d->frac_width)
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#define get_max_div(d) div_mask(d)
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#define PERIPH_CLK_UART_DIV_ENB BIT(24)
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#define to_clk_frac_div(_hw) container_of(_hw, struct tegra_clk_frac_div, hw)
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static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate,
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unsigned long parent_rate)
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{
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u64 divider_ux1 = parent_rate;
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u8 flags = divider->flags;
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int mul;
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if (!rate)
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return 0;
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mul = get_mul(divider);
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if (!(flags & TEGRA_DIVIDER_INT))
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divider_ux1 *= mul;
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if (flags & TEGRA_DIVIDER_ROUND_UP)
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divider_ux1 += rate - 1;
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do_div(divider_ux1, rate);
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if (flags & TEGRA_DIVIDER_INT)
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divider_ux1 *= mul;
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divider_ux1 -= mul;
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if (divider_ux1 < 0)
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return 0;
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if (divider_ux1 > get_max_div(divider))
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return -EINVAL;
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return divider_ux1;
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}
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static unsigned long clk_frac_div_recalc_rate(struct clk *hw,
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unsigned long parent_rate)
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{
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struct tegra_clk_frac_div *divider = to_clk_frac_div(hw);
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u32 reg;
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int div, mul;
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u64 rate = parent_rate;
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reg = readl(divider->reg) >> divider->shift;
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div = reg & div_mask(divider);
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mul = get_mul(divider);
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div += mul;
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rate *= mul;
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rate += div - 1;
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do_div(rate, div);
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return rate;
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}
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static long clk_frac_div_round_rate(struct clk *hw, unsigned long rate,
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unsigned long *prate)
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{
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struct tegra_clk_frac_div *divider = to_clk_frac_div(hw);
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int div, mul;
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unsigned long output_rate = *prate;
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if (!rate)
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return output_rate;
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div = get_div(divider, rate, output_rate);
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if (div < 0)
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return *prate;
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mul = get_mul(divider);
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return DIV_ROUND_UP(output_rate * mul, div + mul);
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}
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static int clk_frac_div_set_rate(struct clk *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct tegra_clk_frac_div *divider = to_clk_frac_div(hw);
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int div;
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u32 val;
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div = get_div(divider, rate, parent_rate);
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if (div < 0)
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return div;
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val = readl(divider->reg);
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val &= ~(div_mask(divider) << divider->shift);
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val |= div << divider->shift;
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if (divider->flags & TEGRA_DIVIDER_UART) {
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if (div)
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val |= PERIPH_CLK_UART_DIV_ENB;
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else
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val &= ~PERIPH_CLK_UART_DIV_ENB;
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}
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if (divider->flags & TEGRA_DIVIDER_FIXED)
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val |= pll_out_override(divider);
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writel(val, divider->reg);
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return 0;
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}
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const struct clk_ops tegra_clk_frac_div_ops = {
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.recalc_rate = clk_frac_div_recalc_rate,
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.set_rate = clk_frac_div_set_rate,
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.round_rate = clk_frac_div_round_rate,
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};
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struct clk *tegra_clk_divider_alloc(const char *name, const char *parent_name,
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void __iomem *reg, unsigned long flags, u8 clk_divider_flags,
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u8 shift, u8 width, u8 frac_width)
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{
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struct tegra_clk_frac_div *divider;
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divider = kzalloc(sizeof(*divider), GFP_KERNEL);
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if (!divider) {
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pr_err("%s: could not allocate fractional divider clk\n",
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__func__);
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return NULL;
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}
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divider->parent = parent_name;
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divider->hw.name = name;
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divider->hw.ops = &tegra_clk_frac_div_ops;
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divider->hw.flags = flags;
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divider->hw.parent_names = divider->parent ? ÷r->parent : NULL;
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divider->hw.num_parents = divider->parent ? 1 : 0;
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divider->reg = reg;
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divider->shift = shift;
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divider->width = width;
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divider->frac_width = frac_width;
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divider->flags = clk_divider_flags;
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return ÷r->hw;
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}
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void tegra_clk_divider_free(struct clk *clk_div)
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{
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struct tegra_clk_frac_div *divider = to_clk_frac_div(clk_div);
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kfree(divider);
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}
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struct clk *tegra_clk_register_divider(const char *name,
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const char *parent_name, void __iomem *reg, unsigned long flags,
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u8 clk_divider_flags, u8 shift, u8 width, u8 frac_width)
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{
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struct tegra_clk_frac_div *divider;
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int ret;
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divider = to_clk_frac_div(tegra_clk_divider_alloc(name, parent_name,
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reg, flags, clk_divider_flags, shift, width,
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frac_width));
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ret = clk_register(÷r->hw);
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if (ret) {
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kfree(divider);
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return ERR_PTR(ret);
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}
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return ÷r->hw;
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}
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