185 lines
3.9 KiB
C
185 lines
3.9 KiB
C
#include <common.h>
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#include <abort.h>
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#include <asm/mipsregs.h>
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#include <asm/ptrace.h>
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static int mips_ignore_data_abort;
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static int mips_data_abort_occurred;
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void data_abort_mask(void)
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{
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mips_data_abort_occurred = 0;
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mips_ignore_data_abort = 1;
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}
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int data_abort_unmask(void)
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{
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mips_ignore_data_abort = 0;
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return mips_data_abort_occurred != 0;
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}
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void barebox_exc_handler(struct pt_regs *regs);
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/*
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* Trap codes from OpenBSD trap.h
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*/
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#define T_INT 0 /* Interrupt pending */
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#define T_TLB_MOD 1 /* TLB modified fault */
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#define T_TLB_LD_MISS 2 /* TLB miss on load or ifetch */
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#define T_TLB_ST_MISS 3 /* TLB miss on a store */
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#define T_ADDR_ERR_LD 4 /* Address error on a load or ifetch */
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#define T_ADDR_ERR_ST 5 /* Address error on a store */
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#define T_BUS_ERR_IFETCH 6 /* Bus error on an ifetch */
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#define T_BUS_ERR_LD_ST 7 /* Bus error on a load or store */
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#define T_SYSCALL 8 /* System call */
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#define T_BREAK 9 /* Breakpoint */
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#define T_RES_INST 10 /* Reserved instruction exception */
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#define T_COP_UNUSABLE 11 /* Coprocessor unusable */
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#define T_OVFLOW 12 /* Arithmetic overflow */
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#define T_TRAP 13 /* Trap instruction */
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#define T_VCEI 14 /* Virtual coherency instruction */
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#define T_FPE 15 /* Floating point exception */
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#define T_IWATCH 16 /* Inst. Watch address reference */
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#define T_DWATCH 23 /* Data Watch address reference */
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#define T_VCED 31 /* Virtual coherency data */
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#define CR_EXC_CODE 0x0000007c
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#define CR_EXC_CODE_SHIFT 2
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static inline u32 get_exc_code(u32 cause)
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{
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return (cause & CR_EXC_CODE) >> CR_EXC_CODE_SHIFT;
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}
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static char *get_exc_name(u32 cause)
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{
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switch (get_exc_code(cause)) {
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case T_INT:
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return "interrupt pending";
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case T_TLB_MOD:
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return "TLB modified";
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case T_TLB_LD_MISS:
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return "TLB miss on load or ifetch";
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case T_TLB_ST_MISS:
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return "TLB miss on store";
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case T_ADDR_ERR_LD:
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return "address error on load or ifetch";
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case T_ADDR_ERR_ST:
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return "address error on store";
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case T_BUS_ERR_IFETCH:
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return "bus error on ifetch";
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case T_BUS_ERR_LD_ST:
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return "bus error on load or store";
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case T_SYSCALL:
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return "system call";
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case T_BREAK:
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return "breakpoint";
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case T_RES_INST:
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return "reserved instruction";
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case T_COP_UNUSABLE:
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return "coprocessor unusable";
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case T_OVFLOW:
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return "arithmetic overflow";
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case T_TRAP:
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return "trap instruction";
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case T_VCEI:
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return "virtual coherency instruction";
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case T_FPE:
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return "floating point";
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case T_IWATCH:
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return "iwatch";
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case T_DWATCH:
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return "dwatch";
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case T_VCED:
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return "virtual coherency data";
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}
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return "unknown exception";
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}
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static void show_regs(const struct pt_regs *regs)
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{
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int i;
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const int field = 2 * sizeof(unsigned long);
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/*
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* Saved main processor registers
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*/
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for (i = 0; i < 32; ) {
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if ((i % 4) == 0)
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printf("$%2d :", i);
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if (i == 0)
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printf(" %0*lx", field, 0UL);
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else if (i == 26 || i == 27)
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printf(" %*s", field, "");
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else
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printf(" %0*lx", field, regs->regs[i]);
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i++;
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if ((i % 4) == 0)
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printf("\n");
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}
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printf("Hi : %0*lx\n", field, regs->hi);
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printf("Lo : %0*lx\n", field, regs->lo);
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/*
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* Saved cp0 registers
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*/
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printf("epc : %0*lx\n", field, regs->cp0_epc);
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printf("ra : %0*lx\n", field, regs->regs[31]);
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printf("Status: %08x\n", (uint32_t)regs->cp0_status);
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printf("Cause : %08x\n", (uint32_t)regs->cp0_cause);
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printf("Config: %08x\n\n", read_c0_config());
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}
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void barebox_exc_handler(struct pt_regs *regs)
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{
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unsigned int cause = regs->cp0_cause;
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if (get_exc_code(cause) == T_ADDR_ERR_LD && mips_ignore_data_abort) {
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mips_data_abort_occurred = 1;
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regs->cp0_epc += 4;
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/*
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* Don't let your children do this ...
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*/
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__asm__ __volatile__(
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"move\t$29, %0\n\t"
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"j\tret_from_exception"
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:/* no outputs */
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:"r" (®s));
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/* Unreached */
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} else {
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printf("\nOoops, %s!\n\n", get_exc_name(cause));
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show_regs(regs);
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}
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hang();
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}
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