This is based on the following U-Boot commit: commit 5f4b4f2fed3ab8590c8c06b78642f8c1467acacf Author: Vincent Palatin <vpalatin@chromium.org> Date: Mon Dec 5 14:52:22 2011 -0800 ehci: speed up initialization According to EHCI specification v1.0, the controller should stabilize the power on a port at most 20 ms after the port power bit transition. So, we put this setting in the virtual descriptor corresponding field, (bPwrOn2PwrGood = 10 => 10 x 2ms = 20ms), this saves about 500ms at each controller initialization/enumeration. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
921 lines
23 KiB
C
921 lines
23 KiB
C
/*-
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* Copyright (c) 2007-2008, Juniper Networks, Inc.
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* Copyright (c) 2008, Excito Elektronik i Skåne AB
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* Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*#define DEBUG */
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#include <common.h>
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#include <asm/byteorder.h>
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#include <usb/usb.h>
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#include <io.h>
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#include <malloc.h>
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#include <driver.h>
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#include <init.h>
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#include <xfuncs.h>
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#include <clock.h>
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#include <errno.h>
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#include <usb/ehci.h>
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#include <asm/mmu.h>
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#include "ehci.h"
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struct ehci_priv {
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int rootdev;
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struct ehci_hccr *hccr;
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struct ehci_hcor *hcor;
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struct usb_host host;
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struct QH *qh_list;
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struct qTD *td;
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int portreset;
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unsigned long flags;
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};
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#define to_ehci(ptr) container_of(ptr, struct ehci_priv, host)
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#define NUM_QH 2
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#define NUM_TD 3
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static struct descriptor {
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struct usb_hub_descriptor hub;
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struct usb_device_descriptor device;
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struct usb_linux_config_descriptor config;
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struct usb_linux_interface_descriptor interface;
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struct usb_endpoint_descriptor endpoint;
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} __attribute__ ((packed)) descriptor = {
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{
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0x8, /* bDescLength */
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0x29, /* bDescriptorType: hub descriptor */
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2, /* bNrPorts -- runtime modified */
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0, /* wHubCharacteristics */
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10, /* bPwrOn2PwrGood */
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0, /* bHubCntrCurrent */
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{}, /* Device removable */
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{} /* at most 7 ports! XXX */
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},
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{
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0x12, /* bLength */
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1, /* bDescriptorType: UDESC_DEVICE */
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0x0002, /* bcdUSB: v2.0 */
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9, /* bDeviceClass: UDCLASS_HUB */
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0, /* bDeviceSubClass: UDSUBCLASS_HUB */
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1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
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64, /* bMaxPacketSize: 64 bytes */
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0x0000, /* idVendor */
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0x0000, /* idProduct */
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0x0001, /* bcdDevice */
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1, /* iManufacturer */
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2, /* iProduct */
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0, /* iSerialNumber */
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1 /* bNumConfigurations: 1 */
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},
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{
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0x9,
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2, /* bDescriptorType: UDESC_CONFIG */
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cpu_to_le16(0x19),
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1, /* bNumInterface */
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1, /* bConfigurationValue */
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0, /* iConfiguration */
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0x40, /* bmAttributes: UC_SELF_POWER */
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0 /* bMaxPower */
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},
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{
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0x9, /* bLength */
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4, /* bDescriptorType: UDESC_INTERFACE */
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0, /* bInterfaceNumber */
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0, /* bAlternateSetting */
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1, /* bNumEndpoints */
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9, /* bInterfaceClass: UICLASS_HUB */
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0, /* bInterfaceSubClass: UISUBCLASS_HUB */
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0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
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0 /* iInterface */
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},
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{
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0x7, /* bLength */
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5, /* bDescriptorType: UDESC_ENDPOINT */
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0x81, /* bEndpointAddress:
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* UE_DIR_IN | EHCI_INTR_ENDPT
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*/
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3, /* bmAttributes: UE_INTERRUPT */
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8, 0, /* wMaxPacketSize */
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255 /* bInterval */
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},
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};
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#define ehci_is_TDI() (ehci->flags & EHCI_HAS_TT)
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#ifdef CONFIG_MMU
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/*
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* Routines to handle (flush/invalidate) the dcache for the QH and qTD
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* structures and data buffers. This is needed on platforms using this
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* EHCI support with dcache enabled.
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*/
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static void flush_invalidate(void *addr, int size, int flush)
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{
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if (flush) {
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dma_flush_range((unsigned long)addr, (unsigned long)(addr + size));
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} else {
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dma_inv_range((unsigned long)addr, (unsigned long)(addr + size));
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}
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}
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static void cache_qtd(struct qTD *qtd, int flush)
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{
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u32 *ptr = (u32 *)qtd->qt_buffer[0];
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int len = (qtd->qt_token & 0x7fff0000) >> 16;
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if (ptr && len)
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flush_invalidate(ptr, len, flush);
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}
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static void cache_qh(struct ehci_priv *ehci, int flush)
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{
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int i;
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flush_invalidate(ehci->qh_list, sizeof(struct QH) * NUM_QH, flush);
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flush_invalidate(ehci->td, sizeof(struct qTD) * NUM_TD, flush);
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for (i = 0; i < NUM_TD; i ++)
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cache_qtd(&ehci->td[i], flush);
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}
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static inline void ehci_flush_dcache(struct ehci_priv *ehci)
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{
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cache_qh(ehci, 1);
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}
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static inline void ehci_invalidate_dcache(struct ehci_priv *ehci)
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{
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cache_qh(ehci, 0);
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}
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#else /* CONFIG_MMU */
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/*
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*
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*/
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static inline void ehci_flush_dcache(struct ehci_priv *ehci)
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{
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}
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static inline void ehci_invalidate_dcache(struct ehci_priv *ehci)
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{
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}
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#endif /* CONFIG_MMU */
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static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
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{
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uint32_t result;
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uint64_t start;
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start = get_time_ns();
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while (1) {
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result = ehci_readl(ptr);
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if (result == ~(uint32_t)0)
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return -1;
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result &= mask;
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if (result == done)
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return 0;
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if (is_timeout(start, usec * USECOND))
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return -ETIMEDOUT;
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}
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}
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static int ehci_reset(struct ehci_priv *ehci)
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{
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uint32_t cmd;
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uint32_t tmp;
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uint32_t *reg_ptr;
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int ret = 0;
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cmd = ehci_readl(&ehci->hcor->or_usbcmd);
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cmd |= CMD_RESET;
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ehci_writel(&ehci->hcor->or_usbcmd, cmd);
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ret = handshake(&ehci->hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
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if (ret < 0) {
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printf("EHCI fail to reset\n");
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goto out;
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}
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if (ehci_is_TDI()) {
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reg_ptr = (uint32_t *)((u8 *)ehci->hcor + USBMODE);
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tmp = ehci_readl(reg_ptr);
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tmp |= USBMODE_CM_HC;
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#if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
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tmp |= USBMODE_BE;
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#endif
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ehci_writel(reg_ptr, tmp);
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}
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out:
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return ret;
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}
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static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
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{
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uint32_t addr, delta, next;
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int idx;
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addr = (uint32_t) buf;
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idx = 0;
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while (idx < 5) {
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td->qt_buffer[idx] = cpu_to_hc32(addr);
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next = (addr + 4096) & ~4095;
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delta = next - addr;
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if (delta >= sz)
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break;
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sz -= delta;
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addr = next;
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idx++;
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}
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if (idx == 5) {
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debug("out of buffer pointers (%u bytes left)\n", sz);
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return -1;
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}
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return 0;
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}
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static int
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ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
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int length, struct devrequest *req)
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{
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struct usb_host *host = dev->host;
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struct ehci_priv *ehci = to_ehci(host);
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struct QH *qh;
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struct qTD *td;
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volatile struct qTD *vtd;
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uint32_t *tdp;
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uint32_t endpt, token, usbsts;
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uint32_t c, toggle;
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uint32_t cmd;
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int ret = 0;
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uint64_t start, timeout_val;
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debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
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buffer, length, req);
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if (req != NULL)
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debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
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req->request, req->request,
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req->requesttype, req->requesttype,
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le16_to_cpu(req->value), le16_to_cpu(req->value),
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le16_to_cpu(req->index));
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memset(&ehci->qh_list[1], 0, sizeof(struct QH));
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memset(ehci->td, 0, sizeof(struct qTD) * NUM_TD);
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qh = &ehci->qh_list[1];
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qh->qh_link = cpu_to_hc32((uint32_t)ehci->qh_list | QH_LINK_TYPE_QH);
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c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
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usb_pipeendpoint(pipe) == 0) ? 1 : 0;
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endpt = (8 << 28) |
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(c << 27) |
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(usb_maxpacket(dev, pipe) << 16) |
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(0 << 15) |
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(1 << 14) |
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(usb_pipespeed(pipe) << 12) |
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(usb_pipeendpoint(pipe) << 8) |
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(0 << 7) | (usb_pipedevice(pipe) << 0);
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qh->qh_endpt1 = cpu_to_hc32(endpt);
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endpt = (1 << 30) |
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(dev->portnr << 23) |
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(dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
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qh->qh_endpt2 = cpu_to_hc32(endpt);
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qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
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qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
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td = NULL;
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tdp = &qh->qh_overlay.qt_next;
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toggle =
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usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
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if (req != NULL) {
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td = &ehci->td[0];
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td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
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td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
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token = (0 << 31) |
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(sizeof(*req) << 16) |
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(0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
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td->qt_token = cpu_to_hc32(token);
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if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
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debug("unable construct SETUP td\n");
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goto fail;
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}
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*tdp = cpu_to_hc32((uint32_t) td);
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tdp = &td->qt_next;
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toggle = 1;
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}
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if (length > 0 || req == NULL) {
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td = &ehci->td[1];
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td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
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td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
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token = (toggle << 31) |
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(length << 16) |
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((req == NULL ? 1 : 0) << 15) |
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(0 << 12) |
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(3 << 10) |
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((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
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td->qt_token = cpu_to_hc32(token);
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if (ehci_td_buffer(td, buffer, length) != 0) {
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printf("unable construct DATA td\n");
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goto fail;
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}
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*tdp = cpu_to_hc32((uint32_t) td);
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tdp = &td->qt_next;
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}
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if (req) {
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td = &ehci->td[2];
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td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
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td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
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token = (toggle << 31) |
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(0 << 16) |
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(1 << 15) |
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(0 << 12) |
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(3 << 10) |
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((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
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td->qt_token = cpu_to_hc32(token);
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*tdp = cpu_to_hc32((uint32_t)td);
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tdp = &td->qt_next;
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}
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ehci->qh_list->qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
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/* Flush dcache */
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ehci_flush_dcache(ehci);
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usbsts = ehci_readl(&ehci->hcor->or_usbsts);
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ehci_writel(&ehci->hcor->or_usbsts, (usbsts & 0x3f));
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/* Enable async. schedule. */
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cmd = ehci_readl(&ehci->hcor->or_usbcmd);
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cmd |= CMD_ASE;
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ehci_writel(&ehci->hcor->or_usbcmd, cmd);
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ret = handshake(&ehci->hcor->or_usbsts, STD_ASS, STD_ASS, 100 * 1000);
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if (ret < 0) {
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printf("EHCI fail timeout STD_ASS set\n");
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goto fail;
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}
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|
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/* Wait for TDs to be processed. */
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timeout_val = usb_pipebulk(pipe) ? (SECOND << 2) : (SECOND >> 2);
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start = get_time_ns();
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vtd = td;
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do {
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/* Invalidate dcache */
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ehci_invalidate_dcache(ehci);
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token = hc32_to_cpu(vtd->qt_token);
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if (is_timeout(start, timeout_val)) {
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/* Disable async schedule. */
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cmd = ehci_readl(&ehci->hcor->or_usbcmd);
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cmd &= ~CMD_ASE;
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ehci_writel(&ehci->hcor->or_usbcmd, cmd);
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ret = handshake(&ehci->hcor->or_usbsts, STD_ASS, 0, 100 * 1000);
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ehci_writel(&qh->qh_overlay.qt_token, 0);
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return -ETIMEDOUT;
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}
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} while (token & 0x80);
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|
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/* Disable async schedule. */
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cmd = ehci_readl(&ehci->hcor->or_usbcmd);
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cmd &= ~CMD_ASE;
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ehci_writel(&ehci->hcor->or_usbcmd, cmd);
|
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|
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ret = handshake(&ehci->hcor->or_usbsts, STD_ASS, 0,
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100 * 1000);
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if (ret < 0) {
|
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printf("EHCI fail timeout STD_ASS reset\n");
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goto fail;
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}
|
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|
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ehci->qh_list->qh_link = cpu_to_hc32((uint32_t)ehci->qh_list | QH_LINK_TYPE_QH);
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|
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token = hc32_to_cpu(qh->qh_overlay.qt_token);
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if (!(token & 0x80)) {
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debug("TOKEN=0x%08x\n", token);
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switch (token & 0xfc) {
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case 0:
|
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toggle = token >> 31;
|
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usb_settoggle(dev, usb_pipeendpoint(pipe),
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usb_pipeout(pipe), toggle);
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dev->status = 0;
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break;
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case 0x40:
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dev->status = USB_ST_STALLED;
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break;
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case 0xa0:
|
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case 0x20:
|
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dev->status = USB_ST_BUF_ERR;
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break;
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case 0x50:
|
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case 0x10:
|
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dev->status = USB_ST_BABBLE_DET;
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break;
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default:
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dev->status = USB_ST_CRC_ERR;
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break;
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}
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dev->act_len = length - ((token >> 16) & 0x7fff);
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} else {
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dev->act_len = 0;
|
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debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
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dev->devnum, ehci_readl(&ehci->hcor->or_usbsts),
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ehci_readl(&ehci->hcor->or_portsc[0]),
|
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ehci_readl(&ehci->hcor->or_portsc[1]));
|
|
}
|
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|
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return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
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|
|
|
fail:
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printf("fail1\n");
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td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
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while (td != (void *)QT_NEXT_TERMINATE) {
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qh->qh_overlay.qt_next = td->qt_next;
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td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
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}
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return -1;
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}
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|
|
|
static inline int min3(int a, int b, int c)
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|
{
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|
|
|
if (b < a)
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a = b;
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if (c < a)
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a = c;
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return a;
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}
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|
|
|
static int
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|
ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
|
|
int length, struct devrequest *req)
|
|
{
|
|
struct usb_host *host = dev->host;
|
|
struct ehci_priv *ehci = to_ehci(host);
|
|
uint8_t tmpbuf[4];
|
|
u16 typeReq;
|
|
void *srcptr = NULL;
|
|
int len, srclen;
|
|
uint32_t reg;
|
|
uint32_t *status_reg;
|
|
|
|
if (le16_to_cpu(req->index) >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
|
|
printf("The request port(%d) is not configured\n",
|
|
le16_to_cpu(req->index) - 1);
|
|
return -1;
|
|
}
|
|
status_reg = (uint32_t *)&ehci->hcor->or_portsc[le16_to_cpu(req->index) - 1];
|
|
srclen = 0;
|
|
|
|
debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
|
|
req->request, req->request,
|
|
req->requesttype, req->requesttype,
|
|
le16_to_cpu(req->value), le16_to_cpu(req->index));
|
|
|
|
typeReq = req->request | (req->requesttype << 8);
|
|
|
|
switch (typeReq) {
|
|
case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
|
|
switch (le16_to_cpu(req->value) >> 8) {
|
|
case USB_DT_DEVICE:
|
|
debug("USB_DT_DEVICE request\n");
|
|
srcptr = &descriptor.device;
|
|
srclen = 0x12;
|
|
break;
|
|
case USB_DT_CONFIG:
|
|
debug("USB_DT_CONFIG config\n");
|
|
srcptr = &descriptor.config;
|
|
srclen = 0x19;
|
|
break;
|
|
case USB_DT_STRING:
|
|
debug("USB_DT_STRING config\n");
|
|
switch (le16_to_cpu(req->value) & 0xff) {
|
|
case 0: /* Language */
|
|
srcptr = "\4\3\1\0";
|
|
srclen = 4;
|
|
break;
|
|
case 1: /* Vendor */
|
|
srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
|
|
srclen = 14;
|
|
break;
|
|
case 2: /* Product */
|
|
srcptr = "\52\3E\0H\0C\0I\0 "
|
|
"\0H\0o\0s\0t\0 "
|
|
"\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
|
|
srclen = 42;
|
|
break;
|
|
default:
|
|
debug("unknown value DT_STRING %x\n",
|
|
le16_to_cpu(req->value));
|
|
goto unknown;
|
|
}
|
|
break;
|
|
default:
|
|
debug("unknown value %x\n", le16_to_cpu(req->value));
|
|
goto unknown;
|
|
}
|
|
break;
|
|
case ((USB_DIR_IN | USB_RT_HUB) << 8) | USB_REQ_GET_DESCRIPTOR:
|
|
switch (le16_to_cpu(req->value) >> 8) {
|
|
case USB_DT_HUB:
|
|
debug("USB_DT_HUB config\n");
|
|
srcptr = &descriptor.hub;
|
|
srclen = 0x8;
|
|
break;
|
|
default:
|
|
debug("unknown value %x\n", le16_to_cpu(req->value));
|
|
goto unknown;
|
|
}
|
|
break;
|
|
case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
|
|
debug("USB_REQ_SET_ADDRESS\n");
|
|
ehci->rootdev = le16_to_cpu(req->value);
|
|
break;
|
|
case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
|
|
debug("USB_REQ_SET_CONFIGURATION\n");
|
|
/* Nothing to do */
|
|
break;
|
|
case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
|
|
tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
|
|
tmpbuf[1] = 0;
|
|
srcptr = tmpbuf;
|
|
srclen = 2;
|
|
break;
|
|
case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
|
|
memset(tmpbuf, 0, 4);
|
|
reg = ehci_readl(status_reg);
|
|
if (reg & EHCI_PS_CS)
|
|
tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
|
|
if (reg & EHCI_PS_PE)
|
|
tmpbuf[0] |= USB_PORT_STAT_ENABLE;
|
|
if (reg & EHCI_PS_SUSP)
|
|
tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
|
|
if (reg & EHCI_PS_OCA)
|
|
tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
|
|
if (reg & EHCI_PS_PR &&
|
|
(ehci->portreset & (1 << le16_to_cpu(req->index)))) {
|
|
int ret;
|
|
/* force reset to complete */
|
|
reg = reg & ~(EHCI_PS_PR | EHCI_PS_CLEAR);
|
|
ehci_writel(status_reg, reg);
|
|
ret = handshake(status_reg, EHCI_PS_PR, 0, 2 * 1000);
|
|
if (!ret)
|
|
tmpbuf[0] |= USB_PORT_STAT_RESET;
|
|
else
|
|
printf("port(%d) reset error\n",
|
|
le16_to_cpu(req->index) - 1);
|
|
}
|
|
if (reg & EHCI_PS_PP)
|
|
tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
|
|
|
|
if (ehci_is_TDI()) {
|
|
switch ((reg >> 26) & 3) {
|
|
case 0:
|
|
break;
|
|
case 1:
|
|
tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
|
|
break;
|
|
case 2:
|
|
default:
|
|
tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
|
|
break;
|
|
}
|
|
} else {
|
|
tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
|
|
}
|
|
|
|
if (reg & EHCI_PS_CSC)
|
|
tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
|
|
if (reg & EHCI_PS_PEC)
|
|
tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
|
|
if (reg & EHCI_PS_OCC)
|
|
tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
|
|
if (ehci->portreset & (1 << le16_to_cpu(req->index)))
|
|
tmpbuf[2] |= USB_PORT_STAT_C_RESET;
|
|
|
|
srcptr = tmpbuf;
|
|
srclen = 4;
|
|
break;
|
|
case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
|
|
reg = ehci_readl(status_reg);
|
|
reg &= ~EHCI_PS_CLEAR;
|
|
switch (le16_to_cpu(req->value)) {
|
|
case USB_PORT_FEAT_ENABLE:
|
|
reg |= EHCI_PS_PE;
|
|
ehci_writel(status_reg, reg);
|
|
break;
|
|
case USB_PORT_FEAT_POWER:
|
|
if (HCS_PPC(ehci_readl(&ehci->hccr->cr_hcsparams))) {
|
|
reg |= EHCI_PS_PP;
|
|
ehci_writel(status_reg, reg);
|
|
}
|
|
break;
|
|
case USB_PORT_FEAT_RESET:
|
|
if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
|
|
!ehci_is_TDI() &&
|
|
EHCI_PS_IS_LOWSPEED(reg)) {
|
|
/* Low speed device, give up ownership. */
|
|
debug("port %d low speed --> companion\n",
|
|
req->index - 1);
|
|
reg |= EHCI_PS_PO;
|
|
ehci_writel(status_reg, reg);
|
|
break;
|
|
} else {
|
|
int ret;
|
|
|
|
reg |= EHCI_PS_PR;
|
|
reg &= ~EHCI_PS_PE;
|
|
ehci_writel(status_reg, reg);
|
|
/*
|
|
* caller must wait, then call GetPortStatus
|
|
* usb 2.0 specification say 50 ms resets on
|
|
* root
|
|
*/
|
|
wait_ms(50);
|
|
ehci->portreset |= 1 << le16_to_cpu(req->index);
|
|
/* terminate the reset */
|
|
ehci_writel(status_reg, reg & ~EHCI_PS_PR);
|
|
/*
|
|
* A host controller must terminate the reset
|
|
* and stabilize the state of the port within
|
|
* 2 milliseconds
|
|
*/
|
|
ret = handshake(status_reg, EHCI_PS_PR, 0,
|
|
2 * 1000);
|
|
if (!ret)
|
|
ehci->portreset |=
|
|
1 << le16_to_cpu(req->index);
|
|
else
|
|
printf("port(%d) reset error\n",
|
|
le16_to_cpu(req->index) - 1);
|
|
|
|
}
|
|
break;
|
|
default:
|
|
debug("unknown feature %x\n", le16_to_cpu(req->value));
|
|
goto unknown;
|
|
}
|
|
/* unblock posted writes */
|
|
(void) ehci_readl(&ehci->hcor->or_usbcmd);
|
|
break;
|
|
case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
|
|
reg = ehci_readl(status_reg);
|
|
switch (le16_to_cpu(req->value)) {
|
|
case USB_PORT_FEAT_ENABLE:
|
|
reg &= ~EHCI_PS_PE;
|
|
break;
|
|
case USB_PORT_FEAT_C_ENABLE:
|
|
reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
|
|
break;
|
|
case USB_PORT_FEAT_POWER:
|
|
if (HCS_PPC(ehci_readl(&ehci->hccr->cr_hcsparams)))
|
|
reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
|
|
case USB_PORT_FEAT_C_CONNECTION:
|
|
reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
|
|
break;
|
|
case USB_PORT_FEAT_OVER_CURRENT:
|
|
reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
|
|
break;
|
|
case USB_PORT_FEAT_C_RESET:
|
|
ehci->portreset &= ~(1 << le16_to_cpu(req->index));
|
|
break;
|
|
default:
|
|
debug("unknown feature %x\n", le16_to_cpu(req->value));
|
|
goto unknown;
|
|
}
|
|
ehci_writel(status_reg, reg);
|
|
/* unblock posted write */
|
|
(void) ehci_readl(&ehci->hcor->or_usbcmd);
|
|
break;
|
|
default:
|
|
debug("Unknown request\n");
|
|
goto unknown;
|
|
}
|
|
|
|
wait_ms(1);
|
|
len = min3(srclen, le16_to_cpu(req->length), length);
|
|
if (srcptr != NULL && len > 0)
|
|
memcpy(buffer, srcptr, len);
|
|
else
|
|
debug("Len is 0\n");
|
|
|
|
dev->act_len = len;
|
|
dev->status = 0;
|
|
return 0;
|
|
|
|
unknown:
|
|
debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
|
|
req->requesttype, req->request, le16_to_cpu(req->value),
|
|
le16_to_cpu(req->index), le16_to_cpu(req->length));
|
|
|
|
dev->act_len = 0;
|
|
dev->status = USB_ST_STALLED;
|
|
return -1;
|
|
}
|
|
|
|
/* force HC to halt state from unknown (EHCI spec section 2.3) */
|
|
static int ehci_halt(struct ehci_priv *ehci)
|
|
{
|
|
u32 temp = ehci_readl(&ehci->hcor->or_usbsts);
|
|
|
|
/* disable any irqs left enabled by previous code */
|
|
ehci_writel(&ehci->hcor->or_usbintr, 0);
|
|
|
|
if (temp & STS_HALT)
|
|
return 0;
|
|
|
|
temp = ehci_readl(&ehci->hcor->or_usbcmd);
|
|
temp &= ~CMD_RUN;
|
|
ehci_writel(&ehci->hcor->or_usbcmd, temp);
|
|
|
|
return handshake(&ehci->hcor->or_usbsts,
|
|
STS_HALT, STS_HALT, 16 * 125);
|
|
}
|
|
|
|
static int ehci_init(struct usb_host *host)
|
|
{
|
|
struct ehci_priv *ehci = to_ehci(host);
|
|
uint32_t reg;
|
|
uint32_t cmd;
|
|
|
|
ehci_halt(ehci);
|
|
|
|
/* EHCI spec section 4.1 */
|
|
if (ehci_reset(ehci) != 0)
|
|
return -1;
|
|
|
|
ehci->qh_list->qh_link = cpu_to_hc32((uint32_t)ehci->qh_list | QH_LINK_TYPE_QH);
|
|
ehci->qh_list->qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
|
|
ehci->qh_list->qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
|
|
ehci->qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
|
|
ehci->qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
|
|
ehci->qh_list->qh_overlay.qt_token = cpu_to_hc32(0x40);
|
|
|
|
/* Set async. queue head pointer. */
|
|
ehci_writel(&ehci->hcor->or_asynclistaddr, (uint32_t)ehci->qh_list);
|
|
|
|
reg = ehci_readl(&ehci->hccr->cr_hcsparams);
|
|
descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
|
|
|
|
/* Port Indicators */
|
|
if (HCS_INDICATOR(reg))
|
|
descriptor.hub.wHubCharacteristics |= 0x80;
|
|
/* Port Power Control */
|
|
if (HCS_PPC(reg))
|
|
descriptor.hub.wHubCharacteristics |= 0x01;
|
|
|
|
/* Start the host controller. */
|
|
cmd = ehci_readl(&ehci->hcor->or_usbcmd);
|
|
/*
|
|
* Philips, Intel, and maybe others need CMD_RUN before the
|
|
* root hub will detect new devices (why?); NEC doesn't
|
|
*/
|
|
cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
|
|
cmd |= CMD_RUN;
|
|
ehci_writel(&ehci->hcor->or_usbcmd, cmd);
|
|
|
|
/* take control over the ports */
|
|
cmd = ehci_readl(&ehci->hcor->or_configflag);
|
|
cmd |= FLAG_CF;
|
|
ehci_writel(&ehci->hcor->or_configflag, cmd);
|
|
/* unblock posted write */
|
|
cmd = ehci_readl(&ehci->hcor->or_usbcmd);
|
|
wait_ms(5);
|
|
|
|
ehci->rootdev = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
|
|
int length, int timeout)
|
|
{
|
|
|
|
if (usb_pipetype(pipe) != PIPE_BULK) {
|
|
debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
|
|
return -1;
|
|
}
|
|
return ehci_submit_async(dev, pipe, buffer, length, NULL);
|
|
}
|
|
|
|
static int
|
|
submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
|
|
int length, struct devrequest *setup, int timeout)
|
|
{
|
|
struct usb_host *host = dev->host;
|
|
struct ehci_priv *ehci = to_ehci(host);
|
|
|
|
if (usb_pipetype(pipe) != PIPE_CONTROL) {
|
|
debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
|
|
return -1;
|
|
}
|
|
|
|
if (usb_pipedevice(pipe) == ehci->rootdev) {
|
|
if (ehci->rootdev == 0)
|
|
dev->speed = USB_SPEED_HIGH;
|
|
return ehci_submit_root(dev, pipe, buffer, length, setup);
|
|
}
|
|
return ehci_submit_async(dev, pipe, buffer, length, setup);
|
|
}
|
|
|
|
static int
|
|
submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
|
|
int length, int interval)
|
|
{
|
|
debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
|
|
dev, pipe, buffer, length, interval);
|
|
return -1;
|
|
}
|
|
|
|
static int ehci_probe(struct device_d *dev)
|
|
{
|
|
struct usb_host *host;
|
|
struct ehci_priv *ehci;
|
|
uint32_t reg;
|
|
struct ehci_platform_data *pdata = dev->platform_data;
|
|
|
|
ehci = xmalloc(sizeof(struct ehci_priv));
|
|
host = &ehci->host;
|
|
dev->priv = ehci;
|
|
|
|
/* default to EHCI_HAS_TT to not change behaviour of boards
|
|
* without platform_data
|
|
*/
|
|
if (pdata)
|
|
ehci->flags = pdata->flags;
|
|
else
|
|
ehci->flags = EHCI_HAS_TT;
|
|
|
|
if (dev->num_resources < 2) {
|
|
printf("echi: need 2 resources base and data");
|
|
return -ENODEV;
|
|
}
|
|
|
|
ehci->hccr = dev_request_mem_region(dev, 0);
|
|
ehci->hcor = dev_request_mem_region(dev, 1);
|
|
|
|
ehci->qh_list = xmemalign(32, sizeof(struct QH) * NUM_QH);
|
|
ehci->td = xmemalign(32, sizeof(struct qTD) * NUM_TD);
|
|
|
|
host->init = ehci_init;
|
|
host->submit_int_msg = submit_int_msg;
|
|
host->submit_control_msg = submit_control_msg;
|
|
host->submit_bulk_msg = submit_bulk_msg;
|
|
|
|
if (ehci->flags & EHCI_HAS_TT) {
|
|
ehci_reset(ehci);
|
|
}
|
|
|
|
usb_register_host(host);
|
|
|
|
reg = HC_VERSION(ehci_readl(&ehci->hccr->cr_capbase));
|
|
dev_info(dev, "USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ehci_remove(struct device_d *dev)
|
|
{
|
|
struct ehci_priv *ehci = dev->priv;
|
|
ehci_halt(ehci);
|
|
}
|
|
|
|
static struct driver_d ehci_driver = {
|
|
.name = "ehci",
|
|
.probe = ehci_probe,
|
|
.remove = ehci_remove,
|
|
};
|
|
|
|
static int ehcil_init(void)
|
|
{
|
|
register_driver(&ehci_driver);
|
|
return 0;
|
|
}
|
|
|
|
device_initcall(ehcil_init);
|
|
|