225 lines
6.5 KiB
C
225 lines
6.5 KiB
C
/*
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* Copyright (C) 2011 Juergen Beisert, Pengutronix
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* Copyright (C) 2012 Sascha Hauer, Pengutronix
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*
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* Derived from the Linux kernel: Generic platform device PATA driver
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* Copyright (C) 2006 - 2007 Paul Mundt
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* Based on pata_pcmcia:
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* Copyright 2005-2006 Red Hat Inc, all rights reserved.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <init.h>
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#include <xfuncs.h>
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#include <malloc.h>
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#include <errno.h>
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#include <ata_drive.h>
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#include <platform_ide.h>
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#include <io.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#define PATA_IMX_ATA_TIME_OFF 0x0
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#define PATA_IMX_ATA_TIME_ON 0x1
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#define PATA_IMX_ATA_TIME_1 0x2
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#define PATA_IMX_ATA_TIME_2W 0x3
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#define PATA_IMX_ATA_TIME_2R 0x4
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#define PATA_IMX_ATA_TIME_AX 0x5
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#define PATA_IMX_ATA_TIME_PIO_RDX 0x6
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#define PATA_IMX_ATA_TIME_4 0x7
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#define PATA_IMX_ATA_TIME_9 0x8
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#define PATA_IMX_ATA_TIME_M 0x9
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#define PATA_IMX_ATA_TIME_JN 0xa
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#define PATA_IMX_ATA_TIME_D 0xb
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#define PATA_IMX_ATA_TIME_K 0xc
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#define PATA_IMX_ATA_TIME_ACK 0xd
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#define PATA_IMX_ATA_TIME_ENV 0xe
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#define PATA_IMX_ATA_TIME_UDMA_RDX 0xf
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#define PATA_IMX_ATA_TIME_ZAH 0x10
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#define PATA_IMX_ATA_TIME_MLIX 0x11
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#define PATA_IMX_ATA_TIME_DVH 0x12
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#define PATA_IMX_ATA_TIME_DZFS 0x13
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#define PATA_IMX_ATA_TIME_DVS 0x14
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#define PATA_IMX_ATA_TIME_CVH 0x15
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#define PATA_IMX_ATA_TIME_SS 0x16
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#define PATA_IMX_ATA_TIME_CYC 0x17
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#define PATA_IMX_ATA_CONTROL 0x24
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#define PATA_IMX_ATA_CTRL_FIFO_RST_B (1<<7)
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#define PATA_IMX_ATA_CTRL_ATA_RST_B (1<<6)
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#define PATA_IMX_ATA_CTRL_IORDY_EN (1<<0)
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#define PATA_IMX_ATA_INT_EN 0x2C
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#define PATA_IMX_ATA_INTR_ATA_INTRQ2 (1<<3)
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#define PATA_IMX_DRIVE_DATA 0xA0
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#define PATA_IMX_DRIVE_CONTROL 0xD8
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static uint16_t pio_t1[] = { 70, 50, 30, 30, 25 };
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static uint16_t pio_t2_8[] = { 290, 290, 290, 80, 70 };
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static uint16_t pio_t4[] = { 30, 20, 15, 10, 10 };
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static uint16_t pio_t9[] = { 20, 15, 10, 10, 10 };
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static uint16_t pio_tA[] = { 50, 50, 50, 50, 50 };
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static void pata_imx_set_bus_timing(void __iomem *base, unsigned long clkrate,
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unsigned char mode)
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{
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uint32_t T = 1000000000 / clkrate;
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struct mxc_ata_config_regs *ata_regs;
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ata_regs = (struct mxc_ata_config_regs *)base;
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if (mode >= ARRAY_SIZE(pio_t1))
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return;
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/* Write TIME_OFF/ON/1/2W */
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writeb(3, base + PATA_IMX_ATA_TIME_OFF);
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writeb(3, base + PATA_IMX_ATA_TIME_ON);
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writeb((pio_t1[mode] + T) / T, base + PATA_IMX_ATA_TIME_1);
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writeb((pio_t2_8[mode] + T) / T, base + PATA_IMX_ATA_TIME_2W);
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/* Write TIME_2R/AX/RDX/4 */
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writeb((pio_t2_8[mode] + T) / T, base + PATA_IMX_ATA_TIME_2R);
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writeb((pio_tA[mode] + T) / T + 2, base + PATA_IMX_ATA_TIME_AX);
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writeb(1, base + PATA_IMX_ATA_TIME_PIO_RDX);
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writeb((pio_t4[mode] + T) / T, base + PATA_IMX_ATA_TIME_4);
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/* Write TIME_9 ; the rest of timing registers is irrelevant for PIO */
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writeb((pio_t9[mode] + T) / T, base + PATA_IMX_ATA_TIME_9);
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}
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/**
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* Setup the register specific addresses for an ATA like divice
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* @param reg_base Base address of the standard ATA like registers
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* @param alt_base Base address of the alternate ATA like registers
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* @param ioaddr Register file structure to setup
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* @param shift Shift offset between registers
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*
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* Some of the registers have different names but use the same offset. This is
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* due to the fact read or write access at the same offset reaches different
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* registers.
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*/
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static void imx_pata_setup_port(void *reg_base, void *alt_base,
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struct ata_ioports *ioaddr, unsigned shift)
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{
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/* standard registers (0 ... 7) */
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ioaddr->cmd_addr = reg_base;
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ioaddr->data_addr = reg_base + (IDE_REG_DATA << shift);
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ioaddr->error_addr = reg_base + (IDE_REG_ERR << shift);
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ioaddr->feature_addr = reg_base + (IDE_REG_FEATURE << shift);
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ioaddr->nsect_addr = reg_base + (IDE_REG_NSECT << shift);
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ioaddr->lbal_addr = reg_base + (IDE_REG_LBAL << shift);
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ioaddr->lbam_addr = reg_base + (IDE_REG_LBAM << shift);
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ioaddr->lbah_addr = reg_base + (IDE_REG_LBAH << shift);
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ioaddr->device_addr = reg_base + (IDE_REG_DEVICE << shift);
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ioaddr->status_addr = reg_base + (IDE_REG_STATUS << shift);
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ioaddr->command_addr = reg_base + (IDE_REG_CMD << shift);
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if (alt_base) {
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ioaddr->altstatus_addr = alt_base + (IDE_REG_ALT_STATUS << shift);
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ioaddr->ctl_addr = alt_base + (IDE_REG_DEV_CTL << shift);
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ioaddr->alt_dev_addr = alt_base + (IDE_REG_DRV_ADDR << shift);
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} else {
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ioaddr->altstatus_addr = ioaddr->status_addr;
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ioaddr->ctl_addr = ioaddr->status_addr;
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/* ioaddr->alt_dev_addr not used in driver */
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}
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}
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static int pata_imx_detect(struct device_d *dev)
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{
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struct ide_port *ide = dev->priv;
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return ata_port_detect(&ide->port);
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}
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static int imx_pata_probe(struct device_d *dev)
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{
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struct ide_port *ide;
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struct clk *clk;
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void __iomem *base;
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int ret;
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const char *devname = NULL;
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ide = xzalloc(sizeof(*ide));
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base = dev_request_mem_region(dev, 0);
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clk = clk_get(dev, NULL);
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if (IS_ERR(clk)) {
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ret = PTR_ERR(clk);
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goto out_free;
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}
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imx_pata_setup_port(base + PATA_IMX_DRIVE_DATA,
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base + PATA_IMX_DRIVE_CONTROL, &ide->io, 2);
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/* deassert resets */
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writel(PATA_IMX_ATA_CTRL_FIFO_RST_B |
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PATA_IMX_ATA_CTRL_ATA_RST_B,
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base + PATA_IMX_ATA_CONTROL);
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pata_imx_set_bus_timing(base, clk_get_rate(clk), 4);
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if (IS_ENABLED(CONFIG_OFDEVICE)) {
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devname = of_alias_get(dev->device_node);
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if (devname)
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devname = xstrdup(devname);
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}
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ide->port.dev = dev;
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ide->port.devname = devname;
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dev->priv = ide;
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dev->detect = pata_imx_detect;
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ret = ide_port_register(ide);
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if (ret) {
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dev_err(dev, "Cannot register IDE interface: %s\n",
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strerror(-ret));
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goto out_free_clk;
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}
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return 0;
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out_free_clk:
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clk_put(clk);
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out_free:
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free(ide);
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return ret;
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}
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static __maybe_unused struct of_device_id imx_pata_dt_ids[] = {
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{
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.compatible = "fsl,imx27-pata",
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},
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};
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static struct driver_d imx_pata_driver = {
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.name = "imx-pata",
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.probe = imx_pata_probe,
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.of_compatible = DRV_OF_COMPAT(imx_pata_dt_ids),
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};
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device_platform_driver(imx_pata_driver);
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