274 lines
6.7 KiB
C
274 lines
6.7 KiB
C
/*
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* (C) 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
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* (c) 2010 Eukrea Electromatique, Eric Bénard <eric@eukrea.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <init.h>
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#include <driver.h>
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#include <environment.h>
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#include <mach/imx-regs.h>
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#include <asm/armlinux.h>
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#include <mach/gpio.h>
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#include <asm/io.h>
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#include <asm/mmu.h>
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#include <partition.h>
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#include <asm/mach-types.h>
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#include <mach/imx-nand.h>
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#include <mach/imxfb.h>
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#include <fec.h>
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#include <nand.h>
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#include <mach/imx-flash-header.h>
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#include <mach/iomux-mx25.h>
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extern unsigned long _stext;
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void __naked __flash_header_start go(void)
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{
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__asm__ __volatile__("b exception_vectors\n");
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}
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struct imx_dcd_entry __dcd_entry_0x400 dcd_entry[] = {
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{ .ptr_type = 4, .addr = 0xb8001010, .val = 0x00000004, },
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{ .ptr_type = 4, .addr = 0xb8001000, .val = 0x92100000, },
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{ .ptr_type = 1, .addr = 0x80000400, .val = 0x12344321, },
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{ .ptr_type = 4, .addr = 0xb8001000, .val = 0xa2100000, },
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{ .ptr_type = 4, .addr = 0x80000000, .val = 0x12344321, },
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{ .ptr_type = 4, .addr = 0x80000000, .val = 0x12344321, },
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{ .ptr_type = 4, .addr = 0xb8001000, .val = 0xb2100000, },
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{ .ptr_type = 1, .addr = 0x80000033, .val = 0xda, },
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{ .ptr_type = 1, .addr = 0x81000000, .val = 0xff, },
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{ .ptr_type = 4, .addr = 0xb8001000, .val = 0x82216080, },
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{ .ptr_type = 4, .addr = 0xb8001004, .val = 0x00295729, },
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{ .ptr_type = 4, .addr = 0x53f80008, .val = 0x20034000, },
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};
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struct imx_flash_header __flash_header_0x400 eukrea_cpuimx25_header = {
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.app_code_jump_vector = TEXT_BASE + 0x2000,
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.app_code_barker = APP_CODE_BARKER,
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.app_code_csf = 0,
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.dcd_ptr_ptr = TEXT_BASE + 0x400 + offsetof(struct imx_flash_header, dcd),
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.super_root_key = 0,
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.dcd = TEXT_BASE + 0x400 + offsetof(struct imx_flash_header, dcd_barker),
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.app_dest = TEXT_BASE,
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.dcd_barker = DCD_BARKER,
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.dcd_block_len = sizeof(dcd_entry),
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};
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extern unsigned long __bss_start;
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unsigned long __image_len_0x400 barebox_len = 0x40000;
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static struct fec_platform_data fec_info = {
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.xcv_type = RMII,
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.phy_addr = 1,
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};
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static struct device_d fec_dev = {
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.name = "fec_imx",
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.map_base = IMX_FEC_BASE,
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.platform_data = &fec_info,
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};
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static struct memory_platform_data sdram_pdata = {
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.name = "ram0",
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.flags = DEVFS_RDWR,
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};
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static struct device_d sdram0_dev = {
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.name = "mem",
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.map_base = IMX_SDRAM_CS0,
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.size = 64 * 1024 * 1024,
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.platform_data = &sdram_pdata,
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};
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struct imx_nand_platform_data nand_info = {
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.width = 1,
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.hw_ecc = 1,
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};
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static struct device_d nand_dev = {
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.name = "imx_nand",
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.map_base = IMX_NFC_BASE,
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.platform_data = &nand_info,
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};
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static struct imx_fb_videomode imxfb_mode = {
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.mode = {
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.name = "CMO-QVGA",
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.refresh = 60,
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.xres = 320,
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.yres = 240,
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.pixclock = KHZ2PICOS(6500),
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.hsync_len = 30,
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.left_margin = 38,
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.right_margin = 20,
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.vsync_len = 3,
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.upper_margin = 15,
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.lower_margin = 4,
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},
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.pcr = 0xCAD08B80,
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.bpp = 16,
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};
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static struct imx_fb_platform_data eukrea_cpuimx25_fb_data = {
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.mode = &imxfb_mode,
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.pwmr = 0x00A903FF,
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.lscr1 = 0x00120300,
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.dmacr = 0x80040060,
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};
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static struct device_d imxfb_dev = {
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.name = "imxfb",
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.map_base = 0x53fbc000,
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.size = 0x1000,
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.platform_data = &eukrea_cpuimx25_fb_data,
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};
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#ifdef CONFIG_MMU
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static void eukrea_cpuimx25_mmu_init(void)
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{
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mmu_init();
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arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
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arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
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setup_dma_coherent(0x10000000);
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mmu_enable();
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}
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#else
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static void eukrea_cpuimx25_mmu_init(void)
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{
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}
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#endif
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static struct pad_desc eukrea_cpuimx25_pads[] = {
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MX25_PAD_FEC_MDC__MDC,
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MX25_PAD_FEC_MDIO__MDIO,
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MX25_PAD_FEC_RDATA0__RDATA0,
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MX25_PAD_FEC_RDATA1__RDATA1,
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MX25_PAD_FEC_RX_DV__RX_DV,
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MX25_PAD_FEC_TDATA0__TDATA0,
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MX25_PAD_FEC_TDATA1__TDATA1,
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MX25_PAD_FEC_TX_CLK__TX_CLK,
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MX25_PAD_FEC_TX_EN__TX_EN,
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/* UART1 */
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MX25_PAD_UART1_RXD__RXD_MUX,
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MX25_PAD_UART1_TXD__TXD_MUX,
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MX25_PAD_UART1_RTS__RTS,
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MX25_PAD_UART1_CTS__CTS,
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/* LCDC */
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MX25_PAD_LD0__LCDC_LD0,
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MX25_PAD_LD1__LCDC_LD1,
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MX25_PAD_LD2__LCDC_LD2,
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MX25_PAD_LD3__LCDC_LD3,
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MX25_PAD_LD4__LCDC_LD4,
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MX25_PAD_LD5__LCDC_LD5,
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MX25_PAD_LD6__LCDC_LD6,
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MX25_PAD_LD7__LCDC_LD7,
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MX25_PAD_LD8__LCDC_LD8,
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MX25_PAD_LD9__LCDC_LD9,
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MX25_PAD_LD10__LCDC_LD10,
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MX25_PAD_LD11__LCDC_LD11,
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MX25_PAD_LD12__LCDC_LD12,
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MX25_PAD_LD13__LCDC_LD13,
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MX25_PAD_LD14__LCDC_LD14,
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MX25_PAD_LD15__LCDC_LD15,
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MX25_PAD_GPIO_E__LCDC_LD16,
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MX25_PAD_GPIO_F__LCDC_LD17,
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MX25_PAD_LSCLK__LCDC_LSCLK,
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MX25_PAD_OE_ACD__LCDC_OE_ACD,
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MX25_PAD_VSYNC__LCDC_VSYN,
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MX25_PAD_HSYNC__LCDC_HSYN,
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/* BACKLIGHT CONTROL */
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MX25_PAD_PWM__GPIO26,
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};
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static int eukrea_cpuimx25_devices_init(void)
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{
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eukrea_cpuimx25_mmu_init();
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mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads,
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ARRAY_SIZE(eukrea_cpuimx25_pads));
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register_device(&fec_dev);
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nand_info.width = 1;
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register_device(&nand_dev);
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devfs_add_partition("nand0", 0x00000, 0x40000,
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PARTITION_FIXED, "self_raw");
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dev_add_bb_dev("self_raw", "self0");
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devfs_add_partition("nand0", 0x40000, 0x20000,
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PARTITION_FIXED, "env_raw");
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dev_add_bb_dev("env_raw", "env0");
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register_device(&sdram0_dev);
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/* enable LCD */
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gpio_direction_output(26, 1);
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gpio_set_value(26, 1);
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register_device(&imxfb_dev);
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armlinux_add_dram(&sdram0_dev);
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armlinux_set_bootparams((void *)0x80000100);
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armlinux_set_architecture(MACH_TYPE_EUKREA_CPUIMX25);
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return 0;
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}
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device_initcall(eukrea_cpuimx25_devices_init);
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static struct device_d eukrea_cpuimx25_serial_device = {
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.name = "imx_serial",
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.map_base = IMX_UART1_BASE,
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.size = 16 * 1024,
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};
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static int eukrea_cpuimx25_console_init(void)
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{
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writel(0x03010101, IMX_CCM_BASE + CCM_PCDR3);
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register_device(&eukrea_cpuimx25_serial_device);
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return 0;
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}
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console_initcall(eukrea_cpuimx25_console_init);
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#ifdef CONFIG_NAND_IMX_BOOT
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void __bare_init nand_boot(void)
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{
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imx_nand_load_image((void *)TEXT_BASE, 256 * 1024);
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}
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#endif
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static int eukrea_cpuimx25_core_setup(void)
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{
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writel(0x01010103, IMX_CCM_BASE + CCM_PCDR2);
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return 0;
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}
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core_initcall(eukrea_cpuimx25_core_setup);
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