932d0cc9a3
The cache-v7 code uses assembler instructions which do not exist on before v7, so explicitely pass armv7-a to this file to make the compiler happy. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
34 lines
1 KiB
Makefile
34 lines
1 KiB
Makefile
obj-y += cpu.o
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obj-$(CONFIG_ARM_EXCEPTIONS) += exceptions.o
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obj-$(CONFIG_ARM_EXCEPTIONS) += interrupts.o
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obj-y += start.o setupc.o
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#
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# Any variants can be called as start-armxyz.S
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#
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obj-$(CONFIG_CMD_ARM_CPUINFO) += cpuinfo.o
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obj-$(CONFIG_CMD_ARM_MMUINFO) += mmuinfo.o
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obj-$(CONFIG_OFDEVICE) += dtb.o
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obj-$(CONFIG_MMU) += mmu.o cache.o mmu-early.o
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pbl-$(CONFIG_MMU) += mmu-early.o
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obj-$(CONFIG_CPU_32v4T) += cache-armv4.o
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pbl-$(CONFIG_CPU_32v4T) += cache-armv4.o
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obj-$(CONFIG_CPU_32v5) += cache-armv5.o
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pbl-$(CONFIG_CPU_32v5) += cache-armv5.o
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obj-$(CONFIG_CPU_32v6) += cache-armv6.o
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pbl-$(CONFIG_CPU_32v6) += cache-armv6.o
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AFLAGS_cache-armv7.o :=-Wa,-march=armv7-a
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obj-$(CONFIG_CPU_32v7) += cache-armv7.o
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AFLAGS_pbl-cache-armv7.o :=-Wa,-march=armv7-a
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pbl-$(CONFIG_CPU_32v7) += cache-armv7.o
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obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
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pbl-y += setupc.o
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pbl-$(CONFIG_PBL_SINGLE_IMAGE) += start-pbl.o
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pbl-$(CONFIG_PBL_MULTI_IMAGES) += uncompress.o
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obj-y += common.o cache.o
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pbl-y += common.o cache.o
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lwl-y += lowlevel.o
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