d8753571b2
This file originates in Linux. Linux has it under include/linux/ directory since commit dccd2304cc90. Let's move it to the same place as well in barebox. This commit was generated by the following commands: find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:' git mv include/sizes.h include/linux/ Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
66 lines
2 KiB
C
66 lines
2 KiB
C
/*
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* Copyright (C) 2013
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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* Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <io.h>
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#include <linux/sizes.h>
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#include <asm/barebox-arm.h>
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#include <asm/barebox-arm-head.h>
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#include <mach/common.h>
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#include <mach/lowlevel.h>
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void __naked barebox_arm_reset_vector(void)
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{
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arm_cpu_lowlevel_init();
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mvebu_barebox_entry(NULL);
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}
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/*
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* All MVEBU SoCs start with internal registers at 0xd0000000.
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* To get more contiguous address space and as Linux expects them
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* there, we remap them early to 0xf1000000.
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*
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* There is no way to determine internal registers base address
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* safely later on, as the remap register itself is within the
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* internal registers.
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*/
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#define MVEBU_BOOTUP_INT_REG_BASE 0xd0000000
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#define MVEBU_BRIDGE_REG_BASE 0x20000
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#define DEVICE_INTERNAL_BASE_ADDR (MVEBU_BRIDGE_REG_BASE + 0x80)
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static void mvebu_remap_registers(void)
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{
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writel(MVEBU_REMAP_INT_REG_BASE,
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IOMEM(MVEBU_BOOTUP_INT_REG_BASE) + DEVICE_INTERNAL_BASE_ADDR);
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}
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/*
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* Determining the actual memory size is highly SoC dependent,
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* but for all SoCs RAM starts at 0x00000000. Therefore, we start
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* with a minimal memory setup of 64M and probe correct memory size
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* later.
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*/
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#define MVEBU_BOOTUP_MEMORY_BASE 0x00000000
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#define MVEBU_BOOTUP_MEMORY_SIZE SZ_64M
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void __naked __noreturn mvebu_barebox_entry(void *boarddata)
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{
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mvebu_remap_registers();
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barebox_arm_entry(MVEBU_BOOTUP_MEMORY_BASE,
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MVEBU_BOOTUP_MEMORY_SIZE, boarddata);
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}
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