373909ce87
This adds a pinctrl driver for the Tegra 20 line of SoCs. It only supports the three basic pinconfiguration settings function mux, tristate control and pullup/down control. The driver understands the same devicetree bindings as the Linux one, unimplemented pinconfiguration options will be ignored. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
50 lines
1,015 B
Text
50 lines
1,015 B
Text
/include/ "skeleton.dtsi"
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/ {
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compatible = "nvidia,tegra20";
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timer@60005000 {
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compatible = "nvidia,tegra20-timer";
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reg = <0x60005000 0x60>;
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interrupts = <0 0 0x04
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0 1 0x04
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0 41 0x04
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0 42 0x04>;
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};
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tegra_car: clock {
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compatible = "nvidia,tegra20-car";
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reg = <0x60006000 0x1000>;
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#clock-cells = <1>;
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};
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gpio: gpio {
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compatible = "nvidia,tegra20-gpio";
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reg = <0x6000d000 0x1000>;
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interrupts = <0 32 0x04
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0 33 0x04
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0 34 0x04
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0 35 0x04
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0 55 0x04
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0 87 0x04
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0 89 0x04>;
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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pinmux: pinmux {
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compatible = "nvidia,tegra20-pinmux";
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reg = <0x70000014 0x10 /* Tri-state registers */
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0x70000080 0x20 /* Mux registers */
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0x700000a0 0x14 /* Pull-up/down registers */
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0x70000868 0xa8>; /* Pad control registers */
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};
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pmc {
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compatible = "nvidia,tegra20-pmc";
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reg = <0x7000e400 0x400>;
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};
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};
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