This patch imports i2c_smbus_{read,write}* functions from linux-3.15. Here is a quote from linux.git/Documentation/i2c/smbus-protocol: If you write a driver for some I2C device, please try to use the SMBus commands if at all possible (if the device uses only that subset of the I2C protocol). This makes it possible to use the device driver on both SMBus adapters and I2C adapters (the SMBus command set is automatically translated to I2C on I2C adapters, but plain I2C commands can not be handled at all on most pure SMBus adapters). So having i2c_smbus_{read,write}* functions in barebox makes porting of linux i2c client drivers much easier as many drivers rely on these smbus functions. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
220 lines
7.4 KiB
C
220 lines
7.4 KiB
C
/*
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* i2c.h - definitions for the barebox i2c framework
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*
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* Copyright (C) 2009 by Marc Kleine-Budde <mkl@pengutronix.de>
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*
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* This file is released under the GPLv2
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*
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* Derived from:
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* - i2c.h - i.MX I2C driver header file
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* Copyright (c) 2008, Darius Augulis <augulis.darius@gmail.com>
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* - i2c.h - definitions for the i2c-bus interface
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* Copyright (C) 1995-2000 Simon G. Vogl
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*
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*/
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#ifndef I2C_I2C_H
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#define I2C_I2C_H
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#include <driver.h>
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#include <linux/types.h>
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/*
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* struct i2c_platform_data - structure of platform data for MXC I2C driver
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* @param bitrate Bus speed measured in Hz
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*
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*/
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struct i2c_platform_data {
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int bitrate;
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};
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#define I2C_NAME_SIZE 20
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#define I2C_M_RD 0x0001 /* read data, from slave to master */
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#define I2C_M_DATA_ONLY 0x0002 /* transfer data bytes only */
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#define I2C_M_TEN 0x0010 /* this is a ten bit chip address */
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#define I2C_M_IGNORE_NAK 0x1000 /* if I2C_FUNC_PROTOCOL_MANGLING */
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#define I2C_M_STOP 0x8000 /* if I2C_FUNC_PROTOCOL_MANGLING */
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/**
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* struct i2c_msg - an I2C transaction segment beginning with START
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*
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* An i2c_msg is the low level representation of one segment of an I2C
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* transaction. It is visible to drivers in the @i2c_transfer()
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* procedure and to I2C adapter drivers through the
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* @i2c_adapter.@master_xfer() method.
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*
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* All I2C adapters implement the standard rules for I2C transactions.
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* Each transaction begins with a START. That is followed by the
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* slave address, and a bit encoding read versus write. Then follow
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* all the data bytes, The transfer terminates with a NAK, or when all
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* those bytes have been transferred and ACKed. If this is the last
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* message in a group, it is followed by a STOP. Otherwise it is
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* followed by the next @i2c_msg transaction segment, beginning with a
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* (repeated) START.
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*
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*/
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struct i2c_msg {
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__u8 *buf; /**< The buffer into which data is read, or from which it's written. */
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__u16 addr; /**< Slave address, seven bits */
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__u16 flags; /**< I2C_M_RD is handled by all adapters */
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__u16 len; /**< Number of data bytes in @buf being read from or written to the I2C slave address. */
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};
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/**
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* i2c_adapter is the structure used to identify a physical i2c bus
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* along with the access algorithms necessary to access it.
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*
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*/
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struct i2c_adapter {
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struct device_d dev; /* ptr to device */
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int nr; /* bus number */
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int (*master_xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs, int num);
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struct list_head list;
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int retries;
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void *algo_data;
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};
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struct i2c_client {
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struct device_d dev;
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struct i2c_adapter *adapter;
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unsigned short addr;
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};
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#define to_i2c_client(a) container_of(a, struct i2c_client, dev)
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/*flags for the client struct: */
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#define I2C_CLIENT_PEC 0x04 /* Use Packet Error Checking */
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#define I2C_CLIENT_SCCB 0x9000 /* Use Omnivision SCCB protocol */
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/* Must match I2C_M_STOP|IGNORE_NAK */
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/*
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* Data for SMBus Messages
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*/
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#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */
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union i2c_smbus_data {
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__u8 byte;
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__u16 word;
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__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
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/* and one more for user-space compatibility */
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};
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/* i2c_smbus_xfer read or write markers */
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#define I2C_SMBUS_READ 1
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#define I2C_SMBUS_WRITE 0
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/* SMBus transaction types (size parameter in the above functions)
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Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */
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#define I2C_SMBUS_QUICK 0
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#define I2C_SMBUS_BYTE 1
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#define I2C_SMBUS_BYTE_DATA 2
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#define I2C_SMBUS_WORD_DATA 3
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#define I2C_SMBUS_I2C_BLOCK_DATA 8
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/* This is the very generalized SMBus access routine. You probably do not
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want to use this, though; one of the functions below may be much easier,
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and probably just as fast.
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Note that we use i2c_adapter here, because you do not need a specific
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smbus adapter to call this function. */
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extern s32 i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
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unsigned short flags, char read_write, u8 command,
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int size, union i2c_smbus_data *data);
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/* Now follow the 'nice' access routines. These also document the calling
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conventions of i2c_smbus_xfer. */
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extern s32 i2c_smbus_read_byte(const struct i2c_client *client);
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extern s32 i2c_smbus_write_byte(const struct i2c_client *client, u8 value);
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extern s32 i2c_smbus_read_byte_data(const struct i2c_client *client,
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u8 command);
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extern s32 i2c_smbus_write_byte_data(const struct i2c_client *client,
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u8 command, u8 value);
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extern s32 i2c_smbus_read_word_data(const struct i2c_client *client,
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u8 command);
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extern s32 i2c_smbus_write_word_data(const struct i2c_client *client,
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u8 command, u16 value);
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/* Returns the number of read bytes */
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extern s32 i2c_smbus_read_i2c_block_data(const struct i2c_client *client,
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u8 command, u8 length, u8 *values);
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extern s32 i2c_smbus_write_i2c_block_data(const struct i2c_client *client,
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u8 command, u8 length,
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const u8 *values);
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/**
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* struct i2c_board_info - template for device creation
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*
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* I2C doesn't actually support hardware probing, Drivers commonly
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* need more information than that, such as chip type, configuration,
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* and so on.
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*
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* i2c_board_info is used to build tables of information listing I2C
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* devices that are present. This information is used to grow the
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* driver model tree. For mainboards this is done statically using
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* i2c_register_board_info(); bus numbers identify adapters that
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* aren't yet available. For add-on boards, i2c_new_device() does this
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* dynamically with the adapter already known.
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*/
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struct i2c_board_info {
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char type[I2C_NAME_SIZE]; /**< name of device */
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unsigned short addr; /**< stored in i2c_client.addr */
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void *platform_data; /**< platform data for device */
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struct device_node *of_node;
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};
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/**
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* I2C_BOARD_INFO - macro used to list an i2c device and its address
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* @dev_type: identifies the device type
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* @dev_addr: the device's address on the bus.
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*
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* This macro initializes essential fields of a struct i2c_board_info,
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* declaring what has been provided on a particular board. Optional
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* fields (such as associated irq, or device-specific platform_data)
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* are provided using conventional syntax.
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*/
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#define I2C_BOARD_INFO(dev_type, dev_addr) \
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.type = dev_type, .addr = (dev_addr)
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#ifdef CONFIG_I2C
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extern int i2c_register_board_info(int busnum, struct i2c_board_info const *info, unsigned n);
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#else
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static inline int i2c_register_board_info(int busnum,
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struct i2c_board_info const *info, unsigned n)
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{
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return 0;
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}
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#endif
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extern int i2c_add_numbered_adapter(struct i2c_adapter *adapter);
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struct i2c_adapter *i2c_get_adapter(int busnum);
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struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node);
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/* For devices that use several addresses, use i2c_new_dummy() to make
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* client handles for the extra addresses.
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*/
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extern struct i2c_client *
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i2c_new_dummy(struct i2c_adapter *adap, u16 address);
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extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num);
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extern int i2c_master_send(struct i2c_client *client, const char *buf, int count);
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extern int i2c_master_recv(struct i2c_client *client, char *buf, int count);
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#define I2C_ADDR_16_BIT (1 << 31)
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extern int i2c_read_reg(struct i2c_client *client, u32 addr, u8 *buf, u16 count);
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extern int i2c_write_reg(struct i2c_client *client, u32 addr, const u8 *buf, u16 count);
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extern struct bus_type i2c_bus;
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static inline int i2c_driver_register(struct driver_d *drv)
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{
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drv->bus = &i2c_bus;
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return register_driver(drv);
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}
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#endif /* I2C_I2C_H */
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