270 lines
7.2 KiB
C
270 lines
7.2 KiB
C
/*
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* Copyright (C) 2012 Sascha Hauer, Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <environment.h>
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#include <fcntl.h>
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#include <fec.h>
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#include <fs.h>
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#include <init.h>
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#include <nand.h>
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#include <net.h>
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#include <partition.h>
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#include <sizes.h>
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#include <generated/mach-types.h>
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#include <mach/imx53-regs.h>
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#include <mach/iomux-mx53.h>
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#include <mach/devices-imx53.h>
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#include <mach/generic.h>
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#include <mach/gpio.h>
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#include <mach/imx-nand.h>
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#include <mach/iim.h>
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#include <mach/imx5.h>
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#include <mach/imx-flash-header.h>
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#include <mach/bbu.h>
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#include <asm/armlinux.h>
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#include <io.h>
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#include <asm/mmu.h>
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static struct fec_platform_data fec_info = {
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.xcv_type = PHY_INTERFACE_MODE_RMII,
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};
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static iomux_v3_cfg_t tx53_pads[] = {
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/* UART1 */
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MX53_PAD_PATA_DIOW__UART1_TXD_MUX,
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MX53_PAD_PATA_DMACK__UART1_RXD_MUX,
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MX53_PAD_PATA_DMARQ__UART2_TXD_MUX,
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MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX,
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MX53_PAD_PATA_CS_0__UART3_TXD_MUX,
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MX53_PAD_PATA_CS_1__UART3_RXD_MUX,
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/* setup FEC PHY pins for GPIO function */
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MX53_PAD_FEC_REF_CLK__GPIO1_23,
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MX53_PAD_FEC_MDC__GPIO1_31,
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MX53_PAD_FEC_MDIO__GPIO1_22,
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MX53_PAD_FEC_RXD0__GPIO1_27,
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MX53_PAD_FEC_RXD1__GPIO1_26,
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MX53_PAD_FEC_RX_ER__GPIO1_24,
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MX53_PAD_FEC_TX_EN__GPIO1_28,
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MX53_PAD_FEC_TXD0__GPIO1_30,
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MX53_PAD_FEC_TXD1__GPIO1_29,
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MX53_PAD_FEC_CRS_DV__GPIO1_25,
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/* FEC PHY reset */
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MX53_PAD_PATA_DA_0__GPIO7_6,
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/* FEC PHY power */
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MX53_PAD_EIM_D20__GPIO3_20,
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/* SD1 */
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MX53_PAD_SD1_CMD__ESDHC1_CMD,
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MX53_PAD_SD1_CLK__ESDHC1_CLK,
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MX53_PAD_SD1_DATA0__ESDHC1_DAT0,
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MX53_PAD_SD1_DATA1__ESDHC1_DAT1,
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MX53_PAD_SD1_DATA2__ESDHC1_DAT2,
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MX53_PAD_SD1_DATA3__ESDHC1_DAT3,
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/* SD1_CD */
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MX53_PAD_EIM_D24__GPIO3_24,
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MX53_PAD_GPIO_3__I2C3_SCL,
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MX53_PAD_GPIO_6__I2C3_SDA,
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MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12,
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MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13,
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MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14,
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MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15,
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MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16,
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MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17,
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MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18,
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MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19,
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MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC,
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MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC,
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MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK,
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};
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#define TX53_SD1_CD IMX_GPIO_NR(3, 24)
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static struct esdhc_platform_data tx53_sd1_data = {
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.cd_gpio = TX53_SD1_CD,
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.cd_type = ESDHC_CD_GPIO,
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.wp_type = ESDHC_WP_NONE,
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};
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struct imx_nand_platform_data nand_info = {
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.width = 1,
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.hw_ecc = 1,
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.flash_bbt = 1,
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};
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#define FEC_POWER_GPIO IMX_GPIO_NR(3, 20)
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#define FEC_RESET_GPIO IMX_GPIO_NR(7, 6)
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static struct tx53_fec_gpio_setup {
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iomux_v3_cfg_t pad;
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unsigned gpio:9,
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dir:1,
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level:1;
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} tx53_fec_gpios[] = {
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{ MX53_PAD_PATA_DA_0__GPIO7_6, FEC_RESET_GPIO, 1, 0, }, /* PHY reset */
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{ MX53_PAD_EIM_D20__GPIO3_20, FEC_POWER_GPIO, 1, 1, }, /* PHY power enable */
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{ MX53_PAD_FEC_REF_CLK__GPIO1_23, IMX_GPIO_NR(1, 23), 0, }, /* ENET_CLK */
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{ MX53_PAD_FEC_MDC__GPIO1_31, IMX_GPIO_NR(1, 31), 1, 0, }, /* MDC */
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{ MX53_PAD_FEC_MDIO__GPIO1_22, IMX_GPIO_NR(1, 22), 1, 0, }, /* MDIO */
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{ MX53_PAD_FEC_RXD0__GPIO1_27, IMX_GPIO_NR(1, 27), 1, 1, }, /* Mode0/RXD0 */
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{ MX53_PAD_FEC_RXD1__GPIO1_26, IMX_GPIO_NR(1, 26), 1, 1, }, /* Mode1/RXD1 */
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{ MX53_PAD_FEC_RX_ER__GPIO1_24, IMX_GPIO_NR(1, 24), 0, }, /* RX_ER */
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{ MX53_PAD_FEC_TX_EN__GPIO1_28, IMX_GPIO_NR(1, 28), 1, 0, }, /* TX_EN */
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{ MX53_PAD_FEC_TXD0__GPIO1_30, IMX_GPIO_NR(1, 30), 1, 0, }, /* TXD0 */
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{ MX53_PAD_FEC_TXD1__GPIO1_29, IMX_GPIO_NR(1, 29), 1, 0, }, /* TXD1 */
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{ MX53_PAD_FEC_CRS_DV__GPIO1_25, IMX_GPIO_NR(1, 25), 1, 1, }, /* Mode2/CRS_DV */
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};
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static iomux_v3_cfg_t tx53_fec_pads[] = {
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MX53_PAD_FEC_REF_CLK__FEC_TX_CLK,
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MX53_PAD_FEC_MDC__FEC_MDC,
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MX53_PAD_FEC_MDIO__FEC_MDIO,
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MX53_PAD_FEC_RXD0__FEC_RDATA_0,
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MX53_PAD_FEC_RXD1__FEC_RDATA_1,
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MX53_PAD_FEC_RX_ER__FEC_RX_ER,
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MX53_PAD_FEC_TX_EN__FEC_TX_EN,
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MX53_PAD_FEC_TXD0__FEC_TDATA_0,
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MX53_PAD_FEC_TXD1__FEC_TDATA_1,
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MX53_PAD_FEC_CRS_DV__FEC_RX_DV,
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};
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static inline void tx53_fec_init(void)
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{
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int i;
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/* Configure LAN8700 pads as GPIO and set up
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* necessary strap options for PHY
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*/
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for (i = 0; i < ARRAY_SIZE(tx53_fec_gpios); i++) {
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struct tx53_fec_gpio_setup *gs = &tx53_fec_gpios[i];
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if (gs->dir)
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gpio_direction_output(gs->gpio, gs->level);
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else
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gpio_direction_input(gs->gpio);
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mxc_iomux_v3_setup_pad(gs->pad);
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}
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/*
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*Turn on phy power, leave in reset state
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*/
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gpio_set_value(FEC_POWER_GPIO, 1);
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/*
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* Wait some time to let the phy activate the internal regulator
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*/
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mdelay(10);
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/*
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* Deassert reset, phy latches the rest of bootstrap pins
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*/
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gpio_set_value(FEC_RESET_GPIO, 1);
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/* LAN7800 has an internal Power On Reset (POR) signal (OR'ed with
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* the external RESET signal) which is deactivated 21ms after
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* power on and latches the strap options.
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* Delay for 22ms to ensure, that the internal POR is inactive
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* before reconfiguring the strap pins.
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*/
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mdelay(22);
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/*
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* The phy is ready, now configure imx51 pads for fec operation
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*/
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mxc_iomux_v3_setup_multiple_pads(tx53_fec_pads,
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ARRAY_SIZE(tx53_fec_pads));
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}
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#define DCD_NAME_1011 static struct imx_dcd_v2_entry dcd_entry_1011
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#include "dcd-data-1011.h"
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#define DCD_NAME_XX30 static u32 dcd_entry_xx30
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#include "dcd-data-xx30.h"
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static int tx53_devices_init(void)
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{
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imx53_iim_register_fec_ethaddr();
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tx53_fec_init();
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imx53_add_fec(&fec_info);
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imx53_add_mmc0(&tx53_sd1_data);
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imx53_add_nand(&nand_info);
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armlinux_set_bootparams((void *)0x70000100);
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armlinux_set_architecture(MACH_TYPE_TX53);
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/* rev xx30 can boot from nand or USB */
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imx53_bbu_internal_nand_register_handler("nand-xx30",
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BBU_HANDLER_FLAG_DEFAULT, (void *)dcd_entry_xx30,
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sizeof(dcd_entry_xx30), SZ_512K, 0);
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/* rev 1011 can boot from MMC/SD, other bootsource currently unknown */
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imx53_bbu_internal_mmc_register_handler("mmc-1011", "/dev/disk0",
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0, (void *)dcd_entry_1011, sizeof(dcd_entry_1011), 0);
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return 0;
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}
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device_initcall(tx53_devices_init);
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static int tx53_part_init(void)
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{
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const char *envdev;
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switch (imx_bootsource()) {
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case bootsource_mmc:
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devfs_add_partition("disk0", 0x00000, SZ_512K, DEVFS_PARTITION_FIXED, "self0");
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devfs_add_partition("disk0", SZ_512K, SZ_1M, DEVFS_PARTITION_FIXED, "env0");
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envdev = "MMC";
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break;
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case bootsource_nand:
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default:
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devfs_add_partition("nand0", 0x00000, 0x80000, DEVFS_PARTITION_FIXED, "self_raw");
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dev_add_bb_dev("self_raw", "self0");
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devfs_add_partition("nand0", 0x80000, 0x100000, DEVFS_PARTITION_FIXED, "env_raw");
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dev_add_bb_dev("env_raw", "env0");
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envdev = "NAND";
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break;
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}
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printf("Using environment in %s\n", envdev);
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return 0;
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}
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late_initcall(tx53_part_init);
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static int tx53_console_init(void)
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{
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mxc_iomux_v3_setup_multiple_pads(tx53_pads, ARRAY_SIZE(tx53_pads));
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if (!IS_ENABLED(CONFIG_TX53_REV_XX30))
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imx53_init_lowlevel(1000);
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imx53_add_uart0();
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return 0;
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}
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console_initcall(tx53_console_init);
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