8ad5725465
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
1540 lines
38 KiB
C
1540 lines
38 KiB
C
/*
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* at91_udc -- driver for at91-series USB peripheral controller
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*
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* Copyright (C) 2004 by Thomas Rathbone
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* Copyright (C) 2005 by HP Labs
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* Copyright (C) 2005 by David Brownell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#undef VERBOSE_DEBUG
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#undef PACKET_TRACE
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#include <common.h>
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#include <errno.h>
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#include <init.h>
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#include <gpio.h>
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#include <clock.h>
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#include <usb/ch9.h>
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#include <usb/gadget.h>
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#include <poller.h>
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#include <gpio.h>
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#include <linux/list.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <asm/byteorder.h>
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#include <mach/hardware.h>
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#include <mach/io.h>
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#include <mach/board.h>
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#include <mach/cpu.h>
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#include <mach/at91sam9261_matrix.h>
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#include "at91_udc.h"
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/*
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* This controller is simple and PIO-only. It's used in many AT91-series
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* full speed USB controllers, including the at91rm9200 (arm920T, with MMU),
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* at91sam926x (arm926ejs, with MMU), and several no-mmu versions.
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*
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* This driver expects the board has been wired with two GPIOs suppporting
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* a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the
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* testing hasn't covered such cases.)
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*
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* The pullup is most important (so it's integrated on sam926x parts). It
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* provides software control over whether the host enumerates the device.
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*
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* The VBUS sensing helps during enumeration, and allows both USB clocks
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* (and the transceiver) to stay gated off until they're necessary, saving
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* power. During USB suspend, the 48 MHz clock is gated off in hardware;
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* it may also be gated off by software during some Linux sleep states.
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*/
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#define DRIVER_VERSION "3 May 2006"
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#define driver_name "at91_udc"
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static const char ep0name[] = "ep0";
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#define at91_udp_read(udc, reg) \
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__raw_readl((udc)->udp_baseaddr + (reg))
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#define at91_udp_write(udc, reg, val) \
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__raw_writel((val), (udc)->udp_baseaddr + (reg))
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/*-------------------------------------------------------------------------*/
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static void done(struct at91_ep *ep, struct at91_request *req, int status)
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{
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unsigned stopped = ep->stopped;
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struct at91_udc *udc = ep->udc;
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list_del_init(&req->queue);
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if (req->req.status == -EINPROGRESS)
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req->req.status = status;
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else
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status = req->req.status;
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if (status && status != -ESHUTDOWN)
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VDBG(udc, "%s done %p, status %d\n", ep->ep.name, req, status);
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ep->stopped = 1;
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req->req.complete(&ep->ep, &req->req);
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ep->stopped = stopped;
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/* ep0 is always ready; other endpoints need a non-empty queue */
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if (list_empty(&ep->queue) && ep->int_mask != (1 << 0))
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at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask);
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}
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/*-------------------------------------------------------------------------*/
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/* bits indicating OUT fifo has data ready */
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#define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1)
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/*
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* Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write
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* back most of the value you just read (because of side effects, including
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* bits that may change after reading and before writing).
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*
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* Except when changing a specific bit, always write values which:
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* - clear SET_FX bits (setting them could change something)
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* - set CLR_FX bits (clearing them could change something)
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*
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* There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE
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* that shouldn't normally be changed.
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*
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* NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains,
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* implying a need to wait for one write to complete (test relevant bits)
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* before starting the next write. This shouldn't be an issue given how
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* infrequently we write, except maybe for write-then-read idioms.
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*/
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#define SET_FX (AT91_UDP_TXPKTRDY)
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#define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \
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| AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)
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/* pull OUT packet data from the endpoint's fifo */
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static int read_fifo (struct at91_ep *ep, struct at91_request *req)
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{
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u32 __iomem *creg = ep->creg;
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u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
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u32 csr;
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u8 *buf;
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unsigned int count, bufferspace, is_done;
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buf = req->req.buf + req->req.actual;
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bufferspace = req->req.length - req->req.actual;
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/*
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* there might be nothing to read if ep_queue() calls us,
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* or if we already emptied both pingpong buffers
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*/
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rescan:
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csr = __raw_readl(creg);
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if ((csr & RX_DATA_READY) == 0)
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return 0;
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count = (csr & AT91_UDP_RXBYTECNT) >> 16;
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if (count > ep->ep.maxpacket)
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count = ep->ep.maxpacket;
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if (count > bufferspace) {
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DBG(ep->udc, "%s buffer overflow\n", ep->ep.name);
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req->req.status = -EOVERFLOW;
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count = bufferspace;
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}
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readsb(dreg, buf, count);
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/* release and swap pingpong mem bank */
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csr |= CLR_FX;
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if (ep->is_pingpong) {
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if (ep->fifo_bank == 0) {
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csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
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ep->fifo_bank = 1;
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} else {
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csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1);
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ep->fifo_bank = 0;
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}
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} else
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csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
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__raw_writel(csr, creg);
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req->req.actual += count;
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is_done = (count < ep->ep.maxpacket);
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if (count == bufferspace)
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is_done = 1;
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PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count,
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is_done ? " (done)" : "");
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/*
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* avoid extra trips through IRQ logic for packets already in
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* the fifo ... maybe preventing an extra (expensive) OUT-NAK
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*/
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if (is_done)
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done(ep, req, 0);
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else if (ep->is_pingpong) {
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/*
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* One dummy read to delay the code because of a HW glitch:
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* CSR returns bad RXCOUNT when read too soon after updating
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* RX_DATA_BK flags.
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*/
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csr = __raw_readl(creg);
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bufferspace -= count;
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buf += count;
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goto rescan;
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}
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return is_done;
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}
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/* load fifo for an IN packet */
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static int write_fifo(struct at91_ep *ep, struct at91_request *req)
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{
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u32 __iomem *creg = ep->creg;
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u32 csr = __raw_readl(creg);
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u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
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unsigned total, count, is_last;
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u8 *buf;
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/*
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* TODO: allow for writing two packets to the fifo ... that'll
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* reduce the amount of IN-NAKing, but probably won't affect
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* throughput much. (Unlike preventing OUT-NAKing!)
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*/
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/*
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* If ep_queue() calls us, the queue is empty and possibly in
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* odd states like TXCOMP not yet cleared (we do it, saving at
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* least one IRQ) or the fifo not yet being free. Those aren't
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* issues normally (IRQ handler fast path).
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*/
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if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) {
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if (csr & AT91_UDP_TXCOMP) {
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csr |= CLR_FX;
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csr &= ~(SET_FX | AT91_UDP_TXCOMP);
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__raw_writel(csr, creg);
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csr = __raw_readl(creg);
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}
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if (csr & AT91_UDP_TXPKTRDY)
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return 0;
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}
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buf = req->req.buf + req->req.actual;
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total = req->req.length - req->req.actual;
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if (ep->ep.maxpacket < total) {
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count = ep->ep.maxpacket;
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is_last = 0;
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} else {
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count = total;
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is_last = (count < ep->ep.maxpacket) || !req->req.zero;
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}
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/*
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* Write the packet, maybe it's a ZLP.
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*
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* NOTE: incrementing req->actual before we receive the ACK means
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* gadget driver IN bytecounts can be wrong in fault cases. That's
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* fixable with PIO drivers like this one (save "count" here, and
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* do the increment later on TX irq), but not for most DMA hardware.
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*
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* So all gadget drivers must accept that potential error. Some
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* hardware supports precise fifo status reporting, letting them
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* recover when the actual bytecount matters (e.g. for USB Test
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* and Measurement Class devices).
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*/
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writesb(dreg, buf, count);
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csr &= ~SET_FX;
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csr |= CLR_FX | AT91_UDP_TXPKTRDY;
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writel(csr, creg);
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req->req.actual += count;
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PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count,
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is_last ? " (done)" : "");
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if (is_last)
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done(ep, req, 0);
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return is_last;
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}
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static void nuke(struct at91_ep *ep, int status)
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{
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struct at91_request *req;
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/* terminate any request in the queue */
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ep->stopped = 1;
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if (list_empty(&ep->queue))
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return;
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VDBG(udc, "%s %s\n", __func__, ep->ep.name);
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while (!list_empty(&ep->queue)) {
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req = list_entry(ep->queue.next, struct at91_request, queue);
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done(ep, req, status);
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}
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}
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/*-------------------------------------------------------------------------*/
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static int at91_ep_enable(struct usb_ep *_ep,
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const struct usb_endpoint_descriptor *desc)
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{
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struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
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struct at91_udc *udc = ep->udc;
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u16 maxpacket;
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u32 tmp;
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if (!_ep || !ep
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|| !desc || ep->desc
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|| _ep->name == ep0name
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|| desc->bDescriptorType != USB_DT_ENDPOINT
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|| (maxpacket = le16_to_cpu(desc->wMaxPacketSize)) == 0
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|| maxpacket > ep->maxpacket) {
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DBG(udc, "bad ep or descriptor\n");
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return -EINVAL;
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}
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if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
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DBG(udc, "bogus device state\n");
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return -ESHUTDOWN;
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}
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tmp = usb_endpoint_type(desc);
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switch (tmp) {
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case USB_ENDPOINT_XFER_CONTROL:
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DBG(udc, "only one control endpoint\n");
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return -EINVAL;
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case USB_ENDPOINT_XFER_INT:
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if (maxpacket > 64)
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goto bogus_max;
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break;
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case USB_ENDPOINT_XFER_BULK:
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switch (maxpacket) {
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case 8:
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case 16:
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case 32:
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case 64:
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goto ok;
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}
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bogus_max:
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DBG(udc, "bogus maxpacket %d\n", maxpacket);
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return -EINVAL;
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case USB_ENDPOINT_XFER_ISOC:
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if (!ep->is_pingpong) {
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DBG(udc, "iso requires double buffering\n");
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return -EINVAL;
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}
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break;
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}
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ok:
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/* initialize endpoint to match this descriptor */
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ep->is_in = usb_endpoint_dir_in(desc);
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ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC);
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ep->stopped = 0;
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if (ep->is_in)
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tmp |= 0x04;
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tmp <<= 8;
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tmp |= AT91_UDP_EPEDS;
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__raw_writel(tmp, ep->creg);
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ep->desc = desc;
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ep->ep.maxpacket = maxpacket;
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/*
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* reset/init endpoint fifo. NOTE: leaves fifo_bank alone,
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* since endpoint resets don't reset hw pingpong state.
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*/
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at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
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at91_udp_write(udc, AT91_UDP_RST_EP, 0);
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return 0;
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}
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static int at91_ep_disable (struct usb_ep * _ep)
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{
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struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
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struct at91_udc *udc = ep->udc;
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if (ep == &ep->udc->ep[0])
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return -EINVAL;
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nuke(ep, -ESHUTDOWN);
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/* restore the endpoint's pristine config */
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ep->desc = NULL;
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ep->ep.maxpacket = ep->maxpacket;
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/* reset fifos and endpoint */
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if (ep->udc->clocked) {
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at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
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at91_udp_write(udc, AT91_UDP_RST_EP, 0);
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__raw_writel(0, ep->creg);
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}
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return 0;
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}
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/*
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* this is a PIO-only driver, so there's nothing
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* interesting for request or buffer allocation.
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*/
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static struct usb_request *
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at91_ep_alloc_request(struct usb_ep *_ep)
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{
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struct at91_request *req;
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req = xzalloc(sizeof *req);
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INIT_LIST_HEAD(&req->queue);
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return &req->req;
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}
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static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
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{
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struct at91_request *req;
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req = container_of(_req, struct at91_request, req);
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BUG_ON(!list_empty(&req->queue));
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kfree(req);
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}
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|
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static int at91_ep_queue(struct usb_ep *_ep,
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struct usb_request *_req)
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{
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struct at91_request *req;
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struct at91_ep *ep;
|
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struct at91_udc *udc;
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int status;
|
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|
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req = container_of(_req, struct at91_request, req);
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ep = container_of(_ep, struct at91_ep, ep);
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|
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if (!_req || !_req->complete
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|| !_req->buf || !list_empty(&req->queue)) {
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DBG(udc, "invalid request\n");
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return -EINVAL;
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}
|
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if (!_ep || (!ep->desc && ep->ep.name != ep0name)) {
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DBG(udc, "invalid ep\n");
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return -EINVAL;
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}
|
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|
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udc = ep->udc;
|
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|
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if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
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DBG(udc, "invalid device\n");
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return -EINVAL;
|
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}
|
|
|
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_req->status = -EINPROGRESS;
|
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_req->actual = 0;
|
|
|
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/* try to kickstart any empty and idle queue */
|
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if (list_empty(&ep->queue) && !ep->stopped) {
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int is_ep0;
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|
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/*
|
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* If this control request has a non-empty DATA stage, this
|
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* will start that stage. It works just like a non-control
|
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* request (until the status stage starts, maybe early).
|
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*
|
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* If the data stage is empty, then this starts a successful
|
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* IN/STATUS stage. (Unsuccessful ones use set_halt.)
|
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*/
|
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is_ep0 = (ep->ep.name == ep0name);
|
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if (is_ep0) {
|
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u32 tmp;
|
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|
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if (!udc->req_pending) {
|
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status = -EINVAL;
|
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goto done;
|
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}
|
|
|
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/*
|
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* defer changing CONFG until after the gadget driver
|
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* reconfigures the endpoints.
|
|
*/
|
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if (udc->wait_for_config_ack) {
|
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tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
|
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tmp ^= AT91_UDP_CONFG;
|
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VDBG(udc, "toggle config\n");
|
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at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
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}
|
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if (req->req.length == 0) {
|
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ep0_in_status:
|
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PACKET("ep0 in/status\n");
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status = 0;
|
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tmp = __raw_readl(ep->creg);
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tmp &= ~SET_FX;
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tmp |= CLR_FX | AT91_UDP_TXPKTRDY;
|
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__raw_writel(tmp, ep->creg);
|
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udc->req_pending = 0;
|
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goto done;
|
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}
|
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}
|
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|
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if (ep->is_in)
|
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status = write_fifo(ep, req);
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else {
|
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status = read_fifo(ep, req);
|
|
|
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/* IN/STATUS stage is otherwise triggered by irq */
|
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if (status && is_ep0)
|
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goto ep0_in_status;
|
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}
|
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} else
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status = 0;
|
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|
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if (req && !status) {
|
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list_add_tail (&req->queue, &ep->queue);
|
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}
|
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done:
|
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return (status < 0) ? status : 0;
|
|
}
|
|
|
|
static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
|
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{
|
|
struct at91_ep *ep;
|
|
struct at91_request *req;
|
|
|
|
ep = container_of(_ep, struct at91_ep, ep);
|
|
if (!_ep || ep->ep.name == ep0name)
|
|
return -EINVAL;
|
|
|
|
/* make sure it's actually queued on this endpoint */
|
|
list_for_each_entry (req, &ep->queue, queue) {
|
|
if (&req->req == _req)
|
|
break;
|
|
}
|
|
if (&req->req != _req) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
done(ep, req, -ECONNRESET);
|
|
return 0;
|
|
}
|
|
|
|
static int at91_ep_set_halt(struct usb_ep *_ep, int value)
|
|
{
|
|
struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
|
|
struct at91_udc *udc = ep->udc;
|
|
u32 __iomem *creg;
|
|
u32 csr;
|
|
int status = 0;
|
|
|
|
if (!_ep || ep->is_iso || !ep->udc->clocked)
|
|
return -EINVAL;
|
|
|
|
creg = ep->creg;
|
|
|
|
csr = __raw_readl(creg);
|
|
|
|
/*
|
|
* fail with still-busy IN endpoints, ensuring correct sequencing
|
|
* of data tx then stall. note that the fifo rx bytecount isn't
|
|
* completely accurate as a tx bytecount.
|
|
*/
|
|
if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0))
|
|
status = -EAGAIN;
|
|
else {
|
|
csr |= CLR_FX;
|
|
csr &= ~SET_FX;
|
|
if (value) {
|
|
csr |= AT91_UDP_FORCESTALL;
|
|
VDBG(udc, "halt %s\n", ep->ep.name);
|
|
} else {
|
|
at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
|
|
at91_udp_write(udc, AT91_UDP_RST_EP, 0);
|
|
csr &= ~AT91_UDP_FORCESTALL;
|
|
}
|
|
__raw_writel(csr, creg);
|
|
}
|
|
|
|
return status;
|
|
}
|
|
|
|
static const struct usb_ep_ops at91_ep_ops = {
|
|
.enable = at91_ep_enable,
|
|
.disable = at91_ep_disable,
|
|
.alloc_request = at91_ep_alloc_request,
|
|
.free_request = at91_ep_free_request,
|
|
.queue = at91_ep_queue,
|
|
.dequeue = at91_ep_dequeue,
|
|
.set_halt = at91_ep_set_halt,
|
|
/* there's only imprecise fifo status reporting */
|
|
};
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
static int at91_get_frame(struct usb_gadget *gadget)
|
|
{
|
|
struct at91_udc *udc = to_udc(gadget);
|
|
|
|
if (!to_udc(gadget)->clocked)
|
|
return -EINVAL;
|
|
return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM;
|
|
}
|
|
|
|
static int at91_wakeup(struct usb_gadget *gadget)
|
|
{
|
|
struct at91_udc *udc = to_udc(gadget);
|
|
u32 glbstate;
|
|
int status = -EINVAL;
|
|
|
|
DBG(udc, "%s\n", __func__ );
|
|
|
|
if (!udc->clocked || !udc->suspended)
|
|
goto done;
|
|
|
|
/* NOTE: some "early versions" handle ESR differently ... */
|
|
|
|
glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT);
|
|
if (!(glbstate & AT91_UDP_ESR))
|
|
goto done;
|
|
glbstate |= AT91_UDP_ESR;
|
|
at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate);
|
|
|
|
done:
|
|
return status;
|
|
}
|
|
|
|
/* reinit == restore initial software state */
|
|
static void udc_reinit(struct at91_udc *udc)
|
|
{
|
|
u32 i;
|
|
|
|
INIT_LIST_HEAD(&udc->gadget.ep_list);
|
|
INIT_LIST_HEAD(&udc->gadget.ep0->ep_list);
|
|
|
|
for (i = 0; i < NUM_ENDPOINTS; i++) {
|
|
struct at91_ep *ep = &udc->ep[i];
|
|
|
|
if (i != 0)
|
|
list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
|
|
ep->desc = NULL;
|
|
ep->stopped = 0;
|
|
ep->fifo_bank = 0;
|
|
ep->ep.maxpacket = ep->maxpacket;
|
|
ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i);
|
|
/* initialize one queue per endpoint */
|
|
INIT_LIST_HEAD(&ep->queue);
|
|
}
|
|
}
|
|
|
|
static void stop_activity(struct at91_udc *udc)
|
|
{
|
|
struct usb_gadget_driver *driver = udc->driver;
|
|
int i;
|
|
|
|
if (udc->gadget.speed == USB_SPEED_UNKNOWN)
|
|
driver = NULL;
|
|
udc->gadget.speed = USB_SPEED_UNKNOWN;
|
|
udc->suspended = 0;
|
|
|
|
for (i = 0; i < NUM_ENDPOINTS; i++) {
|
|
struct at91_ep *ep = &udc->ep[i];
|
|
ep->stopped = 1;
|
|
nuke(ep, -ESHUTDOWN);
|
|
}
|
|
if (driver) {
|
|
driver->disconnect(&udc->gadget);
|
|
}
|
|
|
|
udc_reinit(udc);
|
|
}
|
|
|
|
static void clk_on(struct at91_udc *udc)
|
|
{
|
|
if (udc->clocked)
|
|
return;
|
|
udc->clocked = 1;
|
|
clk_enable(udc->iclk);
|
|
clk_enable(udc->fclk);
|
|
}
|
|
|
|
static void clk_off(struct at91_udc *udc)
|
|
{
|
|
if (!udc->clocked)
|
|
return;
|
|
udc->clocked = 0;
|
|
udc->gadget.speed = USB_SPEED_UNKNOWN;
|
|
clk_disable(udc->fclk);
|
|
clk_disable(udc->iclk);
|
|
}
|
|
|
|
/*
|
|
* activate/deactivate link with host; minimize power usage for
|
|
* inactive links by cutting clocks and transceiver power.
|
|
*/
|
|
static void pullup(struct at91_udc *udc, int is_on)
|
|
{
|
|
int active = !udc->board.pullup_active_low;
|
|
|
|
if (!udc->enabled || !udc->vbus)
|
|
is_on = 0;
|
|
DBG(udc, "%sactive\n", is_on ? "" : "in");
|
|
|
|
if (is_on) {
|
|
clk_on(udc);
|
|
at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM);
|
|
at91_udp_write(udc, AT91_UDP_TXVC, 0);
|
|
if (cpu_is_at91rm9200())
|
|
gpio_set_value(udc->board.pullup_pin, active);
|
|
else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) {
|
|
u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
|
|
|
|
txvc |= AT91_UDP_TXVC_PUON;
|
|
at91_udp_write(udc, AT91_UDP_TXVC, txvc);
|
|
} else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) {
|
|
u32 usbpucr;
|
|
usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR);
|
|
usbpucr |= AT91_MATRIX_USBPUCR_PUON;
|
|
at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr);
|
|
}
|
|
} else {
|
|
stop_activity(udc);
|
|
at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM);
|
|
at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
|
|
if (cpu_is_at91rm9200())
|
|
gpio_set_value(udc->board.pullup_pin, !active);
|
|
else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) {
|
|
u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
|
|
|
|
txvc &= ~AT91_UDP_TXVC_PUON;
|
|
at91_udp_write(udc, AT91_UDP_TXVC, txvc);
|
|
} else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) {
|
|
u32 usbpucr;
|
|
usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR);
|
|
usbpucr &= ~AT91_MATRIX_USBPUCR_PUON;
|
|
at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr);
|
|
}
|
|
clk_off(udc);
|
|
}
|
|
}
|
|
|
|
/* vbus is here! turn everything on that's ready */
|
|
static int at91_vbus_session(struct usb_gadget *gadget, int is_active)
|
|
{
|
|
struct at91_udc *udc = to_udc(gadget);
|
|
|
|
/* VDBG(udc, "vbus %s\n", is_active ? "on" : "off"); */
|
|
udc->vbus = (is_active != 0);
|
|
if (udc->driver)
|
|
pullup(udc, is_active);
|
|
else
|
|
pullup(udc, 0);
|
|
return 0;
|
|
}
|
|
|
|
static int at91_pullup(struct usb_gadget *gadget, int is_on)
|
|
{
|
|
struct at91_udc *udc = to_udc(gadget);
|
|
|
|
udc->enabled = is_on = !!is_on;
|
|
pullup(udc, is_on);
|
|
return 0;
|
|
}
|
|
|
|
static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on)
|
|
{
|
|
struct at91_udc *udc = to_udc(gadget);
|
|
|
|
udc->selfpowered = (is_on != 0);
|
|
return 0;
|
|
}
|
|
|
|
static const struct usb_gadget_ops at91_udc_ops = {
|
|
.get_frame = at91_get_frame,
|
|
.wakeup = at91_wakeup,
|
|
.set_selfpowered = at91_set_selfpowered,
|
|
.vbus_session = at91_vbus_session,
|
|
.pullup = at91_pullup,
|
|
|
|
/*
|
|
* VBUS-powered devices may also also want to support bigger
|
|
* power budgets after an appropriate SET_CONFIGURATION.
|
|
*/
|
|
/* .vbus_power = at91_vbus_power, */
|
|
};
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
static int handle_ep(struct at91_ep *ep)
|
|
{
|
|
struct at91_request *req;
|
|
u32 __iomem *creg = ep->creg;
|
|
u32 csr = __raw_readl(creg);
|
|
|
|
if (!list_empty(&ep->queue))
|
|
req = list_entry(ep->queue.next,
|
|
struct at91_request, queue);
|
|
else
|
|
req = NULL;
|
|
|
|
if (ep->is_in) {
|
|
if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) {
|
|
csr |= CLR_FX;
|
|
csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP);
|
|
__raw_writel(csr, creg);
|
|
}
|
|
if (req)
|
|
return write_fifo(ep, req);
|
|
|
|
} else {
|
|
if (csr & AT91_UDP_STALLSENT) {
|
|
/* STALLSENT bit == ISOERR */
|
|
if (ep->is_iso && req)
|
|
req->req.status = -EILSEQ;
|
|
csr |= CLR_FX;
|
|
csr &= ~(SET_FX | AT91_UDP_STALLSENT);
|
|
__raw_writel(csr, creg);
|
|
csr = __raw_readl(creg);
|
|
}
|
|
if (req && (csr & RX_DATA_READY))
|
|
return read_fifo(ep, req);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
union setup {
|
|
u8 raw[8];
|
|
struct usb_ctrlrequest r;
|
|
};
|
|
|
|
static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
|
|
{
|
|
u32 __iomem *creg = ep->creg;
|
|
u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
|
|
unsigned rxcount, i = 0;
|
|
u32 tmp;
|
|
union setup pkt;
|
|
int status = 0;
|
|
|
|
/* read and ack SETUP; hard-fail for bogus packets */
|
|
rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16;
|
|
if (likely(rxcount == 8)) {
|
|
while (rxcount--)
|
|
pkt.raw[i++] = __raw_readb(dreg);
|
|
if (pkt.r.bRequestType & USB_DIR_IN) {
|
|
csr |= AT91_UDP_DIR;
|
|
ep->is_in = 1;
|
|
} else {
|
|
csr &= ~AT91_UDP_DIR;
|
|
ep->is_in = 0;
|
|
}
|
|
} else {
|
|
/* REVISIT this happens sometimes under load; why?? */
|
|
ERR(udc, "SETUP len %d, csr %08x\n", rxcount, csr);
|
|
status = -EINVAL;
|
|
}
|
|
csr |= CLR_FX;
|
|
csr &= ~(SET_FX | AT91_UDP_RXSETUP);
|
|
__raw_writel(csr, creg);
|
|
udc->wait_for_addr_ack = 0;
|
|
udc->wait_for_config_ack = 0;
|
|
ep->stopped = 0;
|
|
if (unlikely(status != 0))
|
|
goto stall;
|
|
|
|
#define w_index le16_to_cpu(pkt.r.wIndex)
|
|
#define w_value le16_to_cpu(pkt.r.wValue)
|
|
#define w_length le16_to_cpu(pkt.r.wLength)
|
|
|
|
VDBG(udc, "SETUP %02x.%02x v%04x i%04x l%04x\n",
|
|
pkt.r.bRequestType, pkt.r.bRequest,
|
|
w_value, w_index, w_length);
|
|
|
|
/*
|
|
* A few standard requests get handled here, ones that touch
|
|
* hardware ... notably for device and endpoint features.
|
|
*/
|
|
udc->req_pending = 1;
|
|
csr = __raw_readl(creg);
|
|
csr |= CLR_FX;
|
|
csr &= ~SET_FX;
|
|
switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) {
|
|
|
|
case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
|
|
| USB_REQ_SET_ADDRESS:
|
|
__raw_writel(csr | AT91_UDP_TXPKTRDY, creg);
|
|
udc->addr = w_value;
|
|
udc->wait_for_addr_ack = 1;
|
|
udc->req_pending = 0;
|
|
/* FADDR is set later, when we ack host STATUS */
|
|
return;
|
|
|
|
case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
|
|
| USB_REQ_SET_CONFIGURATION:
|
|
tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG;
|
|
if (pkt.r.wValue)
|
|
udc->wait_for_config_ack = (tmp == 0);
|
|
else
|
|
udc->wait_for_config_ack = (tmp != 0);
|
|
if (udc->wait_for_config_ack)
|
|
VDBG(udc, "wait for config\n");
|
|
/* CONFG is toggled later, if gadget driver succeeds */
|
|
break;
|
|
|
|
/*
|
|
* Hosts may set or clear remote wakeup status, and
|
|
* devices may report they're VBUS powered.
|
|
*/
|
|
case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
|
|
| USB_REQ_GET_STATUS:
|
|
tmp = (udc->selfpowered << USB_DEVICE_SELF_POWERED);
|
|
if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR)
|
|
tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP);
|
|
PACKET("get device status\n");
|
|
__raw_writeb(tmp, dreg);
|
|
__raw_writeb(0, dreg);
|
|
goto write_in;
|
|
/* then STATUS starts later, automatically */
|
|
case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
|
|
| USB_REQ_SET_FEATURE:
|
|
if (w_value != USB_DEVICE_REMOTE_WAKEUP)
|
|
goto stall;
|
|
tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
|
|
tmp |= AT91_UDP_ESR;
|
|
at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
|
|
goto succeed;
|
|
case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
|
|
| USB_REQ_CLEAR_FEATURE:
|
|
if (w_value != USB_DEVICE_REMOTE_WAKEUP)
|
|
goto stall;
|
|
tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
|
|
tmp &= ~AT91_UDP_ESR;
|
|
at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
|
|
goto succeed;
|
|
|
|
/*
|
|
* Interfaces have no feature settings; this is pretty useless.
|
|
* we won't even insist the interface exists...
|
|
*/
|
|
case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
|
|
| USB_REQ_GET_STATUS:
|
|
PACKET("get interface status\n");
|
|
__raw_writeb(0, dreg);
|
|
__raw_writeb(0, dreg);
|
|
goto write_in;
|
|
/* then STATUS starts later, automatically */
|
|
case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
|
|
| USB_REQ_SET_FEATURE:
|
|
case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
|
|
| USB_REQ_CLEAR_FEATURE:
|
|
goto stall;
|
|
|
|
/*
|
|
* Hosts may clear bulk/intr endpoint halt after the gadget
|
|
* driver sets it (not widely used); or set it (for testing)
|
|
*/
|
|
case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
|
|
| USB_REQ_GET_STATUS:
|
|
tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
|
|
ep = &udc->ep[tmp];
|
|
if (tmp >= NUM_ENDPOINTS || (tmp && !ep->desc))
|
|
goto stall;
|
|
|
|
if (tmp) {
|
|
if ((w_index & USB_DIR_IN)) {
|
|
if (!ep->is_in)
|
|
goto stall;
|
|
} else if (ep->is_in)
|
|
goto stall;
|
|
}
|
|
PACKET("get %s status\n", ep->ep.name);
|
|
if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL)
|
|
tmp = (1 << USB_ENDPOINT_HALT);
|
|
else
|
|
tmp = 0;
|
|
__raw_writeb(tmp, dreg);
|
|
__raw_writeb(0, dreg);
|
|
goto write_in;
|
|
/* then STATUS starts later, automatically */
|
|
case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
|
|
| USB_REQ_SET_FEATURE:
|
|
tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
|
|
ep = &udc->ep[tmp];
|
|
if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS)
|
|
goto stall;
|
|
if (!ep->desc || ep->is_iso)
|
|
goto stall;
|
|
if ((w_index & USB_DIR_IN)) {
|
|
if (!ep->is_in)
|
|
goto stall;
|
|
} else if (ep->is_in)
|
|
goto stall;
|
|
|
|
tmp = __raw_readl(ep->creg);
|
|
tmp &= ~SET_FX;
|
|
tmp |= CLR_FX | AT91_UDP_FORCESTALL;
|
|
__raw_writel(tmp, ep->creg);
|
|
goto succeed;
|
|
case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
|
|
| USB_REQ_CLEAR_FEATURE:
|
|
tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
|
|
ep = &udc->ep[tmp];
|
|
if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS)
|
|
goto stall;
|
|
if (tmp == 0)
|
|
goto succeed;
|
|
if (!ep->desc || ep->is_iso)
|
|
goto stall;
|
|
if ((w_index & USB_DIR_IN)) {
|
|
if (!ep->is_in)
|
|
goto stall;
|
|
} else if (ep->is_in)
|
|
goto stall;
|
|
|
|
at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
|
|
at91_udp_write(udc, AT91_UDP_RST_EP, 0);
|
|
tmp = __raw_readl(ep->creg);
|
|
tmp |= CLR_FX;
|
|
tmp &= ~(SET_FX | AT91_UDP_FORCESTALL);
|
|
__raw_writel(tmp, ep->creg);
|
|
if (!list_empty(&ep->queue))
|
|
handle_ep(ep);
|
|
goto succeed;
|
|
}
|
|
|
|
#undef w_value
|
|
#undef w_index
|
|
#undef w_length
|
|
|
|
/* pass request up to the gadget driver */
|
|
if (udc->driver) {
|
|
status = udc->driver->setup(&udc->gadget, &pkt.r);
|
|
}
|
|
else
|
|
status = -ENODEV;
|
|
if (status < 0) {
|
|
stall:
|
|
VDBG(udc, "req %02x.%02x protocol STALL; stat %d\n",
|
|
pkt.r.bRequestType, pkt.r.bRequest, status);
|
|
csr |= AT91_UDP_FORCESTALL;
|
|
__raw_writel(csr, creg);
|
|
udc->req_pending = 0;
|
|
}
|
|
return;
|
|
|
|
succeed:
|
|
/* immediate successful (IN) STATUS after zero length DATA */
|
|
PACKET("ep0 in/status\n");
|
|
write_in:
|
|
csr |= AT91_UDP_TXPKTRDY;
|
|
__raw_writel(csr, creg);
|
|
udc->req_pending = 0;
|
|
}
|
|
|
|
static void handle_ep0(struct at91_udc *udc)
|
|
{
|
|
struct at91_ep *ep0 = &udc->ep[0];
|
|
u32 __iomem *creg = ep0->creg;
|
|
u32 csr = __raw_readl(creg);
|
|
struct at91_request *req;
|
|
|
|
if (unlikely(csr & AT91_UDP_STALLSENT)) {
|
|
nuke(ep0, -EPROTO);
|
|
udc->req_pending = 0;
|
|
csr |= CLR_FX;
|
|
csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL);
|
|
__raw_writel(csr, creg);
|
|
VDBG(udc, "ep0 stalled\n");
|
|
csr = __raw_readl(creg);
|
|
}
|
|
if (csr & AT91_UDP_RXSETUP) {
|
|
nuke(ep0, 0);
|
|
udc->req_pending = 0;
|
|
handle_setup(udc, ep0, csr);
|
|
return;
|
|
}
|
|
|
|
if (list_empty(&ep0->queue))
|
|
req = NULL;
|
|
else
|
|
req = list_entry(ep0->queue.next, struct at91_request, queue);
|
|
|
|
/* host ACKed an IN packet that we sent */
|
|
if (csr & AT91_UDP_TXCOMP) {
|
|
csr |= CLR_FX;
|
|
csr &= ~(SET_FX | AT91_UDP_TXCOMP);
|
|
|
|
/* write more IN DATA? */
|
|
if (req && ep0->is_in) {
|
|
if (handle_ep(ep0))
|
|
udc->req_pending = 0;
|
|
|
|
/*
|
|
* Ack after:
|
|
* - last IN DATA packet (including GET_STATUS)
|
|
* - IN/STATUS for OUT DATA
|
|
* - IN/STATUS for any zero-length DATA stage
|
|
* except for the IN DATA case, the host should send
|
|
* an OUT status later, which we'll ack.
|
|
*/
|
|
} else {
|
|
udc->req_pending = 0;
|
|
__raw_writel(csr, creg);
|
|
|
|
/*
|
|
* SET_ADDRESS takes effect only after the STATUS
|
|
* (to the original address) gets acked.
|
|
*/
|
|
if (udc->wait_for_addr_ack) {
|
|
u32 tmp;
|
|
|
|
at91_udp_write(udc, AT91_UDP_FADDR,
|
|
AT91_UDP_FEN | udc->addr);
|
|
tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
|
|
tmp &= ~AT91_UDP_FADDEN;
|
|
if (udc->addr)
|
|
tmp |= AT91_UDP_FADDEN;
|
|
at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
|
|
|
|
udc->wait_for_addr_ack = 0;
|
|
VDBG(udc, "address %d\n", udc->addr);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* OUT packet arrived ... */
|
|
else if (csr & AT91_UDP_RX_DATA_BK0) {
|
|
csr |= CLR_FX;
|
|
csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
|
|
|
|
/* OUT DATA stage */
|
|
if (!ep0->is_in) {
|
|
if (req) {
|
|
if (handle_ep(ep0)) {
|
|
/* send IN/STATUS */
|
|
PACKET("ep0 in/status\n");
|
|
csr = __raw_readl(creg);
|
|
csr &= ~SET_FX;
|
|
csr |= CLR_FX | AT91_UDP_TXPKTRDY;
|
|
__raw_writel(csr, creg);
|
|
udc->req_pending = 0;
|
|
}
|
|
} else if (udc->req_pending) {
|
|
/*
|
|
* AT91 hardware has a hard time with this
|
|
* "deferred response" mode for control-OUT
|
|
* transfers. (For control-IN it's fine.)
|
|
*
|
|
* The normal solution leaves OUT data in the
|
|
* fifo until the gadget driver is ready.
|
|
* We couldn't do that here without disabling
|
|
* the IRQ that tells about SETUP packets,
|
|
* e.g. when the host gets impatient...
|
|
*
|
|
* Working around it by copying into a buffer
|
|
* would almost be a non-deferred response,
|
|
* except that it wouldn't permit reliable
|
|
* stalling of the request. Instead, demand
|
|
* that gadget drivers not use this mode.
|
|
*/
|
|
DBG(udc, "no control-OUT deferred responses!\n");
|
|
__raw_writel(csr | AT91_UDP_FORCESTALL, creg);
|
|
udc->req_pending = 0;
|
|
}
|
|
|
|
/* STATUS stage for control-IN; ack. */
|
|
} else {
|
|
PACKET("ep0 out/status ACK\n");
|
|
__raw_writel(csr, creg);
|
|
|
|
/* "early" status stage */
|
|
if (req)
|
|
done(ep0, req, 0);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void at91_udc_irq (void *_udc)
|
|
{
|
|
struct at91_udc *udc = _udc;
|
|
u32 rescans = 5;
|
|
|
|
while (rescans--) {
|
|
u32 status;
|
|
|
|
status = at91_udp_read(udc, AT91_UDP_ISR);
|
|
if (!status)
|
|
break;
|
|
|
|
/* USB reset irq: not maskable */
|
|
if (status & AT91_UDP_ENDBUSRES) {
|
|
at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS);
|
|
/* Atmel code clears this irq twice */
|
|
at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES);
|
|
at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES);
|
|
VDBG(udc, "end bus reset\n");
|
|
udc->addr = 0;
|
|
stop_activity(udc);
|
|
|
|
/* enable ep0 */
|
|
at91_udp_write(udc, AT91_UDP_CSR(0),
|
|
AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL);
|
|
udc->gadget.speed = USB_SPEED_FULL;
|
|
udc->suspended = 0;
|
|
|
|
/*
|
|
* NOTE: this driver keeps clocks off unless the
|
|
* USB host is present. That saves power, but for
|
|
* boards that don't support VBUS detection, both
|
|
* clocks need to be active most of the time.
|
|
*/
|
|
|
|
/* host initiated suspend (3+ms bus idle) */
|
|
} else if (status & AT91_UDP_RXSUSP) {
|
|
at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP);
|
|
at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP);
|
|
/* VDBG(udc, "bus suspend\n"); */
|
|
if (udc->suspended)
|
|
continue;
|
|
udc->suspended = 1;
|
|
|
|
/*
|
|
* NOTE: when suspending a VBUS-powered device, the
|
|
* gadget driver should switch into slow clock mode
|
|
* and then into standby to avoid drawing more than
|
|
* 500uA power (2500uA for some high-power configs).
|
|
*/
|
|
if (udc->driver && udc->driver->suspend) {
|
|
udc->driver->suspend(&udc->gadget);
|
|
}
|
|
|
|
/* host initiated resume */
|
|
} else if (status & AT91_UDP_RXRSM) {
|
|
at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM);
|
|
at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM);
|
|
/* VDBG(udc, "bus resume\n"); */
|
|
if (!udc->suspended)
|
|
continue;
|
|
udc->suspended = 0;
|
|
|
|
/*
|
|
* NOTE: for a VBUS-powered device, the gadget driver
|
|
* would normally want to switch out of slow clock
|
|
* mode into normal mode.
|
|
*/
|
|
if (udc->driver && udc->driver->resume) {
|
|
udc->driver->resume(&udc->gadget);
|
|
}
|
|
|
|
/* endpoint IRQs are cleared by handling them */
|
|
} else {
|
|
int i;
|
|
unsigned mask = 1;
|
|
struct at91_ep *ep = &udc->ep[1];
|
|
|
|
if (status & mask)
|
|
handle_ep0(udc);
|
|
for (i = 1; i < NUM_ENDPOINTS; i++) {
|
|
mask <<= 1;
|
|
if (status & mask)
|
|
handle_ep(ep);
|
|
ep++;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
static struct at91_udc controller = {
|
|
.gadget = {
|
|
.ops = &at91_udc_ops,
|
|
.ep0 = &controller.ep[0].ep,
|
|
.name = driver_name,
|
|
},
|
|
.ep[0] = {
|
|
.ep = {
|
|
.name = ep0name,
|
|
.ops = &at91_ep_ops,
|
|
},
|
|
.udc = &controller,
|
|
.maxpacket = 8,
|
|
.int_mask = 1 << 0,
|
|
},
|
|
.ep[1] = {
|
|
.ep = {
|
|
.name = "ep1",
|
|
.ops = &at91_ep_ops,
|
|
},
|
|
.udc = &controller,
|
|
.is_pingpong = 1,
|
|
.maxpacket = 64,
|
|
.int_mask = 1 << 1,
|
|
},
|
|
.ep[2] = {
|
|
.ep = {
|
|
.name = "ep2",
|
|
.ops = &at91_ep_ops,
|
|
},
|
|
.udc = &controller,
|
|
.is_pingpong = 1,
|
|
.maxpacket = 64,
|
|
.int_mask = 1 << 2,
|
|
},
|
|
.ep[3] = {
|
|
.ep = {
|
|
/* could actually do bulk too */
|
|
.name = "ep3-int",
|
|
.ops = &at91_ep_ops,
|
|
},
|
|
.udc = &controller,
|
|
.maxpacket = 8,
|
|
.int_mask = 1 << 3,
|
|
},
|
|
.ep[4] = {
|
|
.ep = {
|
|
.name = "ep4",
|
|
.ops = &at91_ep_ops,
|
|
},
|
|
.udc = &controller,
|
|
.is_pingpong = 1,
|
|
.maxpacket = 256,
|
|
.int_mask = 1 << 4,
|
|
},
|
|
.ep[5] = {
|
|
.ep = {
|
|
.name = "ep5",
|
|
.ops = &at91_ep_ops,
|
|
},
|
|
.udc = &controller,
|
|
.is_pingpong = 1,
|
|
.maxpacket = 256,
|
|
.int_mask = 1 << 5,
|
|
},
|
|
/* ep6 and ep7 are also reserved (custom silicon might use them) */
|
|
};
|
|
|
|
static void at91_udc_irq (void *_udc);
|
|
|
|
static void at91_update_vbus(struct at91_udc *udc, u32 value)
|
|
{
|
|
if (value == udc->gpio_vbus_val)
|
|
return;
|
|
|
|
if (value)
|
|
dev_set_param(udc->dev, "vbus", "1");
|
|
else
|
|
dev_set_param(udc->dev, "vbus", "0");
|
|
|
|
udc->gpio_vbus_val = value;
|
|
}
|
|
|
|
int usb_gadget_poll(void)
|
|
{
|
|
struct at91_udc *udc = &controller;
|
|
u32 value;
|
|
|
|
if (!udc->udp_baseaddr)
|
|
return 0;
|
|
|
|
value = gpio_get_value(udc->board.vbus_pin);
|
|
value ^= udc->board.vbus_active_low;
|
|
|
|
if (!value) {
|
|
at91_update_vbus(udc, value);
|
|
return 0;
|
|
}
|
|
at91_update_vbus(udc, value);
|
|
|
|
value = at91_udp_read(udc, AT91_UDP_ISR) & (~(AT91_UDP_SOFINT));
|
|
if (value)
|
|
at91_udc_irq(udc);
|
|
|
|
return value;
|
|
}
|
|
|
|
int usb_gadget_register_driver(struct usb_gadget_driver *driver)
|
|
{
|
|
struct at91_udc *udc = &controller;
|
|
int retval;
|
|
|
|
if (!udc->iclk)
|
|
return -ENODEV;
|
|
|
|
if (!driver
|
|
|| driver->speed < USB_SPEED_FULL
|
|
|| !driver->bind
|
|
|| !driver->setup) {
|
|
DBG(udc, "bad parameter.\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (udc->driver) {
|
|
DBG(udc, "UDC already has a gadget driver\n");
|
|
return -EBUSY;
|
|
}
|
|
|
|
udc->driver = driver;
|
|
udc->enabled = 1;
|
|
udc->selfpowered = 1;
|
|
|
|
retval = driver->bind(&udc->gadget);
|
|
if (retval) {
|
|
DBG(udc, "bind() returned %d\n", retval);
|
|
udc->driver = NULL;
|
|
udc->enabled = 0;
|
|
udc->selfpowered = 0;
|
|
return retval;
|
|
}
|
|
|
|
pullup(udc, 1);
|
|
|
|
DBG(udc, "bound to %s\n", driver->function);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL (usb_gadget_register_driver);
|
|
|
|
int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
|
|
{
|
|
struct at91_udc *udc = &controller;
|
|
|
|
if (!driver || driver != udc->driver || !driver->unbind)
|
|
return -EINVAL;
|
|
|
|
udc->enabled = 0;
|
|
at91_udp_write(udc, AT91_UDP_IDR, ~0);
|
|
pullup(udc, 0);
|
|
|
|
driver->unbind(&udc->gadget);
|
|
udc->driver = NULL;
|
|
|
|
DBG(udc, "unbound from %s\n", driver->function);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL (usb_gadget_unregister_driver);
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
static void at91_udc_poller(struct poller_struct *poller)
|
|
{
|
|
usb_gadget_poll();
|
|
}
|
|
|
|
static struct poller_struct poller = {
|
|
.func = at91_udc_poller
|
|
};
|
|
|
|
static int __init at91udc_probe(struct device_d *dev)
|
|
{
|
|
struct at91_udc *udc;
|
|
int retval;
|
|
|
|
if (!dev->platform_data) {
|
|
/* small (so we copy it) but critical! */
|
|
DBG(udc, "missing platform_data\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* init software state */
|
|
udc = &controller;
|
|
udc->dev = dev;
|
|
udc->board = *(struct at91_udc_data *) dev->platform_data;
|
|
udc->enabled = 0;
|
|
|
|
/* rm9200 needs manual D+ pullup; off by default */
|
|
if (cpu_is_at91rm9200()) {
|
|
if (udc->board.pullup_pin <= 0) {
|
|
DBG(udc, "no D+ pullup?\n");
|
|
retval = -ENODEV;
|
|
goto fail0;
|
|
}
|
|
retval = gpio_request(udc->board.pullup_pin, "udc_pullup");
|
|
if (retval) {
|
|
DBG(udc, "D+ pullup is busy\n");
|
|
goto fail0;
|
|
}
|
|
gpio_direction_output(udc->board.pullup_pin,
|
|
udc->board.pullup_active_low);
|
|
}
|
|
|
|
/* newer chips have more FIFO memory than rm9200 */
|
|
if (cpu_is_at91sam9260() || cpu_is_at91sam9g20()) {
|
|
udc->ep[0].maxpacket = 64;
|
|
udc->ep[3].maxpacket = 64;
|
|
udc->ep[4].maxpacket = 512;
|
|
udc->ep[5].maxpacket = 512;
|
|
} else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) {
|
|
udc->ep[3].maxpacket = 64;
|
|
} else if (cpu_is_at91sam9263()) {
|
|
udc->ep[0].maxpacket = 64;
|
|
udc->ep[3].maxpacket = 64;
|
|
}
|
|
|
|
udc->udp_baseaddr = dev_request_mem_region(dev, 0);
|
|
if (!udc->udp_baseaddr) {
|
|
retval = -ENOMEM;
|
|
goto fail0a;
|
|
}
|
|
|
|
udc_reinit(udc);
|
|
|
|
/* get interface and function clocks */
|
|
udc->iclk = clk_get(dev, "udc_clk");
|
|
udc->fclk = clk_get(dev, "udpck");
|
|
if (IS_ERR(udc->iclk) || IS_ERR(udc->fclk)) {
|
|
DBG(udc, "clocks missing\n");
|
|
retval = -ENODEV;
|
|
/* NOTE: we "know" here that refcounts on these are NOPs */
|
|
goto fail0a;
|
|
}
|
|
|
|
/* don't do anything until we have both gadget driver and VBUS */
|
|
clk_enable(udc->iclk);
|
|
at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
|
|
at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff);
|
|
/* Clear all pending interrupts - UDP may be used by bootloader. */
|
|
at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff);
|
|
clk_disable(udc->iclk);
|
|
|
|
if (gpio_is_valid(udc->board.vbus_pin)) {
|
|
/*
|
|
* Get the initial state of VBUS - we cannot expect
|
|
* a pending interrupt.
|
|
*/
|
|
udc->vbus = at91_get_gpio_value(udc->board.vbus_pin);
|
|
DBG(udc, "VBUS detection: host:%s \n",
|
|
udc->vbus ? "present":"absent");
|
|
} else {
|
|
DBG(udc, "no VBUS detection, assuming always-on\n");
|
|
udc->vbus = 1;
|
|
}
|
|
|
|
dev_add_param(dev, "vbus", NULL, NULL, 0);
|
|
dev_set_param(dev, "vbus", "0");
|
|
|
|
poller_register(&poller);
|
|
|
|
INFO(udc, "%s version %s\n", driver_name, DRIVER_VERSION);
|
|
return 0;
|
|
|
|
fail0a:
|
|
if (cpu_is_at91rm9200())
|
|
gpio_free(udc->board.pullup_pin);
|
|
fail0:
|
|
DBG(udc, "%s probe failed, %d\n", driver_name, retval);
|
|
return retval;
|
|
}
|
|
|
|
|
|
static struct driver_d at91_udc_driver = {
|
|
.name = driver_name,
|
|
.probe = at91udc_probe,
|
|
};
|
|
|
|
static int at91_udc_init(void)
|
|
{
|
|
platform_driver_register(&at91_udc_driver);
|
|
return 0;
|
|
}
|
|
device_initcall(at91_udc_init);
|