barebox/arch/arm/boards/mini2440
Juergen Beisert e0965c4d56 S3C24xx/NFC: Consider correct NAND page size for boot.
When booting from NAND, its important to know the correct page size. When
the NAND is used as the boot source, four dedicated pins are used to configure
the correct page size and address cycles. These pins can be read back in one
of the NFC registers to parametrize the load function.

This patch also extends the read routine to support more than four address
cycles on demand.

BTW: At least some mini2440s are misconfigured to use five address cycles for
a NAND device that is known to need only four address cycles. In this case the
vendor is at our side: This NAND simply ignores any additional address cycles
than required.

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-03-14 12:11:19 +01:00
..
env defaultenv: add kernel_loc nfs and tftp support 2011-03-14 11:57:11 +01:00
config.h mini2440: Add SDRAM config settings 2011-03-03 16:15:54 +01:00
lowlevel_init.S mini2440: Add booting from NAND support 2011-03-03 16:15:55 +01:00
Makefile mini2440: Add booting from NAND support 2011-03-03 16:15:55 +01:00
mini2440.c S3C24xx/NFC: Consider correct NAND page size for boot. 2011-03-14 12:11:19 +01:00