this implementation is based on linux one (v2.6.35-rc5-76-gd0c6f62) it will calculate all the clock dynamically instead of statictly this will use also the new clock framework it will also print the clock status after the console init Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
250 lines
5.4 KiB
C
250 lines
5.4 KiB
C
#include <common.h>
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#include <gpio.h>
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#include <init.h>
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#include <asm/hardware.h>
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#include <mach/at91_pmc.h>
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#include "clock.h"
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#include "generic.h"
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/* --------------------------------------------------------------------
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* Clocks
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* -------------------------------------------------------------------- */
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/*
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* The peripheral clocks.
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*/
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static struct clk pioA_clk = {
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.name = "pioA_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PIOA,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioB_clk = {
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.name = "pioB_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PIOB,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pioCDE_clk = {
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.name = "pioCDE_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PIOCDE,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart0_clk = {
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.name = "usart0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_US0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart1_clk = {
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.name = "usart1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_US1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk usart2_clk = {
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.name = "usart2_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_US2,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk mmc0_clk = {
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.name = "mci0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_MCI0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk mmc1_clk = {
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.name = "mci1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_MCI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk can_clk = {
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.name = "can_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_CAN,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk twi_clk = {
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.name = "twi_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_TWI,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk spi0_clk = {
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.name = "spi0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SPI0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk spi1_clk = {
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.name = "spi1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SPI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc0_clk = {
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.name = "ssc0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SSC0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc1_clk = {
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.name = "ssc1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SSC1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ac97_clk = {
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.name = "ac97_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_AC97C,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tcb_clk = {
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.name = "tcb_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_TCB,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pwm_clk = {
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.name = "pwm_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PWMC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk macb_clk = {
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.name = "macb_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_EMAC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk dma_clk = {
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.name = "dma_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_DMA,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk twodge_clk = {
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.name = "2dge_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_2DGE,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk udc_clk = {
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.name = "udc_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_UDP,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk isi_clk = {
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.name = "isi_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_ISI,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk lcdc_clk = {
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.name = "lcdc_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_LCDC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ohci_clk = {
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.name = "ohci_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_UHP,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk *periph_clocks[] = {
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&pioA_clk,
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&pioB_clk,
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&pioCDE_clk,
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&usart0_clk,
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&usart1_clk,
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&usart2_clk,
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&mmc0_clk,
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&mmc1_clk,
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&can_clk,
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&twi_clk,
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&spi0_clk,
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&spi1_clk,
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&ssc0_clk,
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&ssc1_clk,
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&ac97_clk,
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&tcb_clk,
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&pwm_clk,
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&macb_clk,
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&twodge_clk,
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&udc_clk,
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&isi_clk,
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&lcdc_clk,
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&dma_clk,
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&ohci_clk,
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// irq0 .. irq1
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};
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/*
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* The four programmable clocks.
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* You must configure pin multiplexing to bring these signals out.
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*/
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static struct clk pck0 = {
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.name = "pck0",
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.pmc_mask = AT91_PMC_PCK0,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 0,
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};
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static struct clk pck1 = {
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.name = "pck1",
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.pmc_mask = AT91_PMC_PCK1,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 1,
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};
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static struct clk pck2 = {
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.name = "pck2",
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.pmc_mask = AT91_PMC_PCK2,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 2,
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};
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static struct clk pck3 = {
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.name = "pck3",
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.pmc_mask = AT91_PMC_PCK3,
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.type = CLK_TYPE_PROGRAMMABLE,
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.id = 3,
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};
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static void __init at91sam9263_register_clocks(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
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clk_register(periph_clocks[i]);
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clk_register(&pck0);
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clk_register(&pck1);
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clk_register(&pck2);
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clk_register(&pck3);
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}
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/* --------------------------------------------------------------------
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* GPIO
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* -------------------------------------------------------------------- */
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static struct at91_gpio_bank at91sam9263_gpio[] = {
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{
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.id = AT91SAM9263_ID_PIOA,
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.offset = AT91_PIOA,
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.clock = &pioA_clk,
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}, {
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.id = AT91SAM9263_ID_PIOB,
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.offset = AT91_PIOB,
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.clock = &pioB_clk,
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}, {
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.id = AT91SAM9263_ID_PIOCDE,
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.offset = AT91_PIOC,
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.clock = &pioCDE_clk,
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}, {
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.id = AT91SAM9263_ID_PIOCDE,
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.offset = AT91_PIOD,
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.clock = &pioCDE_clk,
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}, {
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.id = AT91SAM9263_ID_PIOCDE,
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.offset = AT91_PIOE,
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.clock = &pioCDE_clk,
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}
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};
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static int at91sam9263_initialize(void)
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{
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/* Init clock subsystem */
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at91_clock_init(AT91_MAIN_CLOCK);
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/* Register the processor-specific clocks */
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at91sam9263_register_clocks();
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/* Register GPIO subsystem */
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at91_gpio_init(at91sam9263_gpio, 5);
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return 0;
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}
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core_initcall(at91sam9263_initialize);
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