Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
97 lines
2.4 KiB
C
97 lines
2.4 KiB
C
/*
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* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <init.h>
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#include <clock.h>
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#include <asm/io.h>
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#include <mach/ep93xx-regs.h>
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#define TIMER_CLKSEL (1 << 3)
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#define TIMER_MODE (1 << 6)
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#define TIMER_ENABLE (1 << 7)
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#define TIMER_FREQ 508469
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static uint64_t ep93xx_clocksource_read(void)
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{
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struct timer_regs *timer = (struct timer_regs *)TIMER_BASE;
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return 0xffffffff - readl(&timer->timer3.value);
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}
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static struct clocksource cs = {
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.read = ep93xx_clocksource_read,
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.mask = CLOCKSOURCE_MASK(32),
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.shift = 10,
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};
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static int clocksource_init(void)
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{
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struct timer_regs *timer = (struct timer_regs *)TIMER_BASE;
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/* use timer 3 with 508KHz and free running */
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writel(TIMER_CLKSEL,
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&timer->timer3.control);
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/* load timer 3 with max value */
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writel(0xffffffff, &timer->timer3.load);
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/* enable timer 3 with 508KHz and periodic mode */
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writel(TIMER_ENABLE | TIMER_MODE | TIMER_CLKSEL,
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&timer->timer3.control);
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cs.mult = clocksource_hz2mult(TIMER_FREQ, cs.shift);
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init_clock(&cs);
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return 0;
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}
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core_initcall(clocksource_init);
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/*
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* Reset the cpu
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*/
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void __noreturn reset_cpu(unsigned long addr)
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{
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struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
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uint32_t value;
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/* Unlock DeviceCfg and set SWRST */
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writel(0xAA, &syscon->sysswlock);
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value = readl(&syscon->devicecfg);
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value |= SYSCON_DEVICECFG_SWRST;
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writel(value, &syscon->devicecfg);
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/* Unlock DeviceCfg and clear SWRST */
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writel(0xAA, &syscon->sysswlock);
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value = readl(&syscon->devicecfg);
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value &= ~SYSCON_DEVICECFG_SWRST;
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writel(value, &syscon->devicecfg);
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/* Dying... */
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while (1)
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; /* noop */
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}
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EXPORT_SYMBOL(reset_cpu);
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