gcc: add patch for ice 50099, which caused lttng-ust not to build
[YOCTO #1381] This patch came from from GCC Bugzilla via Khem Cc: Khem Raj <raj.khem@gmail.com> (From OE-Core rev: 61dac2f6f68bc46d8f3f6f7a8757924f103c7c54) Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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@ -1,6 +1,6 @@
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require gcc-common.inc
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PR = "r9"
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PR = "r10"
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# Third digit in PV should be incremented after a minor release
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# happens from this branch on gcc e.g. currently its 4.6.0
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@ -67,6 +67,7 @@ SRC_URI = "svn://gcc.gnu.org/svn/gcc/branches;module=${BRANCH};proto=http \
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file://volatile_access_backport.patch \
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file://use-defaults.h-and-t-oe-in-B.patch \
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file://powerpc-e5500.patch \
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file://fix-for-ice-50099.patch \
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"
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SRC_URI_append_sh3 = " file://sh3-installfix-fixheaders.patch "
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@ -0,0 +1,49 @@
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This patch address an issue with the compiler generating an ICE
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during compliation of lttng-ust.
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50099
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Upstream-Status: Pending
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Signed-off-by: Khem Raj <khem.raj@gmail.com>
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Signed-off-by: Saul Wold <sgw@linux.intel.com>
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Index: gcc/config/arm/arm.md
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===================================================================
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--- gcc-4.6.0/gcc/config/arm/arm.md (revision 178135)
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+++ gcc-4.6.0/gcc/config/arm/arm.md (working copy)
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@@ -4217,6 +4217,7 @@ (define_split
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"TARGET_32BIT"
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[(set (match_dup 0) (ashiftrt:SI (match_dup 1) (const_int 31)))]
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{
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+ rtx srcop = operands[1];
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rtx lo_part = gen_lowpart (SImode, operands[0]);
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enum machine_mode src_mode = GET_MODE (operands[1]);
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@@ -4224,14 +4225,21 @@ (define_split
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&& !reg_overlap_mentioned_p (operands[0], operands[1]))
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emit_clobber (operands[0]);
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+ if (TARGET_ARM && src_mode == QImode
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+ && !arm_reg_or_extendqisi_mem_op (srcop, QImode))
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+ {
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+ rtx dest = gen_lowpart (QImode, lo_part);
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+ emit_move_insn (dest, srcop);
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+ srcop = dest;
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+ }
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if (!REG_P (lo_part) || src_mode != SImode
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- || !rtx_equal_p (lo_part, operands[1]))
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+ || !rtx_equal_p (lo_part, srcop))
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{
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if (src_mode == SImode)
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- emit_move_insn (lo_part, operands[1]);
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+ emit_move_insn (lo_part, srcop);
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else
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emit_insn (gen_rtx_SET (VOIDmode, lo_part,
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- gen_rtx_SIGN_EXTEND (SImode, operands[1])));
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+ gen_rtx_SIGN_EXTEND (SImode, srcop)));
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operands[1] = lo_part;
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}
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operands[0] = gen_highpart (SImode, operands[0]);
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