qtjsbackend: refresh hardfloat patch from stable branch
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
This commit is contained in:
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d8ce75b573
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@ -1,33 +0,0 @@
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From 05a87fccb76447ce3cb4b926128af929f26469bb Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
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Date: Wed, 22 May 2013 18:50:01 +0200
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Subject: [PATCH] Fix hardfloat detection
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based on the same patch for nodejs which says :
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gcc has a builtin define to denote hard abi when in use, e.g. when
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using -mfloat-abi=hard it will define __ARM_PCS_VFP to 1 and therefore
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we should check that to determine which calling convention is in use
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and not __VFP_FP__ which merely indicates presence of VFP unit
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The fix has been provided by Khem Raj <raj.khem@gmail.com>
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---
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src/3rdparty/v8/src/platform-linux.cc | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/src/3rdparty/v8/src/platform-linux.cc b/src/3rdparty/v8/src/platform-linux.cc
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index f6db423..8ae2249 100644
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--- a/src/3rdparty/v8/src/platform-linux.cc
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+++ b/src/3rdparty/v8/src/platform-linux.cc
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@@ -167,7 +167,7 @@ bool OS::ArmCpuHasFeature(CpuFeature feature) {
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// calling this will return 1.0 and otherwise 0.0.
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static void ArmUsingHardFloatHelper() {
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asm("mov r0, #0":::"r0");
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-#if defined(__VFP_FP__) && !defined(__SOFTFP__)
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+#if defined(__ARM_PCS_VFP) && !defined(__SOFTFP__)
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// Load 0x3ff00000 into r1 using instructions available in both ARM
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// and Thumb mode.
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asm("mov r1, #3":::"r1");
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--
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1.7.10.4
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@ -0,0 +1,190 @@
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From d8a3566b013ba581e638cf2b960a8488d5fc9d64 Mon Sep 17 00:00:00 2001
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From: Sergio Martins <sergio.martins@kdab.com>
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Date: Wed, 20 Feb 2013 22:34:46 +0000
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Subject: [PATCH 3/3] [V8] Cleanup hardfp ABI detection. This work was
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triggered by issue 2140.
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Upstream Patch: https://chromiumcodereview.appspot.com/10713009
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Task-Number: QTBUG-28890
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Change-Id: Id073388fbbffa2ad9b1cea0ab42e1d6e47862a36
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Reviewed-by: Sean Harmer <sean.harmer@kdab.com>
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Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
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---
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src/3rdparty/v8/src/platform-linux.cc | 70 ++++++++++++++++------------------
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src/3rdparty/v8/src/platform-qnx.cc | 71 ++++++++++++++++-------------------
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2 files changed, 65 insertions(+), 76 deletions(-)
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diff --git a/src/3rdparty/v8/src/platform-linux.cc b/src/3rdparty/v8/src/platform-linux.cc
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index f6db423..18f59dd 100644
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--- a/src/3rdparty/v8/src/platform-linux.cc
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+++ b/src/3rdparty/v8/src/platform-linux.cc
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@@ -161,47 +161,41 @@ bool OS::ArmCpuHasFeature(CpuFeature feature) {
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}
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-// Simple helper function to detect whether the C code is compiled with
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-// option -mfloat-abi=hard. The register d0 is loaded with 1.0 and the register
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-// pair r0, r1 is loaded with 0.0. If -mfloat-abi=hard is pased to GCC then
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-// calling this will return 1.0 and otherwise 0.0.
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-static void ArmUsingHardFloatHelper() {
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- asm("mov r0, #0":::"r0");
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-#if defined(__VFP_FP__) && !defined(__SOFTFP__)
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- // Load 0x3ff00000 into r1 using instructions available in both ARM
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- // and Thumb mode.
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- asm("mov r1, #3":::"r1");
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- asm("mov r2, #255":::"r2");
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- asm("lsl r1, r1, #8":::"r1");
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- asm("orr r1, r1, r2":::"r1");
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- asm("lsl r1, r1, #20":::"r1");
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- // For vmov d0, r0, r1 use ARM mode.
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-#ifdef __thumb__
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- asm volatile(
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- "@ Enter ARM Mode \n\t"
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- " adr r3, 1f \n\t"
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- " bx r3 \n\t"
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- " .ALIGN 4 \n\t"
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- " .ARM \n"
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- "1: vmov d0, r0, r1 \n\t"
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- "@ Enter THUMB Mode\n\t"
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- " adr r3, 2f+1 \n\t"
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- " bx r3 \n\t"
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- " .THUMB \n"
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- "2: \n\t":::"r3");
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+bool OS::ArmUsingHardFloat() {
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+ // GCC versions 4.6 and above define __ARM_PCS or __ARM_PCS_VFP to specify
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+ // the Floating Point ABI used (PCS stands for Procedure Call Standard).
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+ // We use these as well as a couple of other defines to statically determine
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+ // what FP ABI used.
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+ // GCC versions 4.4 and below don't support hard-fp.
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+ // GCC versions 4.5 may support hard-fp without defining __ARM_PCS or
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+ // __ARM_PCS_VFP.
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+
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+#define GCC_VERSION (__GNUC__ * 10000 \
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+ + __GNUC_MINOR__ * 100 \
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+ + __GNUC_PATCHLEVEL__)
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+#if GCC_VERSION >= 40600
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+#if defined(__ARM_PCS_VFP)
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+ return true;
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#else
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- asm("vmov d0, r0, r1");
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-#endif // __thumb__
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-#endif // defined(__VFP_FP__) && !defined(__SOFTFP__)
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- asm("mov r1, #0":::"r1");
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-}
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+ return false;
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+#endif
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+#elif GCC_VERSION < 40500
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+ return false;
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-bool OS::ArmUsingHardFloat() {
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- // Cast helper function from returning void to returning double.
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- typedef double (*F)();
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- F f = FUNCTION_CAST<F>(FUNCTION_ADDR(ArmUsingHardFloatHelper));
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- return f() == 1.0;
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+#else
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+#if defined(__ARM_PCS_VFP)
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+ return true;
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+#elif defined(__ARM_PCS) || defined(__SOFTFP) || !defined(__VFP_FP__)
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+ return false;
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+#else
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+#error "Your version of GCC does not report the FP ABI compiled for." \
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+ "Please report it on this issue" \
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+ "http://code.google.com/p/v8/issues/detail?id=2140"
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+
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+#endif
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+#endif
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+#undef GCC_VERSION
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}
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#endif // def __arm__
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diff --git a/src/3rdparty/v8/src/platform-qnx.cc b/src/3rdparty/v8/src/platform-qnx.cc
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index bf9f5ba..46d69b8 100644
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--- a/src/3rdparty/v8/src/platform-qnx.cc
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+++ b/src/3rdparty/v8/src/platform-qnx.cc
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@@ -139,48 +139,43 @@ bool OS::ArmCpuHasFeature(CpuFeature feature) {
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}
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-// Simple helper function to detect whether the C code is compiled with
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-// option -mfloat-abi=hard. The register d0 is loaded with 1.0 and the register
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-// pair r0, r1 is loaded with 0.0. If -mfloat-abi=hard is pased to GCC then
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-// calling this will return 1.0 and otherwise 0.0.
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-static void ArmUsingHardFloatHelper() {
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- asm("mov r0, #0");
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-#if defined(__VFP_FP__) && !defined(__SOFTFP__)
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- // Load 0x3ff00000 into r1 using instructions available in both ARM
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- // and Thumb mode.
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- asm("mov r1, #3");
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- asm("mov r2, #255");
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- asm("lsl r1, r1, #8");
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- asm("orr r1, r1, r2");
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- asm("lsl r1, r1, #20");
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- // For vmov d0, r0, r1 use ARM mode.
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-#ifdef __thumb__
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- asm volatile(
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- "@ Enter ARM Mode \n\t"
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- " adr r3, 1f \n\t"
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- " bx r3 \n\t"
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- " .ALIGN 4 \n\t"
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- " .ARM \n"
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- "1: vmov d0, r0, r1 \n\t"
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- "@ Enter THUMB Mode\n\t"
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- " adr r3, 2f+1 \n\t"
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- " bx r3 \n\t"
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- " .THUMB \n"
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- "2: \n\t");
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+bool OS::ArmUsingHardFloat() {
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+ // GCC versions 4.6 and above define __ARM_PCS or __ARM_PCS_VFP to specify
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+ // the Floating Point ABI used (PCS stands for Procedure Call Standard).
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+ // We use these as well as a couple of other defines to statically determine
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+ // what FP ABI used.
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+ // GCC versions 4.4 and below don't support hard-fp.
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+ // GCC versions 4.5 may support hard-fp without defining __ARM_PCS or
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+ // __ARM_PCS_VFP.
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+
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+#define GCC_VERSION (__GNUC__ * 10000 \
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+ + __GNUC_MINOR__ * 100 \
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+ + __GNUC_PATCHLEVEL__)
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+#if GCC_VERSION >= 40600
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+#if defined(__ARM_PCS_VFP)
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+ return true;
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#else
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- asm("vmov d0, r0, r1");
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-#endif // __thumb__
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-#endif // defined(__VFP_FP__) && !defined(__SOFTFP__)
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- asm("mov r1, #0");
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-}
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+ return false;
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+#endif
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+#elif GCC_VERSION < 40500
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+ return false;
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-bool OS::ArmUsingHardFloat() {
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- // Cast helper function from returning void to returning double.
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- typedef double (*F)();
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- F f = FUNCTION_CAST<F>(FUNCTION_ADDR(ArmUsingHardFloatHelper));
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- return f() == 1.0;
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+#else
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+#if defined(__ARM_PCS_VFP)
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+ return true;
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+#elif defined(__ARM_PCS) || defined(__SOFTFP) || !defined(__VFP_FP__)
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+ return false;
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+#else
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+#error "Your version of GCC does not report the FP ABI compiled for." \
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+ "Please report it on this issue" \
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+ "http://code.google.com/p/v8/issues/detail?id=2140"
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+
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+#endif
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+#endif
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+#undef GCC_VERSION
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}
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+
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#endif // def __arm__
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--
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1.8.2.1
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@ -4,8 +4,8 @@ require ${PN}.inc
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PR = "${INC_PR}.0"
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SRC_URI += " \
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file://0001-Fix-hardfloat-detection.patch \
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"
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file://0003-V8-Cleanup-hardfp-ABI-detection.-This-work-was-trigg.patch \
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"
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SRC_URI[md5sum] = "610f011757755888153cb2004c04446f"
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SRC_URI[sha256sum] = "65071ab9ab7d9024b7ba6d128a1c97ac09cf1b37818affb4238e4ba7d6665cc0"
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