binutils-2.27.inc: Fix alignment frags for aarch64
There was bug with alignment frags for aarch64 in binutils. This is fixed in master of binutils. This patch backports the fix to binutils 2.27 version. (From OE-Core rev: f6f87019073d4f3caa7766aca89faa6781690fba) Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
Manjukumar Matha
Richard Purdie
parent
2f4008d694
commit
764a780136
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@ -37,6 +37,7 @@ SRC_URI = "\
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file://0015-binutils-mips-gas-pic-relax-linkonce.diff \
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file://0015-Refine-.cfi_sections-check-to-only-consider-compact-.patch \
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file://0016-Fix-seg-fault-in-ARM-linker-when-trying-to-parse-a-b.patch \
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file://0017-Fix-the-generation-of-alignment-frags-in-code-sectio.patch \
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file://0001-ppc-apuinfo-for-spe-parsed-incorrectly.patch \
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"
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S = "${WORKDIR}/git"
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@ -0,0 +1,139 @@
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From 4a4286465b5d6c28968bc2b29ae08daca7f219a3 Mon Sep 17 00:00:00 2001
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From: Nick Clifton <nickc@redhat.com>
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Date: Fri, 18 Nov 2016 11:42:48 -0800
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Subject: [PATCH] Fix the generation of alignment frags in code sections for AArch64.
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PR gas/20364
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* config/tc-aarch64.c (s_ltorg): Change the mapping state after
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aligning the frag.
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(aarch64_init): Treat rs_align frags in code sections as
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containing code, not data.
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* testsuite/gas/aarch64/pr20364.s: New test.
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* testsuite/gas/aarch64/pr20364.d: New test driver.
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Backporting the patch from binutils mainline
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https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=7ea12e5c3ad54da440c08f32da09534e63e515ca
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Upstream-Status: Backport
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Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
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---
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gas/ChangeLog | 10 ++++++++++
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gas/config/tc-aarch64.c | 10 +++++++---
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gas/testsuite/gas/aarch64/pr20364.d | 13 +++++++++++++
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gas/testsuite/gas/aarch64/pr20364.s | 28 ++++++++++++++++++++++++++++
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4 files changed, 58 insertions(+), 3 deletions(-)
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create mode 100644 gas/testsuite/gas/aarch64/pr20364.d
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create mode 100644 gas/testsuite/gas/aarch64/pr20364.s
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diff --git a/gas/ChangeLog b/gas/ChangeLog
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index a39895a..fad06dc 100644
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--- a/gas/ChangeLog
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+++ b/gas/ChangeLog
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@@ -1,3 +1,13 @@
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+2016-08-05 Nick Clifton <nickc@redhat.com>
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+
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+ PR gas/20364
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+ * config/tc-aarch64.c (s_ltorg): Change the mapping state after
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+ aligning the frag.
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+ (aarch64_init): Treat rs_align frags in code sections as
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+ containing code, not data.
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+ * testsuite/gas/aarch64/pr20364.s: New test.
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+ * testsuite/gas/aarch64/pr20364.d: New test driver.
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+
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2016-08-03 Tristan Gingold <gingold@adacore.com>
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* configure: Regenerate.
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diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
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index ddc40f2..74933cb 100644
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--- a/gas/config/tc-aarch64.c
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+++ b/gas/config/tc-aarch64.c
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@@ -1736,13 +1736,13 @@ s_ltorg (int ignored ATTRIBUTE_UNUSED)
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if (pool == NULL || pool->symbol == NULL || pool->next_free_entry == 0)
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continue;
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- mapping_state (MAP_DATA);
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-
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/* Align pool as you have word accesses.
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Only make a frag if we have to. */
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if (!need_pass_2)
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frag_align (align, 0, 0);
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+ mapping_state (MAP_DATA);
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+
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record_alignment (now_seg, align);
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sprintf (sym_name, "$$lit_\002%x", pool->id);
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@@ -6373,11 +6373,15 @@ aarch64_init_frag (fragS * fragP, int max_chars)
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switch (fragP->fr_type)
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{
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- case rs_align:
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case rs_align_test:
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case rs_fill:
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mapping_state_2 (MAP_DATA, max_chars);
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break;
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+ case rs_align:
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+ /* PR 20364: We can get alignment frags in code sections,
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+ so do not just assume that we should use the MAP_DATA state. */
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+ mapping_state_2 (subseg_text_p (now_seg) ? MAP_INSN : MAP_DATA, max_chars);
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+ break;
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case rs_align_code:
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mapping_state_2 (MAP_INSN, max_chars);
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break;
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diff --git a/gas/testsuite/gas/aarch64/pr20364.d b/gas/testsuite/gas/aarch64/pr20364.d
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new file mode 100644
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index 0000000..babcff1
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--- /dev/null
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+++ b/gas/testsuite/gas/aarch64/pr20364.d
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@@ -0,0 +1,13 @@
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+# Check that ".align <size>, <fill>" does not set the mapping state to DATA, causing unnecessary frag generation.
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+#name: PR20364
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+#objdump: -d
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+
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+.*: file format .*
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+
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+Disassembly of section \.vectors:
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+
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+0+000 <.*>:
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+ 0: d2800000 mov x0, #0x0 // #0
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+ 4: 94000000 bl 0 <plat_report_exception>
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+ 8: 17fffffe b 0 <bl1_exceptions>
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+
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diff --git a/gas/testsuite/gas/aarch64/pr20364.s b/gas/testsuite/gas/aarch64/pr20364.s
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new file mode 100644
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index 0000000..594ad7c
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--- /dev/null
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+++ b/gas/testsuite/gas/aarch64/pr20364.s
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@@ -0,0 +1,28 @@
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+ .macro vector_base label
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+ .section .vectors, "ax"
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+ .align 11, 0
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+ \label:
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+ .endm
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+
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+ .macro vector_entry label
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+ .section .vectors, "ax"
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+ .align 7, 0
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+ \label:
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+ .endm
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+
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+ .macro check_vector_size since
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+ .if (. - \since) > (32 * 4)
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+ .error "Vector exceeds 32 instructions"
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+ .endif
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+ .endm
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+
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+ .globl bl1_exceptions
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+
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+vector_base bl1_exceptions
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+
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+vector_entry SynchronousExceptionSP0
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+ mov x0, #0x0
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+ bl plat_report_exception
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+ b SynchronousExceptionSP0
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+ check_vector_size SynchronousExceptionSP0
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+
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--
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2.7.4
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