gcc 4.5.1 4.6.0: remove unused patches

(From OE-Core rev: 2b4975c536dace131d160798cf8fe45b86c03734)

Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
Nitin A Kamble 2011-05-12 15:16:35 -07:00 committed by Richard Purdie
parent 9deb373671
commit 9233fdcee2
19 changed files with 0 additions and 2093 deletions

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@ -1,21 +0,0 @@
Upstream-Status: Pending
This patch fixes a bug into ostream::operator<<(double) due to the wrong size
passed into the __convert_from_v method. The wrong size is then passed to
std::snprintf function, that, on uClibc, doens't handle sized 0 buffer.
Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>
Index: gcc-4.3.1/libstdc++-v3/include/bits/locale_facets.tcc
===================================================================
--- gcc-4.3.1.orig/libstdc++-v3/include/bits/locale_facets.tcc 2007-11-26 17:59:41.000000000 -0800
+++ gcc-4.3.1/libstdc++-v3/include/bits/locale_facets.tcc 2008-08-16 02:14:48.000000000 -0700
@@ -1004,7 +1004,7 @@
const int __cs_size = __fixed ? __max_exp + __prec + 4
: __max_digits * 2 + __prec;
char* __cs = static_cast<char*>(__builtin_alloca(__cs_size));
- __len = std::__convert_from_v(_S_get_c_locale(), __cs, 0, __fbuf,
+ __len = std::__convert_from_v(_S_get_c_locale(), __cs, __cs_size, __fbuf,
__prec, __v);
#endif

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@ -1,22 +0,0 @@
Upstream-Status: Inappropriate [embedded specific]
--- gcc-4.1.0/libstdc++-v3/fragment.am 2005-03-21 11:40:14.000000000 -0600
+++ gcc-4.1.0-patched/libstdc++-v3/fragment.am 2005-04-25 20:14:39.856251785 -0500
@@ -21,5 +21,5 @@
$(WARN_FLAGS) $(WERROR) -fdiagnostics-show-location=once
# -I/-D flags to pass when compiling.
-AM_CPPFLAGS = $(GLIBCXX_INCLUDES)
+AM_CPPFLAGS = $(GLIBCXX_INCLUDES) -I$(toplevel_srcdir)/include
--- gcc-4.1.0/libstdc++-v3/libmath/Makefile.am 2005-03-21 11:40:18.000000000 -0600
+++ gcc-4.1.0-patched/libstdc++-v3/libmath/Makefile.am 2005-04-25 20:14:39.682280735 -0500
@@ -35,7 +35,7 @@
libmath_la_SOURCES = stubs.c
-AM_CPPFLAGS = $(CANADIAN_INCLUDES)
+AM_CPPFLAGS = $(CANADIAN_INCLUDES) -I$(toplevel_srcdir)/include
# Only compiling "C" sources in this directory.
LIBTOOL = @LIBTOOL@ --tag CC

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@ -1,36 +0,0 @@
#! /bin/sh -e
# DP: Fix armv4t build on ARM
dir=
if [ $# -eq 3 -a "$2" = '-d' ]; then
pdir="-d $3"
dir="$3/"
elif [ $# -ne 1 ]; then
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
fi
case "$1" in
-patch)
patch $pdir -f --no-backup-if-mismatch -p1 < $0
;;
-unpatch)
patch $pdir -f --no-backup-if-mismatch -R -p1 < $0
;;
*)
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
esac
exit 0
--- src/gcc/config/arm/linux-eabi.h.orig 2007-11-24 12:37:38.000000000 +0000
+++ src/gcc/config/arm/linux-eabi.h 2007-11-24 12:39:41.000000000 +0000
@@ -44,7 +44,7 @@
The ARM10TDMI core is the default for armv5t, so set
SUBTARGET_CPU_DEFAULT to achieve this. */
#undef SUBTARGET_CPU_DEFAULT
-#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm10tdmi
+#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm9tdmi
/* TARGET_BIG_ENDIAN_DEFAULT is set in
config.gcc for big endian configurations. */

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@ -1,319 +0,0 @@
Adds support for Freescale Power architecture e300c2 and e300c3 cores.
http://www.bitshrine.org/gpp/tc-fsl-x86lnx-e300c3-nptl-4.0.2-2.src.rpm
Leon Woestenberg <leonw@mailcan.com>
---
gcc/config.gcc | 2
gcc/config/rs6000/e300c2c3.md | 189 ++++++++++++++++++++++++++++++++++++++++++
gcc/config/rs6000/rs6000.c | 24 +++++
gcc/config/rs6000/rs6000.h | 4
gcc/config/rs6000/rs6000.md | 3
5 files changed, 220 insertions(+), 2 deletions(-)
Index: gcc-4.3.1/gcc/config/rs6000/e300c2c3.md
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gcc-4.3.1/gcc/config/rs6000/e300c2c3.md 2008-08-23 16:51:33.000000000 -0700
@@ -0,0 +1,189 @@
+;; Pipeline description for Motorola PowerPC e300c3 core.
+;; Copyright (C) 2003 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 2, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+;; License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING. If not, write to the
+;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
+;; MA 02111-1307, USA.
+
+(define_automaton "ppce300c3_most,ppce300c3_long,ppce300c3_retire")
+(define_cpu_unit "ppce300c3_decode_0,ppce300c3_decode_1" "ppce300c3_most")
+
+;; We don't simulate general issue queue (GIC). If we have SU insn
+;; and then SU1 insn, they can not be issued on the same cycle
+;; (although SU1 insn and then SU insn can be issued) because the SU
+;; insn will go to SU1 from GIC0 entry. Fortunately, the first cycle
+;; multipass insn scheduling will find the situation and issue the SU1
+;; insn and then the SU insn.
+(define_cpu_unit "ppce300c3_issue_0,ppce300c3_issue_1" "ppce300c3_most")
+
+;; We could describe completion buffers slots in combination with the
+;; retirement units and the order of completion but the result
+;; automaton would behave in the same way because we can not describe
+;; real latency time with taking in order completion into account.
+;; Actually we could define the real latency time by querying reserved
+;; automaton units but the current scheduler uses latency time before
+;; issuing insns and making any reservations.
+;;
+;; So our description is aimed to achieve a insn schedule in which the
+;; insns would not wait in the completion buffer.
+(define_cpu_unit "ppce300c3_retire_0,ppce300c3_retire_1" "ppce300c3_retire")
+
+;; Branch unit:
+(define_cpu_unit "ppce300c3_bu" "ppce300c3_most")
+
+;; IU:
+(define_cpu_unit "ppce300c3_iu0_stage0,ppce300c3_iu1_stage0" "ppce300c3_most")
+
+;; IU: This used to describe non-pipelined division.
+(define_cpu_unit "ppce300c3_mu_div" "ppce300c3_long")
+
+;; SRU:
+(define_cpu_unit "ppce300c3_sru_stage0" "ppce300c3_most")
+
+;; Here we simplified LSU unit description not describing the stages.
+(define_cpu_unit "ppce300c3_lsu" "ppce300c3_most")
+
+;; FPU:
+(define_cpu_unit "ppce300c3_fpu" "ppce300c3_most")
+
+;; The following units are used to make automata deterministic
+(define_cpu_unit "present_ppce300c3_decode_0" "ppce300c3_most")
+(define_cpu_unit "present_ppce300c3_issue_0" "ppce300c3_most")
+(define_cpu_unit "present_ppce300c3_retire_0" "ppce300c3_retire")
+(define_cpu_unit "present_ppce300c3_iu0_stage0" "ppce300c3_most")
+
+;; The following sets to make automata deterministic when option ndfa is used.
+(presence_set "present_ppce300c3_decode_0" "ppce300c3_decode_0")
+(presence_set "present_ppce300c3_issue_0" "ppce300c3_issue_0")
+(presence_set "present_ppce300c3_retire_0" "ppce300c3_retire_0")
+(presence_set "present_ppce300c3_iu0_stage0" "ppce300c3_iu0_stage0")
+
+;; Some useful abbreviations.
+(define_reservation "ppce300c3_decode"
+ "ppce300c3_decode_0|ppce300c3_decode_1+present_ppce300c3_decode_0")
+(define_reservation "ppce300c3_issue"
+ "ppce300c3_issue_0|ppce300c3_issue_1+present_ppce300c3_issue_0")
+(define_reservation "ppce300c3_retire"
+ "ppce300c3_retire_0|ppce300c3_retire_1+present_ppce300c3_retire_0")
+(define_reservation "ppce300c3_iu_stage0"
+ "ppce300c3_iu0_stage0|ppce300c3_iu1_stage0+present_ppce300c3_iu0_stage0")
+
+;; Compares can be executed either one of the IU or SRU
+(define_insn_reservation "ppce300c3_cmp" 1
+ (and (eq_attr "type" "cmp,compare,delayed_compare,fast_compare")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+(ppce300c3_iu_stage0|ppce300c3_sru_stage0) \
+ +ppce300c3_retire")
+
+;; Other one cycle IU insns
+(define_insn_reservation "ppce300c3_iu" 1
+ (and (eq_attr "type" "integer,insert_word")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_iu_stage0+ppce300c3_retire")
+
+;; Branch. Actually this latency time is not used by the scheduler.
+(define_insn_reservation "ppce300c3_branch" 1
+ (and (eq_attr "type" "jmpreg,branch")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_bu,ppce300c3_retire")
+
+;; Multiply is non-pipelined but can be executed in any IU
+(define_insn_reservation "ppce300c3_multiply" 2
+ (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_iu_stage0, \
+ ppce300c3_iu_stage0+ppce300c3_retire")
+
+;; Divide. We use the average latency time here. We omit reserving a
+;; retire unit because of the result automata will be huge.
+(define_insn_reservation "ppce300c3_divide" 20
+ (and (eq_attr "type" "idiv")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_iu_stage0+ppce300c3_mu_div,\
+ ppce300c3_mu_div*19")
+
+;; CR logical
+(define_insn_reservation "ppce300c3_cr_logical" 1
+ (and (eq_attr "type" "cr_logical,delayed_cr")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
+
+;; Mfcr
+(define_insn_reservation "ppce300c3_mfcr" 1
+ (and (eq_attr "type" "mfcr")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
+
+;; Mtcrf
+(define_insn_reservation "ppce300c3_mtcrf" 1
+ (and (eq_attr "type" "mtcr")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
+
+;; Mtjmpr
+(define_insn_reservation "ppce300c3_mtjmpr" 1
+ (and (eq_attr "type" "mtjmpr,mfjmpr")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
+
+;; Float point instructions
+(define_insn_reservation "ppce300c3_fpcompare" 3
+ (and (eq_attr "type" "fpcompare")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,nothing,ppce300c3_retire")
+
+(define_insn_reservation "ppce300c3_fp" 3
+ (and (eq_attr "type" "fp")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,nothing,ppce300c3_retire")
+
+(define_insn_reservation "ppce300c3_dmul" 4
+ (and (eq_attr "type" "dmul")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,ppce300c3_fpu,nothing,ppce300c3_retire")
+
+; Divides are not pipelined
+(define_insn_reservation "ppce300c3_sdiv" 18
+ (and (eq_attr "type" "sdiv")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,ppce300c3_fpu*17")
+
+(define_insn_reservation "ppce300c3_ddiv" 33
+ (and (eq_attr "type" "ddiv")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,ppce300c3_fpu*32")
+
+;; Loads
+(define_insn_reservation "ppce300c3_load" 2
+ (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
+
+(define_insn_reservation "ppce300c3_fpload" 2
+ (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
+
+;; Stores.
+(define_insn_reservation "ppce300c3_store" 2
+ (and (eq_attr "type" "store,store_ux,store_u")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
+
+(define_insn_reservation "ppce300c3_fpstore" 2
+ (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
Index: gcc-4.3.1/gcc/config/rs6000/rs6000.c
===================================================================
--- gcc-4.3.1.orig/gcc/config/rs6000/rs6000.c 2008-08-23 16:49:39.000000000 -0700
+++ gcc-4.3.1/gcc/config/rs6000/rs6000.c 2008-08-23 16:54:25.000000000 -0700
@@ -669,6 +669,21 @@ struct processor_costs ppc8540_cost = {
1, /* prefetch streams /*/
};
+/* Instruction costs on E300C2 and E300C3 cores. */
+static const
+struct processor_costs ppce300c2c3_cost = {
+ COSTS_N_INSNS (4), /* mulsi */
+ COSTS_N_INSNS (4), /* mulsi_const */
+ COSTS_N_INSNS (4), /* mulsi_const9 */
+ COSTS_N_INSNS (4), /* muldi */
+ COSTS_N_INSNS (19), /* divsi */
+ COSTS_N_INSNS (19), /* divdi */
+ COSTS_N_INSNS (3), /* fp */
+ COSTS_N_INSNS (4), /* dmul */
+ COSTS_N_INSNS (18), /* sdiv */
+ COSTS_N_INSNS (33), /* ddiv */
+};
+
/* Instruction costs on POWER4 and POWER5 processors. */
static const
struct processor_costs power4_cost = {
@@ -1420,6 +1435,8 @@ rs6000_override_options (const char *def
{"8540", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_STRICT_ALIGN},
/* 8548 has a dummy entry for now. */
{"8548", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_STRICT_ALIGN},
+ {"e300c2", PROCESSOR_PPCE300C2, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
+ {"e300c3", PROCESSOR_PPCE300C3, POWERPC_BASE_MASK},
{"860", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
{"970", PROCESSOR_POWER4,
POWERPC_7400_MASK | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64},
@@ -1845,6 +1862,11 @@ rs6000_override_options (const char *def
rs6000_cost = &ppc8540_cost;
break;
+ case PROCESSOR_PPCE300C2:
+ case PROCESSOR_PPCE300C3:
+ rs6000_cost = &ppce300c2c3_cost;
+ break;
+
case PROCESSOR_POWER4:
case PROCESSOR_POWER5:
rs6000_cost = &power4_cost;
@@ -18606,6 +18628,8 @@ rs6000_issue_rate (void)
case CPU_PPC7400:
case CPU_PPC8540:
case CPU_CELL:
+ case CPU_PPCE300C2:
+ case CPU_PPCE300C3:
return 2;
case CPU_RIOS2:
case CPU_PPC604:
Index: gcc-4.3.1/gcc/config/rs6000/rs6000.h
===================================================================
--- gcc-4.3.1.orig/gcc/config/rs6000/rs6000.h 2008-01-26 09:18:35.000000000 -0800
+++ gcc-4.3.1/gcc/config/rs6000/rs6000.h 2008-08-23 16:55:30.000000000 -0700
@@ -117,6 +117,8 @@
%{mcpu=G5: -mpower4 -maltivec} \
%{mcpu=8540: -me500} \
%{mcpu=8548: -me500} \
+%{mcpu=e300c2: -mppc} \
+%{mcpu=e300c3: -mppc -mpmr} \
%{maltivec: -maltivec} \
-many"
@@ -262,6 +264,8 @@ enum processor_type
PROCESSOR_PPC7400,
PROCESSOR_PPC7450,
PROCESSOR_PPC8540,
+ PROCESSOR_PPCE300C2,
+ PROCESSOR_PPCE300C3,
PROCESSOR_POWER4,
PROCESSOR_POWER5,
PROCESSOR_POWER6,
Index: gcc-4.3.1/gcc/config/rs6000/rs6000.md
===================================================================
--- gcc-4.3.1.orig/gcc/config/rs6000/rs6000.md 2008-02-13 16:14:45.000000000 -0800
+++ gcc-4.3.1/gcc/config/rs6000/rs6000.md 2008-08-23 16:57:29.000000000 -0700
@@ -133,7 +133,7 @@
;; Processor type -- this attribute must exactly match the processor_type
;; enumeration in rs6000.h.
-(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc440,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,power4,power5,power6,cell"
+(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc440,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,power4,power5,power6,cell,ppce300c2,ppce300c3"
(const (symbol_ref "rs6000_cpu_attr")))
@@ -166,6 +166,7 @@
(include "7xx.md")
(include "7450.md")
(include "8540.md")
+(include "e300c2c3.md")
(include "power4.md")
(include "power5.md")
(include "power6.md")
Index: gcc-4.3.1/gcc/config.gcc
===================================================================
--- gcc-4.3.1.orig/gcc/config.gcc 2008-08-23 16:49:43.000000000 -0700
+++ gcc-4.3.1/gcc/config.gcc 2008-08-23 17:03:55.000000000 -0700
@@ -3144,7 +3144,7 @@ case "${target}" in
| rios | rios1 | rios2 | rsc | rsc1 | rs64a \
| 401 | 403 | 405 | 405fp | 440 | 440fp | 505 \
| 601 | 602 | 603 | 603e | ec603e | 604 \
- | 604e | 620 | 630 | 740 | 750 | 7400 | 7450 \
+ | 604e | 620 | 630 | 740 | 750 | 7400 | 7450 | e300c[23] \
| 854[08] | 801 | 821 | 823 | 860 | 970 | G3 | G4 | G5 | cell)
# OK
;;

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@ -1,25 +0,0 @@
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35964
Index: gcc-4.3.0/gcc/regrename.c
===================================================================
--- gcc-4.3.0.orig/gcc/regrename.c 2008-05-28 08:31:15.000000000 -0700
+++ gcc-4.3.0/gcc/regrename.c 2008-05-28 08:34:00.000000000 -0700
@@ -782,6 +782,10 @@
|| (predicated && recog_data.operand_type[i] == OP_OUT))
recog_data.operand_type[i] = OP_INOUT;
}
+ /* Unshare dup_loc RTL */
+ for (i = 0; i < recog_data.n_dups; i++)
+ *recog_data.dup_loc[i] = copy_rtx(*recog_data.dup_loc[i]);
+
/* Step 1: Close chains for which we have overlapping reads. */
for (i = 0; i < n_ops; i++)
@@ -813,7 +817,7 @@
OP_IN, 0);
for (i = 0; i < recog_data.n_dups; i++)
- *recog_data.dup_loc[i] = copy_rtx (old_dups[i]);
+ *recog_data.dup_loc[i] = old_dups[i];
for (i = 0; i < n_ops; i++)
*recog_data.operand_loc[i] = old_operands[i];
if (recog_data.n_dups)

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@ -1,331 +0,0 @@
#! /bin/sh -e
# DP: Retry the build on an ice, save the calling options and preprocessed
# DP: source when the ice is reproducible.
dir=
if [ $# -eq 3 -a "$2" = '-d' ]; then
pdir="-d $3"
dir="$3/"
elif [ $# -ne 1 ]; then
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
fi
case "$1" in
-patch)
patch $pdir -f --no-backup-if-mismatch -p0 < $0
;;
-unpatch)
patch $pdir -f --no-backup-if-mismatch -R -p0 < $0
;;
*)
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
esac
exit 0
2004-01-23 Jakub Jelinek <jakub@redhat.com>
* system.h (ICE_EXIT_CODE): Define.
* gcc.c (execute): Don't free first string early, but at the end
of the function. Call retry_ice if compiler exited with
ICE_EXIT_CODE.
(retry_ice): New function.
* diagnostic.c (diagnostic_count_diagnostic,
diagnostic_action_after_output, error_recursion): Exit with
ICE_EXIT_CODE instead of FATAL_EXIT_CODE.
--- gcc/diagnostic.c.orig 2007-09-30 10:48:13.000000000 +0000
+++ gcc/diagnostic.c 2007-09-30 10:49:57.000000000 +0000
@@ -244,7 +244,7 @@
fnotice (stderr, "Please submit a full bug report,\n"
"with preprocessed source if appropriate.\n"
"See %s for instructions.\n", bug_report_url);
- exit (ICE_EXIT_CODE);
+ exit (FATAL_EXIT_CODE);
case DK_FATAL:
if (context->abort_on_error)
--- gcc/gcc.c.orig 2007-09-30 10:48:13.000000000 +0000
+++ gcc/gcc.c 2007-09-30 10:48:39.000000000 +0000
@@ -357,6 +357,9 @@
#if defined(HAVE_TARGET_OBJECT_SUFFIX) || defined(HAVE_TARGET_EXECUTABLE_SUFFIX)
static const char *convert_filename (const char *, int, int);
#endif
+#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS))
+static void retry_ice (const char *prog, const char **argv);
+#endif
static const char *getenv_spec_function (int, const char **);
static const char *if_exists_spec_function (int, const char **);
@@ -2999,7 +3002,7 @@
}
}
- if (string != commands[i].prog)
+ if (i && string != commands[i].prog)
free (CONST_CAST (char *, string));
}
@@ -3056,6 +3059,16 @@
else if (WIFEXITED (status)
&& WEXITSTATUS (status) >= MIN_FATAL_STATUS)
{
+#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS))
+ /* For ICEs in cc1, cc1obj, cc1plus see if it is
+ reproducible or not. */
+ char *p;
+ if (WEXITSTATUS (status) == ICE_EXIT_CODE
+ && i == 0
+ && (p = strrchr (commands[0].argv[0], DIR_SEPARATOR))
+ && ! strncmp (p + 1, "cc1", 3))
+ retry_ice (commands[0].prog, commands[0].argv);
+#endif
if (WEXITSTATUS (status) > greatest_status)
greatest_status = WEXITSTATUS (status);
ret_code = -1;
@@ -3076,6 +3089,9 @@
}
}
+ if (commands[0].argv[0] != commands[0].prog)
+ free ((PTR) commands[0].argv[0]);
+
return ret_code;
}
}
@@ -6016,6 +6032,224 @@
switches[switchnum].validated = 1;
}
+#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS))
+#define RETRY_ICE_ATTEMPTS 2
+
+static void
+retry_ice (const char *prog, const char **argv)
+{
+ int nargs, out_arg = -1, quiet = 0, attempt;
+ int pid, retries, sleep_interval;
+ const char **new_argv;
+ char *temp_filenames[RETRY_ICE_ATTEMPTS * 2 + 2];
+
+ if (input_filename == NULL || ! strcmp (input_filename, "-"))
+ return;
+
+ for (nargs = 0; argv[nargs] != NULL; ++nargs)
+ /* Only retry compiler ICEs, not preprocessor ones. */
+ if (! strcmp (argv[nargs], "-E"))
+ return;
+ else if (argv[nargs][0] == '-' && argv[nargs][1] == 'o')
+ {
+ if (out_arg == -1)
+ out_arg = nargs;
+ else
+ return;
+ }
+ /* If the compiler is going to output any time information,
+ it might vary between invocations. */
+ else if (! strcmp (argv[nargs], "-quiet"))
+ quiet = 1;
+ else if (! strcmp (argv[nargs], "-ftime-report"))
+ return;
+
+ if (out_arg == -1 || !quiet)
+ return;
+
+ memset (temp_filenames, '\0', sizeof (temp_filenames));
+ new_argv = alloca ((nargs + 3) * sizeof (const char *));
+ memcpy (new_argv, argv, (nargs + 1) * sizeof (const char *));
+ new_argv[nargs++] = "-frandom-seed=0";
+ new_argv[nargs] = NULL;
+ if (new_argv[out_arg][2] == '\0')
+ new_argv[out_arg + 1] = "-";
+ else
+ new_argv[out_arg] = "-o-";
+
+ for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS + 1; ++attempt)
+ {
+ int fd = -1;
+ int status;
+
+ temp_filenames[attempt * 2] = make_temp_file (".out");
+ temp_filenames[attempt * 2 + 1] = make_temp_file (".err");
+
+ if (attempt == RETRY_ICE_ATTEMPTS)
+ {
+ int i;
+ int fd1, fd2;
+ struct stat st1, st2;
+ size_t n, len;
+ char *buf;
+
+ buf = xmalloc (8192);
+
+ for (i = 0; i < 2; ++i)
+ {
+ fd1 = open (temp_filenames[i], O_RDONLY);
+ fd2 = open (temp_filenames[2 + i], O_RDONLY);
+
+ if (fd1 < 0 || fd2 < 0)
+ {
+ i = -1;
+ close (fd1);
+ close (fd2);
+ break;
+ }
+
+ if (fstat (fd1, &st1) < 0 || fstat (fd2, &st2) < 0)
+ {
+ i = -1;
+ close (fd1);
+ close (fd2);
+ break;
+ }
+
+ if (st1.st_size != st2.st_size)
+ {
+ close (fd1);
+ close (fd2);
+ break;
+ }
+
+ len = 0;
+ for (n = st1.st_size; n; n -= len)
+ {
+ len = n;
+ if (len > 4096)
+ len = 4096;
+
+ if (read (fd1, buf, len) != (int) len
+ || read (fd2, buf + 4096, len) != (int) len)
+ {
+ i = -1;
+ break;
+ }
+
+ if (memcmp (buf, buf + 4096, len) != 0)
+ break;
+ }
+
+ close (fd1);
+ close (fd2);
+
+ if (n)
+ break;
+ }
+
+ free (buf);
+ if (i == -1)
+ break;
+
+ if (i != 2)
+ {
+ notice ("The bug is not reproducible, so it is likely a hardware or OS problem.\n");
+ break;
+ }
+
+ fd = open (temp_filenames[attempt * 2], O_RDWR);
+ if (fd < 0)
+ break;
+ write (fd, "//", 2);
+ for (i = 0; i < nargs; i++)
+ {
+ write (fd, " ", 1);
+ write (fd, new_argv[i], strlen (new_argv[i]));
+ }
+ write (fd, "\n", 1);
+ new_argv[nargs] = "-E";
+ new_argv[nargs + 1] = NULL;
+ }
+
+ /* Fork a subprocess; wait and retry if it fails. */
+ sleep_interval = 1;
+ pid = -1;
+ for (retries = 0; retries < 4; retries++)
+ {
+ pid = fork ();
+ if (pid >= 0)
+ break;
+ sleep (sleep_interval);
+ sleep_interval *= 2;
+ }
+
+ if (pid < 0)
+ break;
+ else if (pid == 0)
+ {
+ if (attempt != RETRY_ICE_ATTEMPTS)
+ fd = open (temp_filenames[attempt * 2], O_RDWR);
+ if (fd < 0)
+ exit (-1);
+ if (fd != 1)
+ {
+ close (1);
+ dup (fd);
+ close (fd);
+ }
+
+ fd = open (temp_filenames[attempt * 2 + 1], O_RDWR);
+ if (fd < 0)
+ exit (-1);
+ if (fd != 2)
+ {
+ close (2);
+ dup (fd);
+ close (fd);
+ }
+
+ if (prog == new_argv[0])
+ execvp (prog, (char *const *) new_argv);
+ else
+ execv (new_argv[0], (char *const *) new_argv);
+ exit (-1);
+ }
+
+ if (waitpid (pid, &status, 0) < 0)
+ break;
+
+ if (attempt < RETRY_ICE_ATTEMPTS
+ && (! WIFEXITED (status) || WEXITSTATUS (status) != ICE_EXIT_CODE))
+ {
+ notice ("The bug is not reproducible, so it is likely a hardware or OS problem.\n");
+ break;
+ }
+ else if (attempt == RETRY_ICE_ATTEMPTS)
+ {
+ close (fd);
+ if (WIFEXITED (status)
+ && WEXITSTATUS (status) == SUCCESS_EXIT_CODE)
+ {
+ notice ("Preprocessed source stored into %s file, please attach this to your bugreport.\n",
+ temp_filenames[attempt * 2]);
+ /* Make sure it is not deleted. */
+ free (temp_filenames[attempt * 2]);
+ temp_filenames[attempt * 2] = NULL;
+ break;
+ }
+ }
+ }
+
+ for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS * 2 + 2; attempt++)
+ if (temp_filenames[attempt])
+ {
+ unlink (temp_filenames[attempt]);
+ free (temp_filenames[attempt]);
+ }
+}
+#endif
+
/* Search for a file named NAME trying various prefixes including the
user's -B prefix and some standard ones.
Return the absolute file name found. If nothing is found, return NAME. */
--- gcc/Makefile.in.orig 2007-09-30 10:48:13.000000000 +0000
+++ gcc/Makefile.in 2007-09-30 10:48:39.000000000 +0000
@@ -192,6 +192,7 @@
build/gengtype-lex.o-warn = -Wno-error
# SYSCALLS.c misses prototypes
SYSCALLS.c.X-warn = -Wno-strict-prototypes -Wno-error
+build/gcc.o-warn = -Wno-error
# All warnings have to be shut off in stage1 if the compiler used then
# isn't gcc; configure determines that. WARN_CFLAGS will be either

View File

@ -1,71 +0,0 @@
#! /bin/sh -e
# DP: Build and install libstdc++_pic.a library.
dir=
if [ $# -eq 3 -a "$2" = '-d' ]; then
pdir="-d $3"
dir="$3/"
elif [ $# -ne 1 ]; then
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
fi
case "$1" in
-patch)
patch $pdir -f --no-backup-if-mismatch -p0 < $0
;;
-unpatch)
patch $pdir -f --no-backup-if-mismatch -R -p0 < $0
;;
*)
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
esac
exit 0
diff -ur libstdc++-v3/src/Makefile.am libstdc++-v3/src/Makefile.am
--- libstdc++-v3/src/Makefile.am~ 2004-04-16 21:04:05.000000000 +0200
+++ libstdc++-v3/src/Makefile.am 2004-07-03 20:22:43.000000000 +0200
@@ -210,6 +210,10 @@
$(OPT_LDFLAGS) $(SECTION_LDFLAGS) $(AM_CXXFLAGS) $(LDFLAGS) -o $@
+install-exec-local:
+ $(AR) cru libstdc++_pic.a .libs/*.o $(top_builddir)/libsupc++/*.o || touch libstdc++_pic.a
+ $(INSTALL_DATA) libstdc++_pic.a $(DESTDIR)$(toolexeclibdir)
+
# Added bits to build debug library.
if GLIBCXX_BUILD_DEBUG
all-local: build_debug
diff -ur libstdc++-v3/src/Makefile.in libstdc++-v3/src/Makefile.in
--- libstdc++-v3/src/Makefile.in 2004-07-03 06:41:13.000000000 +0200
+++ libstdc++-v3/src/Makefile.in 2004-07-03 20:25:05.000000000 +0200
@@ -611,7 +611,7 @@
install-data-am: install-data-local
-install-exec-am: install-toolexeclibLTLIBRARIES
+install-exec-am: install-toolexeclibLTLIBRARIES install-exec-local
install-info: install-info-am
@@ -644,6 +644,7 @@
distclean-libtool distclean-tags distdir dvi dvi-am html \
html-am info info-am install install-am install-data \
install-data-am install-data-local install-exec \
+ install-exec-local \
install-exec-am install-info install-info-am install-man \
install-strip install-toolexeclibLTLIBRARIES installcheck \
installcheck-am installdirs maintainer-clean \
@@ -729,6 +730,11 @@
install_debug:
(cd ${debugdir} && $(MAKE) \
toolexeclibdir=$(glibcxx_toolexeclibdir)/debug install)
+
+install-exec-local:
+ $(AR) cru libstdc++_pic.a .libs/*.o $(top_builddir)/libsupc++/*.o || touch libstdc++_pic.a
+ $(INSTALL_DATA) libstdc++_pic.a $(DESTDIR)$(toolexeclibdir)
+
# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
.NOEXPORT:

View File

@ -1,179 +0,0 @@
#! /bin/sh -e
# DP: <your description>
dir=
if [ $# -eq 3 -a "$2" = '-d' ]; then
pdir="-d $3"
dir="$3/"
elif [ $# -ne 1 ]; then
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
fi
case "$1" in
-patch)
patch $pdir -f --no-backup-if-mismatch -p0 < $0
;;
-unpatch)
patch $pdir -f --no-backup-if-mismatch -R -p0 < $0
;;
*)
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
esac
exit 0
From: "H.J. Lu" <hjl@lucon.org>
Sender: gcc-patches-owner@gcc.gnu.org
To: gcc-patches@gcc.gnu.org
Subject: PATCH: PR target/30961: [4.1/4.2/4.3 regression] redundant reg/mem stores/moves
Date: Mon, 27 Aug 2007 11:34:12 -0700
We start with
(note:HI 3 4 22 2 NOTE_INSN_FUNCTION_BEG)
(insn:HI 6 3 10 2 c.c:3 (set (reg:DF 58 [ <result> ])
(subreg:DF (reg/v:DI 59 [ in ]) 0)) 102 {*movdf_integer_rex64} (expr_list:REG_DEAD (reg/v:DI 59 [ in ])
(nil)))
(insn:HI 10 6 16 2 c.c:7 (set (reg/i:DF 21 xmm0 [ <result> ])
(reg:DF 58 [ <result> ])) 102 {*movdf_integer_rex64} (expr_list:REG_DEAD (reg:DF 58 [ <result> ])
(nil)))
(insn:HI 16 10 0 2 c.c:7 (use (reg/i:DF 21 xmm0 [ <result> ])) -1 (nil))
we are trying to allocate registers for insn 6 and we allocate
xmm0 for the return value. Reload doesn't check if xmm0 can be used for
DF 59, it allocates xmm1 for DF 59 and generates:
Reloads for insn # 6
Reload 0: reload_in (DF) = (reg:DF 5 di)
SSE_REGS, RELOAD_FOR_INPUT (opnum = 1), can't combine
reload_in_reg: (subreg:DF (reg/v:DI 5 di [orig:59 in ] [59]) 0)
reload_reg_rtx: (reg:DF 22 xmm1)
...
(note:HI 4 1 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note:HI 3 4 22 2 NOTE_INSN_FUNCTION_BEG)
(insn 22 3 23 2 c.c:3 (set (mem/c:DF (plus:DI (reg/f:DI 7 sp)
(const_int -8 [0xfffffffffffffff8])) [0 S8 A8])
(reg:DF 5 di)) 102 {*movdf_integer_rex64} (nil))
(insn 23 22 6 2 c.c:3 (set (reg:DF 22 xmm1)
(mem/c:DF (plus:DI (reg/f:DI 7 sp)
(const_int -8 [0xfffffffffffffff8])) [0 S8 A8])) 102 {*movdf_integer_rex64} (nil))
(insn:HI 6 23 16 2 c.c:3 (set (reg:DF 21 xmm0 [orig:58 <result> ] [58])
(reg:DF 22 xmm1)) 102 {*movdf_integer_rex64} (nil))
(insn 16 6 21 2 c.c:7 (use (reg/i:DF 21 xmm0 [ <result> ])) -1 (nil))
This patch tries to use the destination register when reloading for input. It
generates
Reloads for insn # 6
Reload 0: reload_in (DF) = (reg:DF 5 di)
SSE_REGS, RELOAD_FOR_INPUT (opnum = 1), can't combine
reload_in_reg: (subreg:DF (reg/v:DI 5 di [orig:59 in ] [59]) 0)
reload_reg_rtx: (reg:DF 21 xmm0)
...
(note:HI 4 1 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note:HI 3 4 22 2 NOTE_INSN_FUNCTION_BEG)
(insn 22 3 23 2 c.c:3 (set (mem/c:DF (plus:DI (reg/f:DI 7 sp)
(const_int -8 [0xfffffffffffffff8])) [0 S8 A8])
(reg:DF 5 di)) 102 {*movdf_integer_rex64} (nil))
(insn 23 22 6 2 c.c:3 (set (reg:DF 21 xmm0)
(mem/c:DF (plus:DI (reg/f:DI 7 sp)
(const_int -8 [0xfffffffffffffff8])) [0 S8 A8])) 102 {*movdf_integer_rex64} (nil))
(insn:HI 6 23 10 2 c.c:3 (set (reg:DF 22 xmm1 [orig:58 <result> ] [58])
(reg:DF 21 xmm0)) 102 {*movdf_integer_rex64} (nil))
(insn:HI 10 6 16 2 c.c:7 (set (reg/i:DF 21 xmm0 [ <result> ])
(reg:DF 22 xmm1 [orig:58 <result> ] [58])) 102 {*movdf_integer_rex64} (nil))
(insn 16 10 21 2 c.c:7 (use (reg/i:DF 21 xmm0 [ <result> ])) -1 (nil))
H.J.
----
gcc/
2007-08-27 H.J. Lu <hongjiu.lu@intel.com>
PR target/30961
* reload1.c (find_reg): Favor the hard register in destination
if it is usable and a memory location is needed for reload
input.
gcc/testsuite/
2007-08-27 H.J. Lu <hongjiu.lu@intel.com>
PR target/30961
* gcc.target/i386/pr30961-1.c: New.
--- gcc/reload1.c.second 2007-08-27 09:35:08.000000000 -0700
+++ gcc/reload1.c 2007-08-27 09:36:33.000000000 -0700
@@ -1781,6 +1781,20 @@ find_reg (struct insn_chain *chain, int
HARD_REG_SET not_usable;
HARD_REG_SET used_by_other_reload;
reg_set_iterator rsi;
+#ifdef SECONDARY_MEMORY_NEEDED
+ rtx body = PATTERN (chain->insn);
+ unsigned int dest_reg = FIRST_PSEUDO_REGISTER;
+
+ if (GET_CODE (body) == SET)
+ {
+ rtx dest = SET_DEST (body);
+
+ if ((REG_P (dest)
+ || (GET_CODE (dest) == SUBREG
+ && REG_P (SUBREG_REG (dest)))))
+ dest_reg = reg_or_subregno (dest);
+ }
+#endif
COPY_HARD_REG_SET (not_usable, bad_spill_regs);
IOR_HARD_REG_SET (not_usable, bad_spill_regs_global);
@@ -1821,6 +1835,18 @@ find_reg (struct insn_chain *chain, int
this_cost--;
if (rl->out && REG_P (rl->out) && REGNO (rl->out) == regno)
this_cost--;
+#ifdef SECONDARY_MEMORY_NEEDED
+ /* If a memory location is needed for rl->in and dest_reg
+ is usable, we will favor it. */
+ else if (dest_reg == regno
+ && rl->in
+ && REG_P (rl->in)
+ && REGNO (rl->in) < FIRST_PSEUDO_REGISTER
+ && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (rl->in)),
+ rl->class,
+ rl->mode))
+ this_cost = 0;
+#endif
if (this_cost < best_cost
/* Among registers with equal cost, prefer caller-saved ones, or
use REG_ALLOC_ORDER if it is defined. */
--- gcc/testsuite/gcc.target/i386/pr30961-1.c.second 2007-08-27 11:01:59.000000000 -0700
+++ gcc/testsuite/gcc.target/i386/pr30961-1.c 2007-08-27 11:02:51.000000000 -0700
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2" } */
+
+double
+convert (long long in)
+{
+ double f;
+ __builtin_memcpy( &f, &in, sizeof( in ) );
+ return f;
+}
+
+/* { dg-final { scan-assembler-not "movapd" } } */

View File

@ -1,38 +0,0 @@
Fix PR 35942: remove -lstdc++ from libtool postdeps for CXX.
libstdc++-v3/ChangeLog:
2010-01-04 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
PR libstdc++/35942
* configure.ac: Remove -lstdc++ from libtool's postdeps_CXX.
* configure: Regenerate.
Index: gcc-4.3.3/libstdc++-v3/configure
===================================================================
--- gcc-4.3.3.orig/libstdc++-v3/configure 2010-03-26 17:57:51.000000000 +0000
+++ gcc-4.3.3/libstdc++-v3/configure 2010-03-26 17:57:58.000000000 +0000
@@ -13759,6 +13759,9 @@
+# Eliminate -lstdc++ addition to postdeps for cross compiles.
+postdeps_CXX=`echo " $postdeps_CXX " | sed 's, -lstdc++ ,,g'`
+
# Possibly disable most of the library.
## TODO: Consider skipping unncessary tests altogether in this case, rather
## than just ignoring the results. Faster /and/ more correct, win win.
Index: gcc-4.3.3/libstdc++-v3/configure.ac
===================================================================
--- gcc-4.3.3.orig/libstdc++-v3/configure.ac 2010-03-26 17:57:54.000000000 +0000
+++ gcc-4.3.3/libstdc++-v3/configure.ac 2010-03-26 17:57:58.000000000 +0000
@@ -89,6 +89,9 @@
AC_SUBST(enable_shared)
AC_SUBST(enable_static)
+# Eliminate -lstdc++ addition to postdeps for cross compiles.
+postdeps_CXX=`echo " $postdeps_CXX " | sed 's, -lstdc++ ,,g'`
+
# Possibly disable most of the library.
## TODO: Consider skipping unncessary tests altogether in this case, rather
## than just ignoring the results. Faster /and/ more correct, win win.

View File

@ -1,19 +0,0 @@
This patch fixes a bug into ostream::operator<<(double) due to the wrong size
passed into the __convert_from_v method. The wrong size is then passed to
std::snprintf function, that, on uClibc, doens't handle sized 0 buffer.
Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>
Index: gcc-4.3.1/libstdc++-v3/include/bits/locale_facets.tcc
===================================================================
--- gcc-4.3.1.orig/libstdc++-v3/include/bits/locale_facets.tcc 2007-11-26 17:59:41.000000000 -0800
+++ gcc-4.3.1/libstdc++-v3/include/bits/locale_facets.tcc 2008-08-16 02:14:48.000000000 -0700
@@ -1004,7 +1004,7 @@
const int __cs_size = __fixed ? __max_exp + __prec + 4
: __max_digits * 2 + __prec;
char* __cs = static_cast<char*>(__builtin_alloca(__cs_size));
- __len = std::__convert_from_v(_S_get_c_locale(), __cs, 0, __fbuf,
+ __len = std::__convert_from_v(_S_get_c_locale(), __cs, __cs_size, __fbuf,
__prec, __v);
#endif

View File

@ -1,20 +0,0 @@
--- gcc-4.1.0/libstdc++-v3/fragment.am 2005-03-21 11:40:14.000000000 -0600
+++ gcc-4.1.0-patched/libstdc++-v3/fragment.am 2005-04-25 20:14:39.856251785 -0500
@@ -21,5 +21,5 @@
$(WARN_FLAGS) $(WERROR) -fdiagnostics-show-location=once
# -I/-D flags to pass when compiling.
-AM_CPPFLAGS = $(GLIBCXX_INCLUDES)
+AM_CPPFLAGS = $(GLIBCXX_INCLUDES) -I$(toplevel_srcdir)/include
--- gcc-4.1.0/libstdc++-v3/libmath/Makefile.am 2005-03-21 11:40:18.000000000 -0600
+++ gcc-4.1.0-patched/libstdc++-v3/libmath/Makefile.am 2005-04-25 20:14:39.682280735 -0500
@@ -35,7 +35,7 @@
libmath_la_SOURCES = stubs.c
-AM_CPPFLAGS = $(CANADIAN_INCLUDES)
+AM_CPPFLAGS = $(CANADIAN_INCLUDES) -I$(toplevel_srcdir)/include
# Only compiling "C" sources in this directory.
LIBTOOL = @LIBTOOL@ --tag CC

View File

@ -1,13 +0,0 @@
Index: gcc-4.5/gcc/config/arm/arm.md
===================================================================
--- gcc-4.5.orig/gcc/config/arm/arm.md 2010-06-17 09:13:07.000000000 -0700
+++ gcc-4.5/gcc/config/arm/arm.md 2010-06-22 08:08:45.397212002 -0700
@@ -11267,7 +11267,7 @@
(define_expand "bswapsi2"
[(set (match_operand:SI 0 "s_register_operand" "=r")
(bswap:SI (match_operand:SI 1 "s_register_operand" "r")))]
-"TARGET_EITHER"
+"TARGET_EITHER && (arm_arch6 && !optimize_size)"
"
if (!arm_arch6)
{

View File

@ -1,36 +0,0 @@
#! /bin/sh -e
# DP: Fix armv4t build on ARM
dir=
if [ $# -eq 3 -a "$2" = '-d' ]; then
pdir="-d $3"
dir="$3/"
elif [ $# -ne 1 ]; then
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
fi
case "$1" in
-patch)
patch $pdir -f --no-backup-if-mismatch -p1 < $0
;;
-unpatch)
patch $pdir -f --no-backup-if-mismatch -R -p1 < $0
;;
*)
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
esac
exit 0
--- src/gcc/config/arm/linux-eabi.h.orig 2007-11-24 12:37:38.000000000 +0000
+++ src/gcc/config/arm/linux-eabi.h 2007-11-24 12:39:41.000000000 +0000
@@ -44,7 +44,7 @@
The ARM10TDMI core is the default for armv5t, so set
SUBTARGET_CPU_DEFAULT to achieve this. */
#undef SUBTARGET_CPU_DEFAULT
-#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm10tdmi
+#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm9tdmi
/* TARGET_BIG_ENDIAN_DEFAULT is set in
config.gcc for big endian configurations. */

View File

@ -1,319 +0,0 @@
Adds support for Freescale Power architecture e300c2 and e300c3 cores.
http://www.bitshrine.org/gpp/tc-fsl-x86lnx-e300c3-nptl-4.0.2-2.src.rpm
Leon Woestenberg <leonw@mailcan.com>
---
gcc/config.gcc | 2
gcc/config/rs6000/e300c2c3.md | 189 ++++++++++++++++++++++++++++++++++++++++++
gcc/config/rs6000/rs6000.c | 24 +++++
gcc/config/rs6000/rs6000.h | 4
gcc/config/rs6000/rs6000.md | 3
5 files changed, 220 insertions(+), 2 deletions(-)
Index: gcc-4.3.1/gcc/config/rs6000/e300c2c3.md
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gcc-4.3.1/gcc/config/rs6000/e300c2c3.md 2008-08-23 16:51:33.000000000 -0700
@@ -0,0 +1,189 @@
+;; Pipeline description for Motorola PowerPC e300c3 core.
+;; Copyright (C) 2003 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 2, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+;; License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING. If not, write to the
+;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
+;; MA 02111-1307, USA.
+
+(define_automaton "ppce300c3_most,ppce300c3_long,ppce300c3_retire")
+(define_cpu_unit "ppce300c3_decode_0,ppce300c3_decode_1" "ppce300c3_most")
+
+;; We don't simulate general issue queue (GIC). If we have SU insn
+;; and then SU1 insn, they can not be issued on the same cycle
+;; (although SU1 insn and then SU insn can be issued) because the SU
+;; insn will go to SU1 from GIC0 entry. Fortunately, the first cycle
+;; multipass insn scheduling will find the situation and issue the SU1
+;; insn and then the SU insn.
+(define_cpu_unit "ppce300c3_issue_0,ppce300c3_issue_1" "ppce300c3_most")
+
+;; We could describe completion buffers slots in combination with the
+;; retirement units and the order of completion but the result
+;; automaton would behave in the same way because we can not describe
+;; real latency time with taking in order completion into account.
+;; Actually we could define the real latency time by querying reserved
+;; automaton units but the current scheduler uses latency time before
+;; issuing insns and making any reservations.
+;;
+;; So our description is aimed to achieve a insn schedule in which the
+;; insns would not wait in the completion buffer.
+(define_cpu_unit "ppce300c3_retire_0,ppce300c3_retire_1" "ppce300c3_retire")
+
+;; Branch unit:
+(define_cpu_unit "ppce300c3_bu" "ppce300c3_most")
+
+;; IU:
+(define_cpu_unit "ppce300c3_iu0_stage0,ppce300c3_iu1_stage0" "ppce300c3_most")
+
+;; IU: This used to describe non-pipelined division.
+(define_cpu_unit "ppce300c3_mu_div" "ppce300c3_long")
+
+;; SRU:
+(define_cpu_unit "ppce300c3_sru_stage0" "ppce300c3_most")
+
+;; Here we simplified LSU unit description not describing the stages.
+(define_cpu_unit "ppce300c3_lsu" "ppce300c3_most")
+
+;; FPU:
+(define_cpu_unit "ppce300c3_fpu" "ppce300c3_most")
+
+;; The following units are used to make automata deterministic
+(define_cpu_unit "present_ppce300c3_decode_0" "ppce300c3_most")
+(define_cpu_unit "present_ppce300c3_issue_0" "ppce300c3_most")
+(define_cpu_unit "present_ppce300c3_retire_0" "ppce300c3_retire")
+(define_cpu_unit "present_ppce300c3_iu0_stage0" "ppce300c3_most")
+
+;; The following sets to make automata deterministic when option ndfa is used.
+(presence_set "present_ppce300c3_decode_0" "ppce300c3_decode_0")
+(presence_set "present_ppce300c3_issue_0" "ppce300c3_issue_0")
+(presence_set "present_ppce300c3_retire_0" "ppce300c3_retire_0")
+(presence_set "present_ppce300c3_iu0_stage0" "ppce300c3_iu0_stage0")
+
+;; Some useful abbreviations.
+(define_reservation "ppce300c3_decode"
+ "ppce300c3_decode_0|ppce300c3_decode_1+present_ppce300c3_decode_0")
+(define_reservation "ppce300c3_issue"
+ "ppce300c3_issue_0|ppce300c3_issue_1+present_ppce300c3_issue_0")
+(define_reservation "ppce300c3_retire"
+ "ppce300c3_retire_0|ppce300c3_retire_1+present_ppce300c3_retire_0")
+(define_reservation "ppce300c3_iu_stage0"
+ "ppce300c3_iu0_stage0|ppce300c3_iu1_stage0+present_ppce300c3_iu0_stage0")
+
+;; Compares can be executed either one of the IU or SRU
+(define_insn_reservation "ppce300c3_cmp" 1
+ (and (eq_attr "type" "cmp,compare,delayed_compare,fast_compare")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+(ppce300c3_iu_stage0|ppce300c3_sru_stage0) \
+ +ppce300c3_retire")
+
+;; Other one cycle IU insns
+(define_insn_reservation "ppce300c3_iu" 1
+ (and (eq_attr "type" "integer,insert_word")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_iu_stage0+ppce300c3_retire")
+
+;; Branch. Actually this latency time is not used by the scheduler.
+(define_insn_reservation "ppce300c3_branch" 1
+ (and (eq_attr "type" "jmpreg,branch")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_bu,ppce300c3_retire")
+
+;; Multiply is non-pipelined but can be executed in any IU
+(define_insn_reservation "ppce300c3_multiply" 2
+ (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_iu_stage0, \
+ ppce300c3_iu_stage0+ppce300c3_retire")
+
+;; Divide. We use the average latency time here. We omit reserving a
+;; retire unit because of the result automata will be huge.
+(define_insn_reservation "ppce300c3_divide" 20
+ (and (eq_attr "type" "idiv")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_iu_stage0+ppce300c3_mu_div,\
+ ppce300c3_mu_div*19")
+
+;; CR logical
+(define_insn_reservation "ppce300c3_cr_logical" 1
+ (and (eq_attr "type" "cr_logical,delayed_cr")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
+
+;; Mfcr
+(define_insn_reservation "ppce300c3_mfcr" 1
+ (and (eq_attr "type" "mfcr")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
+
+;; Mtcrf
+(define_insn_reservation "ppce300c3_mtcrf" 1
+ (and (eq_attr "type" "mtcr")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
+
+;; Mtjmpr
+(define_insn_reservation "ppce300c3_mtjmpr" 1
+ (and (eq_attr "type" "mtjmpr,mfjmpr")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
+
+;; Float point instructions
+(define_insn_reservation "ppce300c3_fpcompare" 3
+ (and (eq_attr "type" "fpcompare")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,nothing,ppce300c3_retire")
+
+(define_insn_reservation "ppce300c3_fp" 3
+ (and (eq_attr "type" "fp")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,nothing,ppce300c3_retire")
+
+(define_insn_reservation "ppce300c3_dmul" 4
+ (and (eq_attr "type" "dmul")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,ppce300c3_fpu,nothing,ppce300c3_retire")
+
+; Divides are not pipelined
+(define_insn_reservation "ppce300c3_sdiv" 18
+ (and (eq_attr "type" "sdiv")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,ppce300c3_fpu*17")
+
+(define_insn_reservation "ppce300c3_ddiv" 33
+ (and (eq_attr "type" "ddiv")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,ppce300c3_fpu*32")
+
+;; Loads
+(define_insn_reservation "ppce300c3_load" 2
+ (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
+
+(define_insn_reservation "ppce300c3_fpload" 2
+ (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
+
+;; Stores.
+(define_insn_reservation "ppce300c3_store" 2
+ (and (eq_attr "type" "store,store_ux,store_u")
+ (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
+
+(define_insn_reservation "ppce300c3_fpstore" 2
+ (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u")
+ (eq_attr "cpu" "ppce300c3"))
+ "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
Index: gcc-4.3.1/gcc/config/rs6000/rs6000.c
===================================================================
--- gcc-4.3.1.orig/gcc/config/rs6000/rs6000.c 2008-08-23 16:49:39.000000000 -0700
+++ gcc-4.3.1/gcc/config/rs6000/rs6000.c 2008-08-23 16:54:25.000000000 -0700
@@ -669,6 +669,21 @@ struct processor_costs ppc8540_cost = {
1, /* prefetch streams /*/
};
+/* Instruction costs on E300C2 and E300C3 cores. */
+static const
+struct processor_costs ppce300c2c3_cost = {
+ COSTS_N_INSNS (4), /* mulsi */
+ COSTS_N_INSNS (4), /* mulsi_const */
+ COSTS_N_INSNS (4), /* mulsi_const9 */
+ COSTS_N_INSNS (4), /* muldi */
+ COSTS_N_INSNS (19), /* divsi */
+ COSTS_N_INSNS (19), /* divdi */
+ COSTS_N_INSNS (3), /* fp */
+ COSTS_N_INSNS (4), /* dmul */
+ COSTS_N_INSNS (18), /* sdiv */
+ COSTS_N_INSNS (33), /* ddiv */
+};
+
/* Instruction costs on POWER4 and POWER5 processors. */
static const
struct processor_costs power4_cost = {
@@ -1420,6 +1435,8 @@ rs6000_override_options (const char *def
{"8540", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_STRICT_ALIGN},
/* 8548 has a dummy entry for now. */
{"8548", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_STRICT_ALIGN},
+ {"e300c2", PROCESSOR_PPCE300C2, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
+ {"e300c3", PROCESSOR_PPCE300C3, POWERPC_BASE_MASK},
{"860", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
{"970", PROCESSOR_POWER4,
POWERPC_7400_MASK | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64},
@@ -1845,6 +1862,11 @@ rs6000_override_options (const char *def
rs6000_cost = &ppc8540_cost;
break;
+ case PROCESSOR_PPCE300C2:
+ case PROCESSOR_PPCE300C3:
+ rs6000_cost = &ppce300c2c3_cost;
+ break;
+
case PROCESSOR_POWER4:
case PROCESSOR_POWER5:
rs6000_cost = &power4_cost;
@@ -18606,6 +18628,8 @@ rs6000_issue_rate (void)
case CPU_PPC7400:
case CPU_PPC8540:
case CPU_CELL:
+ case CPU_PPCE300C2:
+ case CPU_PPCE300C3:
return 2;
case CPU_RIOS2:
case CPU_PPC604:
Index: gcc-4.3.1/gcc/config/rs6000/rs6000.h
===================================================================
--- gcc-4.3.1.orig/gcc/config/rs6000/rs6000.h 2008-01-26 09:18:35.000000000 -0800
+++ gcc-4.3.1/gcc/config/rs6000/rs6000.h 2008-08-23 16:55:30.000000000 -0700
@@ -117,6 +117,8 @@
%{mcpu=G5: -mpower4 -maltivec} \
%{mcpu=8540: -me500} \
%{mcpu=8548: -me500} \
+%{mcpu=e300c2: -mppc} \
+%{mcpu=e300c3: -mppc -mpmr} \
%{maltivec: -maltivec} \
-many"
@@ -262,6 +264,8 @@ enum processor_type
PROCESSOR_PPC7400,
PROCESSOR_PPC7450,
PROCESSOR_PPC8540,
+ PROCESSOR_PPCE300C2,
+ PROCESSOR_PPCE300C3,
PROCESSOR_POWER4,
PROCESSOR_POWER5,
PROCESSOR_POWER6,
Index: gcc-4.3.1/gcc/config/rs6000/rs6000.md
===================================================================
--- gcc-4.3.1.orig/gcc/config/rs6000/rs6000.md 2008-02-13 16:14:45.000000000 -0800
+++ gcc-4.3.1/gcc/config/rs6000/rs6000.md 2008-08-23 16:57:29.000000000 -0700
@@ -133,7 +133,7 @@
;; Processor type -- this attribute must exactly match the processor_type
;; enumeration in rs6000.h.
-(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc440,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,power4,power5,power6,cell"
+(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc440,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,power4,power5,power6,cell,ppce300c2,ppce300c3"
(const (symbol_ref "rs6000_cpu_attr")))
@@ -166,6 +166,7 @@
(include "7xx.md")
(include "7450.md")
(include "8540.md")
+(include "e300c2c3.md")
(include "power4.md")
(include "power5.md")
(include "power6.md")
Index: gcc-4.3.1/gcc/config.gcc
===================================================================
--- gcc-4.3.1.orig/gcc/config.gcc 2008-08-23 16:49:43.000000000 -0700
+++ gcc-4.3.1/gcc/config.gcc 2008-08-23 17:03:55.000000000 -0700
@@ -3144,7 +3144,7 @@ case "${target}" in
| rios | rios1 | rios2 | rsc | rsc1 | rs64a \
| 401 | 403 | 405 | 405fp | 440 | 440fp | 505 \
| 601 | 602 | 603 | 603e | ec603e | 604 \
- | 604e | 620 | 630 | 740 | 750 | 7400 | 7450 \
+ | 604e | 620 | 630 | 740 | 750 | 7400 | 7450 | e300c[23] \
| 854[08] | 801 | 821 | 823 | 860 | 970 | G3 | G4 | G5 | cell)
# OK
;;

View File

@ -1,25 +0,0 @@
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35964
Index: gcc-4.3.0/gcc/regrename.c
===================================================================
--- gcc-4.3.0.orig/gcc/regrename.c 2008-05-28 08:31:15.000000000 -0700
+++ gcc-4.3.0/gcc/regrename.c 2008-05-28 08:34:00.000000000 -0700
@@ -782,6 +782,10 @@
|| (predicated && recog_data.operand_type[i] == OP_OUT))
recog_data.operand_type[i] = OP_INOUT;
}
+ /* Unshare dup_loc RTL */
+ for (i = 0; i < recog_data.n_dups; i++)
+ *recog_data.dup_loc[i] = copy_rtx(*recog_data.dup_loc[i]);
+
/* Step 1: Close chains for which we have overlapping reads. */
for (i = 0; i < n_ops; i++)
@@ -813,7 +817,7 @@
OP_IN, 0);
for (i = 0; i < recog_data.n_dups; i++)
- *recog_data.dup_loc[i] = copy_rtx (old_dups[i]);
+ *recog_data.dup_loc[i] = old_dups[i];
for (i = 0; i < n_ops; i++)
*recog_data.operand_loc[i] = old_operands[i];
if (recog_data.n_dups)

View File

@ -1,331 +0,0 @@
#! /bin/sh -e
# DP: Retry the build on an ice, save the calling options and preprocessed
# DP: source when the ice is reproducible.
dir=
if [ $# -eq 3 -a "$2" = '-d' ]; then
pdir="-d $3"
dir="$3/"
elif [ $# -ne 1 ]; then
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
fi
case "$1" in
-patch)
patch $pdir -f --no-backup-if-mismatch -p0 < $0
;;
-unpatch)
patch $pdir -f --no-backup-if-mismatch -R -p0 < $0
;;
*)
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
esac
exit 0
2004-01-23 Jakub Jelinek <jakub@redhat.com>
* system.h (ICE_EXIT_CODE): Define.
* gcc.c (execute): Don't free first string early, but at the end
of the function. Call retry_ice if compiler exited with
ICE_EXIT_CODE.
(retry_ice): New function.
* diagnostic.c (diagnostic_count_diagnostic,
diagnostic_action_after_output, error_recursion): Exit with
ICE_EXIT_CODE instead of FATAL_EXIT_CODE.
--- gcc/diagnostic.c.orig 2007-09-30 10:48:13.000000000 +0000
+++ gcc/diagnostic.c 2007-09-30 10:49:57.000000000 +0000
@@ -244,7 +244,7 @@
fnotice (stderr, "Please submit a full bug report,\n"
"with preprocessed source if appropriate.\n"
"See %s for instructions.\n", bug_report_url);
- exit (ICE_EXIT_CODE);
+ exit (FATAL_EXIT_CODE);
case DK_FATAL:
if (context->abort_on_error)
--- gcc/gcc.c.orig 2007-09-30 10:48:13.000000000 +0000
+++ gcc/gcc.c 2007-09-30 10:48:39.000000000 +0000
@@ -357,6 +357,9 @@
#if defined(HAVE_TARGET_OBJECT_SUFFIX) || defined(HAVE_TARGET_EXECUTABLE_SUFFIX)
static const char *convert_filename (const char *, int, int);
#endif
+#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS))
+static void retry_ice (const char *prog, const char **argv);
+#endif
static const char *getenv_spec_function (int, const char **);
static const char *if_exists_spec_function (int, const char **);
@@ -2999,7 +3002,7 @@
}
}
- if (string != commands[i].prog)
+ if (i && string != commands[i].prog)
free (CONST_CAST (char *, string));
}
@@ -3056,6 +3059,16 @@
else if (WIFEXITED (status)
&& WEXITSTATUS (status) >= MIN_FATAL_STATUS)
{
+#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS))
+ /* For ICEs in cc1, cc1obj, cc1plus see if it is
+ reproducible or not. */
+ char *p;
+ if (WEXITSTATUS (status) == ICE_EXIT_CODE
+ && i == 0
+ && (p = strrchr (commands[0].argv[0], DIR_SEPARATOR))
+ && ! strncmp (p + 1, "cc1", 3))
+ retry_ice (commands[0].prog, commands[0].argv);
+#endif
if (WEXITSTATUS (status) > greatest_status)
greatest_status = WEXITSTATUS (status);
ret_code = -1;
@@ -3076,6 +3089,9 @@
}
}
+ if (commands[0].argv[0] != commands[0].prog)
+ free ((PTR) commands[0].argv[0]);
+
return ret_code;
}
}
@@ -6016,6 +6032,224 @@
switches[switchnum].validated = 1;
}
+#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS))
+#define RETRY_ICE_ATTEMPTS 2
+
+static void
+retry_ice (const char *prog, const char **argv)
+{
+ int nargs, out_arg = -1, quiet = 0, attempt;
+ int pid, retries, sleep_interval;
+ const char **new_argv;
+ char *temp_filenames[RETRY_ICE_ATTEMPTS * 2 + 2];
+
+ if (input_filename == NULL || ! strcmp (input_filename, "-"))
+ return;
+
+ for (nargs = 0; argv[nargs] != NULL; ++nargs)
+ /* Only retry compiler ICEs, not preprocessor ones. */
+ if (! strcmp (argv[nargs], "-E"))
+ return;
+ else if (argv[nargs][0] == '-' && argv[nargs][1] == 'o')
+ {
+ if (out_arg == -1)
+ out_arg = nargs;
+ else
+ return;
+ }
+ /* If the compiler is going to output any time information,
+ it might vary between invocations. */
+ else if (! strcmp (argv[nargs], "-quiet"))
+ quiet = 1;
+ else if (! strcmp (argv[nargs], "-ftime-report"))
+ return;
+
+ if (out_arg == -1 || !quiet)
+ return;
+
+ memset (temp_filenames, '\0', sizeof (temp_filenames));
+ new_argv = alloca ((nargs + 3) * sizeof (const char *));
+ memcpy (new_argv, argv, (nargs + 1) * sizeof (const char *));
+ new_argv[nargs++] = "-frandom-seed=0";
+ new_argv[nargs] = NULL;
+ if (new_argv[out_arg][2] == '\0')
+ new_argv[out_arg + 1] = "-";
+ else
+ new_argv[out_arg] = "-o-";
+
+ for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS + 1; ++attempt)
+ {
+ int fd = -1;
+ int status;
+
+ temp_filenames[attempt * 2] = make_temp_file (".out");
+ temp_filenames[attempt * 2 + 1] = make_temp_file (".err");
+
+ if (attempt == RETRY_ICE_ATTEMPTS)
+ {
+ int i;
+ int fd1, fd2;
+ struct stat st1, st2;
+ size_t n, len;
+ char *buf;
+
+ buf = xmalloc (8192);
+
+ for (i = 0; i < 2; ++i)
+ {
+ fd1 = open (temp_filenames[i], O_RDONLY);
+ fd2 = open (temp_filenames[2 + i], O_RDONLY);
+
+ if (fd1 < 0 || fd2 < 0)
+ {
+ i = -1;
+ close (fd1);
+ close (fd2);
+ break;
+ }
+
+ if (fstat (fd1, &st1) < 0 || fstat (fd2, &st2) < 0)
+ {
+ i = -1;
+ close (fd1);
+ close (fd2);
+ break;
+ }
+
+ if (st1.st_size != st2.st_size)
+ {
+ close (fd1);
+ close (fd2);
+ break;
+ }
+
+ len = 0;
+ for (n = st1.st_size; n; n -= len)
+ {
+ len = n;
+ if (len > 4096)
+ len = 4096;
+
+ if (read (fd1, buf, len) != (int) len
+ || read (fd2, buf + 4096, len) != (int) len)
+ {
+ i = -1;
+ break;
+ }
+
+ if (memcmp (buf, buf + 4096, len) != 0)
+ break;
+ }
+
+ close (fd1);
+ close (fd2);
+
+ if (n)
+ break;
+ }
+
+ free (buf);
+ if (i == -1)
+ break;
+
+ if (i != 2)
+ {
+ notice ("The bug is not reproducible, so it is likely a hardware or OS problem.\n");
+ break;
+ }
+
+ fd = open (temp_filenames[attempt * 2], O_RDWR);
+ if (fd < 0)
+ break;
+ write (fd, "//", 2);
+ for (i = 0; i < nargs; i++)
+ {
+ write (fd, " ", 1);
+ write (fd, new_argv[i], strlen (new_argv[i]));
+ }
+ write (fd, "\n", 1);
+ new_argv[nargs] = "-E";
+ new_argv[nargs + 1] = NULL;
+ }
+
+ /* Fork a subprocess; wait and retry if it fails. */
+ sleep_interval = 1;
+ pid = -1;
+ for (retries = 0; retries < 4; retries++)
+ {
+ pid = fork ();
+ if (pid >= 0)
+ break;
+ sleep (sleep_interval);
+ sleep_interval *= 2;
+ }
+
+ if (pid < 0)
+ break;
+ else if (pid == 0)
+ {
+ if (attempt != RETRY_ICE_ATTEMPTS)
+ fd = open (temp_filenames[attempt * 2], O_RDWR);
+ if (fd < 0)
+ exit (-1);
+ if (fd != 1)
+ {
+ close (1);
+ dup (fd);
+ close (fd);
+ }
+
+ fd = open (temp_filenames[attempt * 2 + 1], O_RDWR);
+ if (fd < 0)
+ exit (-1);
+ if (fd != 2)
+ {
+ close (2);
+ dup (fd);
+ close (fd);
+ }
+
+ if (prog == new_argv[0])
+ execvp (prog, (char *const *) new_argv);
+ else
+ execv (new_argv[0], (char *const *) new_argv);
+ exit (-1);
+ }
+
+ if (waitpid (pid, &status, 0) < 0)
+ break;
+
+ if (attempt < RETRY_ICE_ATTEMPTS
+ && (! WIFEXITED (status) || WEXITSTATUS (status) != ICE_EXIT_CODE))
+ {
+ notice ("The bug is not reproducible, so it is likely a hardware or OS problem.\n");
+ break;
+ }
+ else if (attempt == RETRY_ICE_ATTEMPTS)
+ {
+ close (fd);
+ if (WIFEXITED (status)
+ && WEXITSTATUS (status) == SUCCESS_EXIT_CODE)
+ {
+ notice ("Preprocessed source stored into %s file, please attach this to your bugreport.\n",
+ temp_filenames[attempt * 2]);
+ /* Make sure it is not deleted. */
+ free (temp_filenames[attempt * 2]);
+ temp_filenames[attempt * 2] = NULL;
+ break;
+ }
+ }
+ }
+
+ for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS * 2 + 2; attempt++)
+ if (temp_filenames[attempt])
+ {
+ unlink (temp_filenames[attempt]);
+ free (temp_filenames[attempt]);
+ }
+}
+#endif
+
/* Search for a file named NAME trying various prefixes including the
user's -B prefix and some standard ones.
Return the absolute file name found. If nothing is found, return NAME. */
--- gcc/Makefile.in.orig 2007-09-30 10:48:13.000000000 +0000
+++ gcc/Makefile.in 2007-09-30 10:48:39.000000000 +0000
@@ -192,6 +192,7 @@
build/gengtype-lex.o-warn = -Wno-error
# SYSCALLS.c misses prototypes
SYSCALLS.c.X-warn = -Wno-strict-prototypes -Wno-error
+build/gcc.o-warn = -Wno-error
# All warnings have to be shut off in stage1 if the compiler used then
# isn't gcc; configure determines that. WARN_CFLAGS will be either

View File

@ -1,71 +0,0 @@
#! /bin/sh -e
# DP: Build and install libstdc++_pic.a library.
dir=
if [ $# -eq 3 -a "$2" = '-d' ]; then
pdir="-d $3"
dir="$3/"
elif [ $# -ne 1 ]; then
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
fi
case "$1" in
-patch)
patch $pdir -f --no-backup-if-mismatch -p0 < $0
;;
-unpatch)
patch $pdir -f --no-backup-if-mismatch -R -p0 < $0
;;
*)
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
esac
exit 0
diff -ur libstdc++-v3/src/Makefile.am libstdc++-v3/src/Makefile.am
--- libstdc++-v3/src/Makefile.am~ 2004-04-16 21:04:05.000000000 +0200
+++ libstdc++-v3/src/Makefile.am 2004-07-03 20:22:43.000000000 +0200
@@ -210,6 +210,10 @@
$(OPT_LDFLAGS) $(SECTION_LDFLAGS) $(AM_CXXFLAGS) $(LDFLAGS) -o $@
+install-exec-local:
+ $(AR) cru libstdc++_pic.a .libs/*.o $(top_builddir)/libsupc++/*.o || touch libstdc++_pic.a
+ $(INSTALL_DATA) libstdc++_pic.a $(DESTDIR)$(toolexeclibdir)
+
# Added bits to build debug library.
if GLIBCXX_BUILD_DEBUG
all-local: build_debug
diff -ur libstdc++-v3/src/Makefile.in libstdc++-v3/src/Makefile.in
--- libstdc++-v3/src/Makefile.in 2004-07-03 06:41:13.000000000 +0200
+++ libstdc++-v3/src/Makefile.in 2004-07-03 20:25:05.000000000 +0200
@@ -611,7 +611,7 @@
install-data-am: install-data-local
-install-exec-am: install-toolexeclibLTLIBRARIES
+install-exec-am: install-toolexeclibLTLIBRARIES install-exec-local
install-info: install-info-am
@@ -644,6 +644,7 @@
distclean-libtool distclean-tags distdir dvi dvi-am html \
html-am info info-am install install-am install-data \
install-data-am install-data-local install-exec \
+ install-exec-local \
install-exec-am install-info install-info-am install-man \
install-strip install-toolexeclibLTLIBRARIES installcheck \
installcheck-am installdirs maintainer-clean \
@@ -729,6 +730,11 @@
install_debug:
(cd ${debugdir} && $(MAKE) \
toolexeclibdir=$(glibcxx_toolexeclibdir)/debug install)
+
+install-exec-local:
+ $(AR) cru libstdc++_pic.a .libs/*.o $(top_builddir)/libsupc++/*.o || touch libstdc++_pic.a
+ $(INSTALL_DATA) libstdc++_pic.a $(DESTDIR)$(toolexeclibdir)
+
# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
.NOEXPORT:

View File

@ -1,179 +0,0 @@
#! /bin/sh -e
# DP: <your description>
dir=
if [ $# -eq 3 -a "$2" = '-d' ]; then
pdir="-d $3"
dir="$3/"
elif [ $# -ne 1 ]; then
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
fi
case "$1" in
-patch)
patch $pdir -f --no-backup-if-mismatch -p0 < $0
;;
-unpatch)
patch $pdir -f --no-backup-if-mismatch -R -p0 < $0
;;
*)
echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
exit 1
esac
exit 0
From: "H.J. Lu" <hjl@lucon.org>
Sender: gcc-patches-owner@gcc.gnu.org
To: gcc-patches@gcc.gnu.org
Subject: PATCH: PR target/30961: [4.1/4.2/4.3 regression] redundant reg/mem stores/moves
Date: Mon, 27 Aug 2007 11:34:12 -0700
We start with
(note:HI 3 4 22 2 NOTE_INSN_FUNCTION_BEG)
(insn:HI 6 3 10 2 c.c:3 (set (reg:DF 58 [ <result> ])
(subreg:DF (reg/v:DI 59 [ in ]) 0)) 102 {*movdf_integer_rex64} (expr_list:REG_DEAD (reg/v:DI 59 [ in ])
(nil)))
(insn:HI 10 6 16 2 c.c:7 (set (reg/i:DF 21 xmm0 [ <result> ])
(reg:DF 58 [ <result> ])) 102 {*movdf_integer_rex64} (expr_list:REG_DEAD (reg:DF 58 [ <result> ])
(nil)))
(insn:HI 16 10 0 2 c.c:7 (use (reg/i:DF 21 xmm0 [ <result> ])) -1 (nil))
we are trying to allocate registers for insn 6 and we allocate
xmm0 for the return value. Reload doesn't check if xmm0 can be used for
DF 59, it allocates xmm1 for DF 59 and generates:
Reloads for insn # 6
Reload 0: reload_in (DF) = (reg:DF 5 di)
SSE_REGS, RELOAD_FOR_INPUT (opnum = 1), can't combine
reload_in_reg: (subreg:DF (reg/v:DI 5 di [orig:59 in ] [59]) 0)
reload_reg_rtx: (reg:DF 22 xmm1)
...
(note:HI 4 1 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note:HI 3 4 22 2 NOTE_INSN_FUNCTION_BEG)
(insn 22 3 23 2 c.c:3 (set (mem/c:DF (plus:DI (reg/f:DI 7 sp)
(const_int -8 [0xfffffffffffffff8])) [0 S8 A8])
(reg:DF 5 di)) 102 {*movdf_integer_rex64} (nil))
(insn 23 22 6 2 c.c:3 (set (reg:DF 22 xmm1)
(mem/c:DF (plus:DI (reg/f:DI 7 sp)
(const_int -8 [0xfffffffffffffff8])) [0 S8 A8])) 102 {*movdf_integer_rex64} (nil))
(insn:HI 6 23 16 2 c.c:3 (set (reg:DF 21 xmm0 [orig:58 <result> ] [58])
(reg:DF 22 xmm1)) 102 {*movdf_integer_rex64} (nil))
(insn 16 6 21 2 c.c:7 (use (reg/i:DF 21 xmm0 [ <result> ])) -1 (nil))
This patch tries to use the destination register when reloading for input. It
generates
Reloads for insn # 6
Reload 0: reload_in (DF) = (reg:DF 5 di)
SSE_REGS, RELOAD_FOR_INPUT (opnum = 1), can't combine
reload_in_reg: (subreg:DF (reg/v:DI 5 di [orig:59 in ] [59]) 0)
reload_reg_rtx: (reg:DF 21 xmm0)
...
(note:HI 4 1 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note:HI 3 4 22 2 NOTE_INSN_FUNCTION_BEG)
(insn 22 3 23 2 c.c:3 (set (mem/c:DF (plus:DI (reg/f:DI 7 sp)
(const_int -8 [0xfffffffffffffff8])) [0 S8 A8])
(reg:DF 5 di)) 102 {*movdf_integer_rex64} (nil))
(insn 23 22 6 2 c.c:3 (set (reg:DF 21 xmm0)
(mem/c:DF (plus:DI (reg/f:DI 7 sp)
(const_int -8 [0xfffffffffffffff8])) [0 S8 A8])) 102 {*movdf_integer_rex64} (nil))
(insn:HI 6 23 10 2 c.c:3 (set (reg:DF 22 xmm1 [orig:58 <result> ] [58])
(reg:DF 21 xmm0)) 102 {*movdf_integer_rex64} (nil))
(insn:HI 10 6 16 2 c.c:7 (set (reg/i:DF 21 xmm0 [ <result> ])
(reg:DF 22 xmm1 [orig:58 <result> ] [58])) 102 {*movdf_integer_rex64} (nil))
(insn 16 10 21 2 c.c:7 (use (reg/i:DF 21 xmm0 [ <result> ])) -1 (nil))
H.J.
----
gcc/
2007-08-27 H.J. Lu <hongjiu.lu@intel.com>
PR target/30961
* reload1.c (find_reg): Favor the hard register in destination
if it is usable and a memory location is needed for reload
input.
gcc/testsuite/
2007-08-27 H.J. Lu <hongjiu.lu@intel.com>
PR target/30961
* gcc.target/i386/pr30961-1.c: New.
--- gcc/reload1.c.second 2007-08-27 09:35:08.000000000 -0700
+++ gcc/reload1.c 2007-08-27 09:36:33.000000000 -0700
@@ -1781,6 +1781,20 @@ find_reg (struct insn_chain *chain, int
HARD_REG_SET not_usable;
HARD_REG_SET used_by_other_reload;
reg_set_iterator rsi;
+#ifdef SECONDARY_MEMORY_NEEDED
+ rtx body = PATTERN (chain->insn);
+ unsigned int dest_reg = FIRST_PSEUDO_REGISTER;
+
+ if (GET_CODE (body) == SET)
+ {
+ rtx dest = SET_DEST (body);
+
+ if ((REG_P (dest)
+ || (GET_CODE (dest) == SUBREG
+ && REG_P (SUBREG_REG (dest)))))
+ dest_reg = reg_or_subregno (dest);
+ }
+#endif
COPY_HARD_REG_SET (not_usable, bad_spill_regs);
IOR_HARD_REG_SET (not_usable, bad_spill_regs_global);
@@ -1821,6 +1835,18 @@ find_reg (struct insn_chain *chain, int
this_cost--;
if (rl->out && REG_P (rl->out) && REGNO (rl->out) == regno)
this_cost--;
+#ifdef SECONDARY_MEMORY_NEEDED
+ /* If a memory location is needed for rl->in and dest_reg
+ is usable, we will favor it. */
+ else if (dest_reg == regno
+ && rl->in
+ && REG_P (rl->in)
+ && REGNO (rl->in) < FIRST_PSEUDO_REGISTER
+ && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (rl->in)),
+ rl->class,
+ rl->mode))
+ this_cost = 0;
+#endif
if (this_cost < best_cost
/* Among registers with equal cost, prefer caller-saved ones, or
use REG_ALLOC_ORDER if it is defined. */
--- gcc/testsuite/gcc.target/i386/pr30961-1.c.second 2007-08-27 11:01:59.000000000 -0700
+++ gcc/testsuite/gcc.target/i386/pr30961-1.c 2007-08-27 11:02:51.000000000 -0700
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2" } */
+
+double
+convert (long long in)
+{
+ double f;
+ __builtin_memcpy( &f, &in, sizeof( in ) );
+ return f;
+}
+
+/* { dg-final { scan-assembler-not "movapd" } } */

View File

@ -1,38 +0,0 @@
Fix PR 35942: remove -lstdc++ from libtool postdeps for CXX.
libstdc++-v3/ChangeLog:
2010-01-04 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
PR libstdc++/35942
* configure.ac: Remove -lstdc++ from libtool's postdeps_CXX.
* configure: Regenerate.
Index: gcc-4.3.3/libstdc++-v3/configure
===================================================================
--- gcc-4.3.3.orig/libstdc++-v3/configure 2010-03-26 17:57:51.000000000 +0000
+++ gcc-4.3.3/libstdc++-v3/configure 2010-03-26 17:57:58.000000000 +0000
@@ -13759,6 +13759,9 @@
+# Eliminate -lstdc++ addition to postdeps for cross compiles.
+postdeps_CXX=`echo " $postdeps_CXX " | sed 's, -lstdc++ ,,g'`
+
# Possibly disable most of the library.
## TODO: Consider skipping unncessary tests altogether in this case, rather
## than just ignoring the results. Faster /and/ more correct, win win.
Index: gcc-4.3.3/libstdc++-v3/configure.ac
===================================================================
--- gcc-4.3.3.orig/libstdc++-v3/configure.ac 2010-03-26 17:57:54.000000000 +0000
+++ gcc-4.3.3/libstdc++-v3/configure.ac 2010-03-26 17:57:58.000000000 +0000
@@ -89,6 +89,9 @@
AC_SUBST(enable_shared)
AC_SUBST(enable_static)
+# Eliminate -lstdc++ addition to postdeps for cross compiles.
+postdeps_CXX=`echo " $postdeps_CXX " | sed 's, -lstdc++ ,,g'`
+
# Possibly disable most of the library.
## TODO: Consider skipping unncessary tests altogether in this case, rather
## than just ignoring the results. Faster /and/ more correct, win win.