oprofile: Update to new SRCDATE
git-svn-id: https://svn.o-hand.com/repos/poky/trunk@1776 311d38ba-8fff-0310-9ca6-ca027cbcb966
This commit is contained in:
Richard Purdie
parent
765f6203e3
commit
b77dd1b898
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@ -100,7 +100,7 @@ SRCDATE_libfakekey ?= "20051101"
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SRCDATE_xcalibrate ?= "20060312"
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SRCDATE_qemu ?= "20060723"
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SRCDATE_qemu-native ?= "20060723"
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SRCDATE_oprofile ?= "20070522"
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SRCDATE_oprofile ?= "20070524"
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SRCDATE_oprofileui ?= "20070522"
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SRCDATE_zaurusd ?= "20070417"
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SRCDATE_owl-video-widget ?= "20070417"
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@ -1,50 +1,28 @@
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---
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events/Makefile.am | 1 +
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events/arm/armv6/events | 25 +++++++++++++++++++++++++
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events/arm/armv6/unit_masks | 4 ++++
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libop/op_cpu_type.c | 1 +
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libop/op_cpu_type.h | 1 +
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libop/op_events.c | 1 +
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utils/ophelp.c | 5 ++++-
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7 files changed, 37 insertions(+), 1 deletion(-)
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events/arm/armv6/events | 9 ++++++---
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events/arm/armv6/unit_masks | 2 +-
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libop/op_cpu_type.c | 2 +-
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libop/op_cpu_type.h | 2 +-
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libop/op_events.c | 5 +----
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utils/ophelp.c | 2 +-
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6 files changed, 11 insertions(+), 11 deletions(-)
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Index: oprofile/events/Makefile.am
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===================================================================
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--- oprofile.orig/events/Makefile.am 2007-05-23 11:32:24.000000000 +0100
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+++ oprofile/events/Makefile.am 2007-05-23 14:13:12.000000000 +0100
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@@ -29,6 +29,7 @@ event_files = \
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x86-64/family10/events x86-64/family10/unit_masks \
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arm/xscale1/events arm/xscale1/unit_masks \
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arm/xscale2/events arm/xscale2/unit_masks \
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+ arm/armv6/events arm/armv6/unit_masks \
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mips/20K/events mips/20K/unit_masks \
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mips/24K/events mips/24K/unit_masks \
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mips/25K/events mips/25K/unit_masks \
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Index: oprofile/events/arm/armv6/events
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===================================================================
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--- /dev/null 1970-01-01 00:00:00.000000000 +0000
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+++ oprofile/events/arm/armv6/events 2007-05-23 14:13:12.000000000 +0100
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@@ -0,0 +1,25 @@
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--- oprofile.orig/events/arm/armv6/events 2007-05-23 15:02:33.000000000 +0100
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+++ oprofile/events/arm/armv6/events 2007-05-24 00:33:41.000000000 +0100
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@@ -1,4 +1,4 @@
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-# ARM11 events
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+# ARM V6 events
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+#
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+event:0x00 counters:1,2 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses
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+event:0x01 counters:1,2 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled
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+event:0x02 counters:1,2 um:zero minimum:500 name:CYCLES_DATA_STALL : cycles stall occurs for due to data dependency
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+event:0x03 counters:1,2 um:zero minimum:500 name:ITLB_MISS : number of ITLB misses
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+event:0x04 counters:1,2 um:zero minimum:500 name:DTLB_MISS : number of DTLB misses
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+event:0x05 counters:1,2 um:zero minimum:500 name:BR_INST_EXECUTED : branch instruction executed w/ or w/o program flow change
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+event:0x06 counters:1,2 um:zero minimum:500 name:BR_INST_MISS_PRED : branch mispredicted
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+event:0x07 counters:1,2 um:zero minimum:500 name:INSN_EXECUTED : instruction executed
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+event:0x08 counters:1,2 um:zero minimum:500 name:CYCLES_DCACHE_FULL_STALL : cycles in stall due to full dcache
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+event:0x09 counters:1,1 um:zero minimum:500 name:DCACHE_FULL_STALL_CNT : number of stalls due to dcache full condition
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+event:0x0a counters:1,2 um:zero minimum:500 name:DCACHE_ACCESS : data cache access
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+event:0x0b counters:1,2 um:zero minimum:500 name:DCACHE_MISS : data cache miss
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+event:0x0c counters:1,2 um:zero minimum:500 name:DCACHE_WB : data cache writeback, 1 event for every half cacheline
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+event:0x0d counters:1,2 um:zero minimum:500 name:PC_CHANGE : number of times the program counter was changed without a mode switch
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+event:0x0f counters:1,2 um:zero minimum:500 name:TLB_MISS : Main TLB miss
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+event:0x10 counters:1,2 um:zero minimum:500 name:EXP_EXTERNAL : Explict external data access
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+event:0x11 counters:1,2 um:zero minimum:500 name:LSU_STALL : cycles stalled because Load Store request queque is full
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+event:0x12 counters:1,2 um:zero minimum:500 name:WRITE_DRAIN : Time swrite buffer was drained
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#
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event:0x00 counters:1,2 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses
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event:0x01 counters:1,2 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled
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@@ -17,5 +17,8 @@ event:0x0f counters:1,2 um:zero minimum:
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event:0x10 counters:1,2 um:zero minimum:500 name:EXP_EXTERNAL : Explict external data access
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event:0x11 counters:1,2 um:zero minimum:500 name:LSU_STALL : cycles stalled because Load Store request queque is full
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event:0x12 counters:1,2 um:zero minimum:500 name:WRITE_DRAIN : Times write buffer was drained
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-event:0xff counters:0 um:zero minimum:500 name:CPU_CYCLES : clock cycles counter
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-#
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+event:0x20 counters:1,2 um:zero minimum:500 name:ETMEXTOUT0 : nuber of cycles ETMEXTOUT[0] signal was asserted
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+event:0x21 counters:1,2 um:zero minimum:500 name:ETMEXTOUT1 : nuber of cycles ETMEXTOUT[1] signal was asserted
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+event:0x22 counters:1,2 um:zero minimum:500 name:ETMEXTOUT_BOTH : nuber of cycles both ETMEXTOUT [0] and [1] were asserted * 2
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@ -52,67 +30,73 @@ Index: oprofile/events/arm/armv6/events
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+event:0xfe counters:0 um:zero minimum:500 name:CPU_CYCLES : clock cycles counter
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Index: oprofile/events/arm/armv6/unit_masks
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===================================================================
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--- /dev/null 1970-01-01 00:00:00.000000000 +0000
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+++ oprofile/events/arm/armv6/unit_masks 2007-05-23 14:13:12.000000000 +0100
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@@ -0,0 +1,4 @@
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--- oprofile.orig/events/arm/armv6/unit_masks 2007-05-23 15:02:33.000000000 +0100
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+++ oprofile/events/arm/armv6/unit_masks 2007-05-23 15:28:24.000000000 +0100
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@@ -1,4 +1,4 @@
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-# Arm11 possible unit masks
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+# ARM V6 PMU possible unit masks
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+#
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+name:zero type:mandatory default:0x00
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+ 0x00 No unit mask
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#
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name:zero type:mandatory default:0x00
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0x00 No unit mask
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Index: oprofile/libop/op_cpu_type.c
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===================================================================
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--- oprofile.orig/libop/op_cpu_type.c 2007-05-23 11:32:35.000000000 +0100
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+++ oprofile/libop/op_cpu_type.c 2007-05-23 14:13:12.000000000 +0100
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@@ -69,6 +69,7 @@ static struct cpu_descr const cpu_descrs
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{ "ppc64 Cell Broadband Engine", "ppc64/cell-be", CPU_PPC64_CELL, 8 },
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--- oprofile.orig/libop/op_cpu_type.c 2007-05-24 00:17:01.000000000 +0100
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+++ oprofile/libop/op_cpu_type.c 2007-05-24 00:26:34.000000000 +0100
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@@ -70,7 +70,7 @@ static struct cpu_descr const cpu_descrs
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{ "AMD64 family10", "x86-64/family10", CPU_FAMILY10, 4 },
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{ "ppc64 PA6T", "ppc64/pa6t", CPU_PPC64_PA6T, 6 },
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+ { "ARM/V6 PMU", "arm/armv6", CPU_ARM_V6, 3 },
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{ "ppc64 PA6T", "ppc64/pa6t", CPU_PPC64_PA6T, 6 },
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{ "ARM MPCore", "arm/mpcore", CPU_ARM_MPCORE, 2 },
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- { "ARM11 PMU", "arm/armv6", CPU_ARM_ARM11, 3 },
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+ { "ARM V6 PMU", "arm/armv6", CPU_ARM_V6, 3 },
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};
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static size_t const nr_cpu_descrs = sizeof(cpu_descrs) / sizeof(struct cpu_descr);
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Index: oprofile/libop/op_cpu_type.h
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===================================================================
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--- oprofile.orig/libop/op_cpu_type.h 2007-05-23 11:32:35.000000000 +0100
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+++ oprofile/libop/op_cpu_type.h 2007-05-23 14:13:12.000000000 +0100
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@@ -67,6 +67,7 @@ typedef enum {
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CPU_PPC64_CELL, /**< ppc64 Cell Broadband Engine*/
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--- oprofile.orig/libop/op_cpu_type.h 2007-05-24 00:17:01.000000000 +0100
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+++ oprofile/libop/op_cpu_type.h 2007-05-24 00:26:50.000000000 +0100
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@@ -68,7 +68,7 @@ typedef enum {
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CPU_FAMILY10, /**< AMD family 10 */
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CPU_PPC64_PA6T, /**< ppc64 PA6T */
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+ CPU_ARM_V6, /**< ARM V6 PMU */
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CPU_ARM_MPCORE, /**< ARM MPCore */
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- CPU_ARM_ARM11, /**< ARM11 */
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+ CPU_ARM_V6, /**< ARM V6 */
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MAX_CPU_TYPE
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} op_cpu;
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Index: oprofile/libop/op_events.c
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===================================================================
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--- oprofile.orig/libop/op_events.c 2007-05-23 11:32:35.000000000 +0100
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+++ oprofile/libop/op_events.c 2007-05-23 14:13:12.000000000 +0100
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@@ -785,6 +785,7 @@ void op_default_event(op_cpu cpu_type, s
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// we could possibly use the CCNT
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--- oprofile.orig/libop/op_events.c 2007-05-24 00:17:01.000000000 +0100
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+++ oprofile/libop/op_events.c 2007-05-24 00:27:49.000000000 +0100
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@@ -786,6 +786,7 @@ void op_default_event(op_cpu cpu_type, s
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case CPU_ARM_XSCALE1:
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case CPU_ARM_XSCALE2:
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case CPU_ARM_MPCORE:
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+ case CPU_ARM_V6:
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descr->name = "CPU_CYCLES";
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break;
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@@ -842,10 +843,6 @@ void op_default_event(op_cpu cpu_type, s
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descr->name = "CPU_CLK";
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break;
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- case CPU_ARM_ARM11:
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- descr->name = "CPU_CYCLES";
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- break;
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-
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// don't use default, if someone add a cpu he wants a compiler
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// warning if he forgets to handle it here.
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case CPU_TIMER_INT:
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Index: oprofile/utils/ophelp.c
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===================================================================
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--- oprofile.orig/utils/ophelp.c 2007-05-23 11:32:45.000000000 +0100
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+++ oprofile/utils/ophelp.c 2007-05-23 14:16:33.000000000 +0100
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@@ -424,12 +424,15 @@ int main(int argc, char const * argv[])
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printf("See Intel XScale Core Developer's Manual\n"
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"Chapter 8 Performance Monitoring\n");
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--- oprofile.orig/utils/ophelp.c 2007-05-24 00:17:12.000000000 +0100
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+++ oprofile/utils/ophelp.c 2007-05-24 00:26:08.000000000 +0100
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@@ -429,7 +429,7 @@ int main(int argc, char const * argv[])
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"Page 3-70, performance counters\n");
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break;
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+
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- case CPU_ARM_ARM11:
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+ case CPU_ARM_V6:
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+ printf("See ARM11 Technical Reference Manual\n");
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break;
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printf("See ARM11 Technical Reference Manual\n");
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break;
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case CPU_PPC64_PA6T:
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printf("See PA6T Power Implementation Features Book IV\n"
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"Chapter 7 Performance Counters\n");
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- break;
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+ break;
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case CPU_PPC64_POWER4:
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case CPU_PPC64_POWER5:
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