binutils: Upgrade to 2.24

This builds and runs images for all qemu machines

(From OE-Core rev: 015eca84f1b0f25868b47d2480bb60cea698f70e)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
Khem Raj 2014-02-01 01:00:15 -08:00 committed by Richard Purdie
parent a42f84682f
commit d4b11e8f16
36 changed files with 1017 additions and 2318 deletions

View File

@ -19,7 +19,7 @@ PREFERRED_PROVIDER_virtual/gettext ??= "gettext"
GCCVERSION ?= "4.8%"
SDKGCCVERSION ?= "${GCCVERSION}"
BINUVERSION ?= "2.23.2"
BINUVERSION ?= "2.24"
EGLIBCVERSION ?= "2.18"
UCLIBCVERSION ?= "0.9.33+git%"
LINUXLIBCVERSION ?= "3.10"

View File

@ -1,122 +0,0 @@
config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
(PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D):
Likewise. (PPC_VLE_HI16A, PPC_VLE_HI16D):
Likewise. (PPC_VLE_HA16A, PPC_VLE_HA16D):
Likewise. (md_apply_fix):
Set fx_no_overflow for assorted relocations.
Shift and sign-extend fieldval for use by some VLE reloc
operand->insert functions.
Upstream-Status: Backport
Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
commit ee75ce72fd7a4b2dc47db46acc36905da8904be4
Author: Alan Modra <amodra@bigpond.net.au>
Date: Mon May 6 23:36:48 2013 +0000
--- binutils-2.23.2/gas/config/tc-ppc.c.orig 2013-06-02 21:44:34.000000000 -0500
+++ binutils-2.23.2/gas/config/tc-ppc.c 2013-06-02 21:51:37.000000000 -0500
@@ -64,40 +64,14 @@
/* #lo(value) denotes the least significant 16 bits of the indicated. */
#define PPC_LO(v) ((v) & 0xffff)
-/* Split the indicated value with the msbs in bits 11-15
- and the lsbs in bits 21-31. */
-#define PPC_VLE_SPLIT16A(v) ((v & 0xf800) << 11) | (v & 0x7ff)
-
-/* Split the indicated value with the msbs in bits 6-10
- and the lsbs in bits 21-31. */
-#define PPC_VLE_SPLIT16D(v) ((v & 0xf800) << 5) | (v & 0x7ff)
-
-/* #lo(value) denotes the lsb 16 bits in split16a format. */
-#define PPC_VLE_LO16A(v) PPC_VLE_SPLIT16A(PPC_LO(v))
-
-/* #lo(value) denotes the lsb 16 bits in split16d format. */
-#define PPC_VLE_LO16D(v) PPC_VLE_SPLIT16D(PPC_LO(v))
-
/* #hi(value) denotes bits 16 through 31 of the indicated value. */
#define PPC_HI(v) (((v) >> 16) & 0xffff)
-/* #lo(value) denotes the msb 16 bits in split16a format. */
-#define PPC_VLE_HI16A(v) PPC_VLE_SPLIT16A(PPC_HI(v))
-
-/* #lo(value) denotes the msb 16 bits in split16d format. */
-#define PPC_VLE_HI16D(v) PPC_VLE_SPLIT16D(PPC_HI(v))
-
/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
the indicated value, compensating for #lo() being treated as a
signed number. */
#define PPC_HA(v) PPC_HI ((v) + 0x8000)
-/* #ha(value) denotes the high adjusted value in split16a format. */
-#define PPC_VLE_HA16A(v) PPC_VLE_SPLIT16A(PPC_HA(v))
-
-/* #ha(value) denotes the high adjusted value in split16d format. */
-#define PPC_VLE_HA16D(v) PPC_VLE_SPLIT16D(PPC_HA(v))
-
/* #higher(value) denotes bits 32 through 47 of the indicated value. */
#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
@@ -6379,7 +6353,10 @@
fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
/* fall through */
case BFD_RELOC_LO16_PCREL:
+ case BFD_RELOC_PPC_VLE_LO16A:
+ case BFD_RELOC_PPC_VLE_LO16D:
fieldval = SEX16 (value);
+ fixP->fx_no_overflow = 1;
break;
case BFD_RELOC_HI16:
@@ -6387,7 +6364,10 @@
fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
/* fall through */
case BFD_RELOC_HI16_PCREL:
+ case BFD_RELOC_PPC_VLE_HI16A:
+ case BFD_RELOC_PPC_VLE_HI16D:
fieldval = SEX16 (PPC_HI (value));
+ fixP->fx_no_overflow = 1;
break;
case BFD_RELOC_HI16_S:
@@ -6395,7 +6375,10 @@
fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
/* fall through */
case BFD_RELOC_HI16_S_PCREL:
+ case BFD_RELOC_PPC_VLE_HA16A:
+ case BFD_RELOC_PPC_VLE_HA16D:
fieldval = SEX16 (PPC_HA (value));
+ fixP->fx_no_overflow = 1;
break;
#ifdef OBJ_ELF
@@ -6403,24 +6386,28 @@
if (fixP->fx_pcrel)
goto bad_pcrel;
fieldval = SEX16 (PPC_HIGHER (value));
+ fixP->fx_no_overflow = 1;
break;
case BFD_RELOC_PPC64_HIGHER_S:
if (fixP->fx_pcrel)
goto bad_pcrel;
fieldval = SEX16 (PPC_HIGHERA (value));
+ fixP->fx_no_overflow = 1;
break;
case BFD_RELOC_PPC64_HIGHEST:
if (fixP->fx_pcrel)
goto bad_pcrel;
fieldval = SEX16 (PPC_HIGHEST (value));
+ fixP->fx_no_overflow = 1;
break;
case BFD_RELOC_PPC64_HIGHEST_S:
if (fixP->fx_pcrel)
goto bad_pcrel;
fieldval = SEX16 (PPC_HIGHESTA (value));
+ fixP->fx_no_overflow = 1;
break;
/* The following relocs can't be calculated by the assembler.

View File

@ -1,46 +0,0 @@
The powerpc assembler can generate .PPC.EMB.apuinfo sections in some
circumstances. These originate, I think, from the old e500 ABI; in
any case, they are only defined for 32-bit ABIs, and there is a
significant amount of code in bfd/elf32-ppc.c to handle them
appropriately, none of which is in elf64-ppc.c. However, the
assembler can generate them when building 64-bit code for processors
such as e5500 (which uses PPC_OPCODE_E500MC). In such circumstances,
they get generated as PROGBITS rather than NOTE sections, which
reportedly can cause problems in a Linux kernel build.
Since these sections are only defined in 32-bit ABIs, I think it's
most appropriate to avoid generating them for 64-bit output, which
this patch does.
Upstream-Status: Backport
-Khem 2013/03/25
From d77411f56a85225e3f7b674e7172c712f6cd61cb Mon Sep 17 00:00:00 2001
From: Joseph Myers <joseph@codesourcery.com>
Date: Fri, 25 Jan 2013 02:02:20 +0000
Subject: [PATCH] * config/tc-ppc.c (md_assemble): Do not generate
APUinfo sections for 64-bit output.
---
gas/ChangeLog | 5 +++++
gas/config/tc-ppc.c | 3 ++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index fd15bea..0929e52 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -3249,7 +3249,8 @@ md_assemble (char *str)
#ifdef OBJ_ELF
/* Do we need/want an APUinfo section? */
- if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0)
+ if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
+ && !ppc_obj64)
{
/* These are all version "1". */
if (opcode->flags & PPC_OPCODE_SPE)
--
1.7.9.5

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@ -1,68 +0,0 @@
From e02bf9359f6ef7fe4d341aa5ac4f397f541b9ac3 Mon Sep 17 00:00:00 2001
From: Andreas Schwab <schwab@linux-m68k.org>
Date: Fri, 4 Jan 2013 22:27:57 +0000
Subject: [PATCH] * doc/binutils.texi (elfedit): Fix use of @itemx in @table.
---
binutils/ChangeLog | 4 ++++
binutils/doc/binutils.texi | 14 +++++++-------
2 files changed, 11 insertions(+), 7 deletions(-)
Upstream-Status: Backport
Index: binutils-2.23.1/binutils/doc/binutils.texi
===================================================================
--- binutils-2.23.1.orig/binutils/doc/binutils.texi 2012-05-11 11:18:34.000000000 -0700
+++ binutils-2.23.1/binutils/doc/binutils.texi 2013-02-26 12:41:51.785114224 -0800
@@ -12,7 +12,7 @@
@c man begin COPYRIGHT
Copyright @copyright{} 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
-2010, 2011, 2012
+2010, 2011, 2012, 2013
Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
@@ -4375,7 +4375,7 @@
@table @env
-@itemx --input-mach=@var{machine}
+@item --input-mach=@var{machine}
Set the matching input ELF machine type to @var{machine}. If
@option{--input-mach} isn't specified, it will match any ELF
machine types.
@@ -4383,21 +4383,21 @@
The supported ELF machine types are, @var{L1OM}, @var{K1OM} and
@var{x86-64}.
-@itemx --output-mach=@var{machine}
+@item --output-mach=@var{machine}
Change the ELF machine type in the ELF header to @var{machine}. The
supported ELF machine types are the same as @option{--input-mach}.
-@itemx --input-type=@var{type}
+@item --input-type=@var{type}
Set the matching input ELF file type to @var{type}. If
@option{--input-type} isn't specified, it will match any ELF file types.
The supported ELF file types are, @var{rel}, @var{exec} and @var{dyn}.
-@itemx --output-type=@var{type}
+@item --output-type=@var{type}
Change the ELF file type in the ELF header to @var{type}. The
supported ELF types are the same as @option{--input-type}.
-@itemx --input-osabi=@var{osabi}
+@item --input-osabi=@var{osabi}
Set the matching input ELF file OSABI to @var{osabi}. If
@option{--input-osabi} isn't specified, it will match any ELF OSABIs.
@@ -4407,7 +4407,7 @@
@var{FreeBSD}, @var{TRU64}, @var{Modesto}, @var{OpenBSD}, @var{OpenVMS},
@var{NSK}, @var{AROS} and @var{FenixOS}.
-@itemx --output-osabi=@var{osabi}
+@item --output-osabi=@var{osabi}
Change the ELF OSABI in the ELF header to @var{osabi}. The
supported ELF OSABI are the same as @option{--input-osabi}.

View File

@ -1,31 +0,0 @@
From 4c147afe1796611c431aa86ea12342c1d80c2c4b Mon Sep 17 00:00:00 2001
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Wed, 1 May 2013 17:18:43 +0000
Subject: [PATCH] * emultempl/elf32.em
(gld${EMULATION_NAME}_before_allocation): Use
is_elf_hash_table rather than a handcoded condition.
---
ld/ChangeLog | 5 +++++
ld/emultempl/elf32.em | 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation):
Use is_elf_hash_table rather than a handcoded condition.
Upstream-Status: Backport
Index: binutils-2.23.2/ld/emultempl/elf32.em
===================================================================
--- binutils-2.23.2.orig/ld/emultempl/elf32.em 2013-06-26 23:29:32.000000000 -0700
+++ binutils-2.23.2/ld/emultempl/elf32.em 2013-06-26 23:35:45.798428256 -0700
@@ -1494,7 +1494,7 @@
asection *sinterp;
bfd *abfd;
- if (link_info.hash->type == bfd_link_elf_hash_table)
+ if (is_elf_hash_table (link_info.hash))
_bfd_elf_tls_setup (link_info.output_bfd, &link_info);
/* If we are going to make any variable assignments, we need to let

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@ -1,196 +0,0 @@
From 935f85422863b42b6fbca30885885e3fa28eea36 Mon Sep 17 00:00:00 2001
From: Nick Clifton <nickc@redhat.com>
Date: Mon, 7 Jan 2013 12:11:11 +0000
Subject: [PATCH] * ld.texinfo: Replace @ with @@ when it is part of
the text. Correct ordering of M68HC11 entry.
* doc/binutils.texi: Fix ordering of top level nodes.
Replace erroneous uses of @itemx with @item.
* bfd.texinfo: Replace @ with @@ when it is part of the text.
---
bfd/doc/ChangeLog | 4 ++++
bfd/doc/bfd.texinfo | 12 +++++++-----
binutils/ChangeLog | 5 +++++
binutils/doc/binutils.texi | 8 ++++----
ld/ChangeLog | 5 +++++
ld/ld.texinfo | 26 ++++++++++++++------------
6 files changed, 39 insertions(+), 21 deletions(-)
Upstream-Status: Backport
Index: binutils-2.23.1/bfd/doc/bfd.texinfo
===================================================================
--- binutils-2.23.1.orig/bfd/doc/bfd.texinfo 2010-10-28 04:40:25.000000000 -0700
+++ binutils-2.23.1/bfd/doc/bfd.texinfo 2013-02-26 12:42:26.909115020 -0800
@@ -1,7 +1,7 @@
\input texinfo.tex
@setfilename bfd.info
@c Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1997, 2000,
-@c 2001, 2002, 2003, 2006, 2007, 2008, 2009
+@c 2001, 2002, 2003, 2006, 2007, 2008, 2009, 2013
@c Free Software Foundation, Inc.
@c
@synindex fn cp
@@ -16,7 +16,8 @@
@copying
This file documents the BFD library.
-Copyright @copyright{} 1991, 2000, 2001, 2003, 2006, 2007, 2008 Free Software Foundation, Inc.
+Copyright @copyright{} 1991, 2000, 2001, 2003, 2006, 2007, 2008, 2013
+Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3 or
@@ -64,7 +65,8 @@
@end tex
@vskip 0pt plus 1filll
-Copyright @copyright{} 1991, 2001, 2003, 2006, 2008 Free Software Foundation, Inc.
+Copyright @copyright{} 1991, 2001, 2003, 2006, 2008, 2013
+Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
@@ -322,7 +324,7 @@
@printindex cp
@tex
-% I think something like @colophon should be in texinfo. In the
+% I think something like @@colophon should be in texinfo. In the
% meantime:
\long\def\colophon{\hbox to0pt{}\vfill
\centerline{The body of this manual is set in}
@@ -333,7 +335,7 @@
\centerline{{\sl\fontname\tensl\/}}
\centerline{are used for emphasis.}\vfill}
\page\colophon
-% Blame: doc@cygnus.com, 28mar91.
+% Blame: doc@@cygnus.com, 28mar91.
@end tex
@bye
Index: binutils-2.23.1/binutils/doc/binutils.texi
===================================================================
--- binutils-2.23.1.orig/binutils/doc/binutils.texi 2013-02-26 12:41:51.000000000 -0800
+++ binutils-2.23.1/binutils/doc/binutils.texi 2013-02-26 12:42:26.913115010 -0800
@@ -148,18 +148,18 @@
* objcopy:: Copy and translate object files
* objdump:: Display information from object files
* ranlib:: Generate index to archive contents
-* readelf:: Display the contents of ELF format files
* size:: List section sizes and total size
* strings:: List printable strings from files
* strip:: Discard symbols
-* elfedit:: Update the ELF header of ELF files
* c++filt:: Filter to demangle encoded C++ symbols
* cxxfilt: c++filt. MS-DOS name for c++filt
* addr2line:: Convert addresses to file and line
* nlmconv:: Converts object code into an NLM
-* windres:: Manipulate Windows resources
* windmc:: Generator for Windows message resources
+* windres:: Manipulate Windows resources
* dlltool:: Create files needed to build and use DLLs
+* readelf:: Display the contents of ELF format files
+* elfedit:: Update the ELF header of ELF files
* Common Options:: Command-line options for all utilities
* Selecting the Target System:: How these utilities determine the target
* Reporting Bugs:: Reporting Bugs
@@ -2898,7 +2898,7 @@
@c man end
@end ignore
-@node c++filt, addr2line, elfedit, Top
+@node c++filt, addr2line, strip, Top
@chapter c++filt
@kindex c++filt
Index: binutils-2.23.1/ld/ld.texinfo
===================================================================
--- binutils-2.23.1.orig/ld/ld.texinfo 2013-02-19 14:26:56.571782665 -0800
+++ binutils-2.23.1/ld/ld.texinfo 2013-02-26 12:45:20.677119476 -0800
@@ -1,7 +1,8 @@
\input texinfo
@setfilename ld.info
@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
-@c 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
+@c 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
+@c 2012, 2013
@c Free Software Foundation, Inc.
@syncodeindex ky cp
@c man begin INCLUDE
@@ -55,7 +56,8 @@
version @value{VERSION}.
Copyright @copyright{} 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
-2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2012, 2013
+Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
@@ -93,8 +95,8 @@
@vskip 0pt plus 1filll
@c man begin COPYRIGHT
Copyright @copyright{} 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free
-Software Foundation, Inc.
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
+2012, 2013 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
@@ -142,12 +144,12 @@
@ifset ARM
* ARM:: ld and the ARM family
@end ifset
-@ifset HPPA
-* HPPA ELF32:: ld and HPPA 32-bit ELF
-@end ifset
@ifset M68HC11
* M68HC11/68HC12:: ld and the Motorola 68HC11 and 68HC12 families
@end ifset
+@ifset HPPA
+* HPPA ELF32:: ld and HPPA 32-bit ELF
+@end ifset
@ifset M68K
* M68K:: ld and Motorola 68K family
@end ifset
@@ -6003,6 +6005,9 @@
@ifset I960
* i960:: @command{ld} and the Intel 960 family
@end ifset
+@ifset M68HC11
+* M68HC11/68HC12:: @code{ld} and the Motorola 68HC11 and 68HC12 families
+@end ifset
@ifset ARM
* ARM:: @command{ld} and the ARM family
@end ifset
@@ -6018,9 +6023,6 @@
@ifset MSP430
* MSP430:: @command{ld} and MSP430
@end ifset
-@ifset M68HC11
-* M68HC11/68HC12:: @code{ld} and the Motorola 68HC11 and 68HC12 families
-@end ifset
@ifset POWERPC
* PowerPC ELF32:: @command{ld} and PowerPC 32-bit ELF Support
@end ifset
@@ -7868,7 +7870,7 @@
@printindex cp
@tex
-% I think something like @colophon should be in texinfo. In the
+% I think something like @@colophon should be in texinfo. In the
% meantime:
\long\def\colophon{\hbox to0pt{}\vfill
\centerline{The body of this manual is set in}
@@ -7879,7 +7881,7 @@
\centerline{{\sl\fontname\tensl\/}}
\centerline{are used for emphasis.}\vfill}
\page\colophon
-% Blame: doc@cygnus.com, 28mar91.
+% Blame: doc@@cygnus.com, 28mar91.
@end tex
@bye

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@ -1,85 +0,0 @@
config/tc-ppc.c (md_apply_fix): Sign extend fieldval under control of operand flag bits.
Upstream-Status: Backport
Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
commit cf5434698882f41ddfcc469488e8a68c674aae03
Author: Alan Modra <amodra@bigpond.net.au>
Date: Thu May 9 04:01:53 2013 +0000
--- binutils-2.23.2/gas/config/tc-ppc.c.orig 2013-06-02 21:53:24.000000000 -0500
+++ binutils-2.23.2/gas/config/tc-ppc.c 2013-06-02 22:03:00.000000000 -0500
@@ -6355,7 +6355,10 @@
case BFD_RELOC_LO16_PCREL:
case BFD_RELOC_PPC_VLE_LO16A:
case BFD_RELOC_PPC_VLE_LO16D:
- fieldval = SEX16 (value);
+ fieldval = value & 0xffff;
+ sign_extend_16:
+ if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
+ fieldval = (fieldval ^ 0x8000) - 0x8000;
fixP->fx_no_overflow = 1;
break;
@@ -6366,9 +6369,8 @@
case BFD_RELOC_HI16_PCREL:
case BFD_RELOC_PPC_VLE_HI16A:
case BFD_RELOC_PPC_VLE_HI16D:
- fieldval = SEX16 (PPC_HI (value));
- fixP->fx_no_overflow = 1;
- break;
+ fieldval = PPC_HI (value);
+ goto sign_extend_16;
case BFD_RELOC_HI16_S:
if (fixP->fx_pcrel)
@@ -6377,38 +6379,33 @@
case BFD_RELOC_HI16_S_PCREL:
case BFD_RELOC_PPC_VLE_HA16A:
case BFD_RELOC_PPC_VLE_HA16D:
- fieldval = SEX16 (PPC_HA (value));
- fixP->fx_no_overflow = 1;
- break;
+ fieldval = PPC_HA (value);
+ goto sign_extend_16;
#ifdef OBJ_ELF
case BFD_RELOC_PPC64_HIGHER:
if (fixP->fx_pcrel)
goto bad_pcrel;
- fieldval = SEX16 (PPC_HIGHER (value));
- fixP->fx_no_overflow = 1;
- break;
+ fieldval = PPC_HIGHER (value);
+ goto sign_extend_16;
case BFD_RELOC_PPC64_HIGHER_S:
if (fixP->fx_pcrel)
goto bad_pcrel;
- fieldval = SEX16 (PPC_HIGHERA (value));
- fixP->fx_no_overflow = 1;
- break;
+ fieldval = PPC_HIGHERA (value);
+ goto sign_extend_16;
case BFD_RELOC_PPC64_HIGHEST:
if (fixP->fx_pcrel)
goto bad_pcrel;
- fieldval = SEX16 (PPC_HIGHEST (value));
- fixP->fx_no_overflow = 1;
- break;
+ fieldval = PPC_HIGHEST (value);
+ goto sign_extend_16;
case BFD_RELOC_PPC64_HIGHEST_S:
if (fixP->fx_pcrel)
goto bad_pcrel;
- fieldval = SEX16 (PPC_HIGHESTA (value));
- fixP->fx_no_overflow = 1;
- break;
+ fieldval = PPC_HIGHESTA (value);
+ goto sign_extend_16;
/* The following relocs can't be calculated by the assembler.
Leave the field zero. */

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@ -1,43 +0,0 @@
From b0d2b7b6eae7b7f4fbfd1695d4d2f1b45198d597 Mon Sep 17 00:00:00 2001
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Fri, 3 May 2013 15:01:19 +0000
Subject: [PATCH] * emultempl/elf32.em
(gld${EMULATION_NAME}_before_allocation): Only call
lang_for_each_statement if an ELF hash table is used.
---
ld/ChangeLog | 5 +++++
ld/emultempl/elf32.em | 12 +++++++-----
2 files changed, 12 insertions(+), 5 deletions(-)
2013-05-03 Alan Modra <amodra@gmail.com>
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation):
Only call lang_for_each_statement if an ELF hash table is used.
Upstream-Status: Backport
Index: binutils-2.23.2/ld/emultempl/elf32.em
===================================================================
--- binutils-2.23.2.orig/ld/emultempl/elf32.em 2013-06-26 23:35:45.000000000 -0700
+++ binutils-2.23.2/ld/emultempl/elf32.em 2013-06-26 23:37:04.530429733 -0700
@@ -1495,12 +1495,14 @@
bfd *abfd;
if (is_elf_hash_table (link_info.hash))
- _bfd_elf_tls_setup (link_info.output_bfd, &link_info);
+ {
+ _bfd_elf_tls_setup (link_info.output_bfd, &link_info);
- /* If we are going to make any variable assignments, we need to let
- the ELF backend know about them in case the variables are
- referred to by dynamic objects. */
- lang_for_each_statement (gld${EMULATION_NAME}_find_statement_assignment);
+ /* If we are going to make any variable assignments, we need to
+ let the ELF backend know about them in case the variables are
+ referred to by dynamic objects. */
+ lang_for_each_statement (gld${EMULATION_NAME}_find_statement_assignment);
+ }
/* Let the ELF backend work out the sizes of any sections required
by dynamic linking. */

View File

@ -1,203 +0,0 @@
From a347c1bd9be53513f60ed0e5f440c1f5cd78dec4 Mon Sep 17 00:00:00 2001
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Fri, 3 May 2013 15:19:26 +0000
Subject: [PATCH] gold/ PR ld/15365 * layout.cc
(Layout::finalize): Make __ehdr_start STV_HIDDEN.
ld/
PR ld/15365
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation):
Restrict __ehdr_start's export class to no less than STV_HIDDEN.
ld/testsuite/
PR ld/15365
* ld-elf/ehdr_start.d: Expect __ehdr_start to be STB_LOCAL.
* ld-mips-elf/ehdr_start-1.nd: New test.
* ld-mips-elf/ehdr_start-2.nd: New test.
* ld-mips-elf/ehdr_start-1.ld: New test linker script.
* ld-mips-elf/ehdr_start-2.ld: New test linker script.
* ld-mips-elf/ehdr_start-new.s: New test source.
* ld-mips-elf/ehdr_start-o32.s: New test source.
* ld-mips-elf/mips-elf.exp: Run the new tests.
---
gold/ChangeLog | 5 +++++
gold/layout.cc | 2 +-
ld/ChangeLog | 6 ++++++
ld/emultempl/elf32.em | 7 +++++++
ld/testsuite/ChangeLog | 12 ++++++++++++
ld/testsuite/ld-elf/ehdr_start.d | 2 +-
ld/testsuite/ld-mips-elf/ehdr_start-1.ld | 9 +++++++++
ld/testsuite/ld-mips-elf/ehdr_start-1.nd | 4 ++++
ld/testsuite/ld-mips-elf/ehdr_start-2.ld | 10 ++++++++++
ld/testsuite/ld-mips-elf/ehdr_start-2.nd | 4 ++++
ld/testsuite/ld-mips-elf/ehdr_start-new.s | 13 +++++++++++++
ld/testsuite/ld-mips-elf/ehdr_start-o32.s | 14 ++++++++++++++
ld/testsuite/ld-mips-elf/mips-elf.exp | 25 +++++++++++++++++++++++++
13 files changed, 111 insertions(+), 2 deletions(-)
create mode 100644 ld/testsuite/ld-mips-elf/ehdr_start-1.ld
create mode 100644 ld/testsuite/ld-mips-elf/ehdr_start-1.nd
create mode 100644 ld/testsuite/ld-mips-elf/ehdr_start-2.ld
create mode 100644 ld/testsuite/ld-mips-elf/ehdr_start-2.nd
create mode 100644 ld/testsuite/ld-mips-elf/ehdr_start-new.s
create mode 100644 ld/testsuite/ld-mips-elf/ehdr_start-o32.s
Upstream-Status: Backport
Index: binutils-2.23.2/gold/layout.cc
===================================================================
--- binutils-2.23.2.orig/gold/layout.cc 2013-06-26 23:29:32.000000000 -0700
+++ binutils-2.23.2/gold/layout.cc 2013-06-26 23:39:22.170432315 -0700
@@ -2516,7 +2516,7 @@
symtab->define_in_output_segment("__ehdr_start", NULL,
Symbol_table::PREDEFINED, load_seg, 0, 0,
elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL,
- elfcpp::STV_DEFAULT, 0,
+ elfcpp::STV_HIDDEN, 0,
Symbol::SEGMENT_START, true);
// Set the file offsets of all the non-data sections we've seen so
Index: binutils-2.23.2/ld/emultempl/elf32.em
===================================================================
--- binutils-2.23.2.orig/ld/emultempl/elf32.em 2013-06-26 23:37:04.000000000 -0700
+++ binutils-2.23.2/ld/emultempl/elf32.em 2013-06-26 23:39:22.174432315 -0700
@@ -1498,6 +1498,13 @@
{
_bfd_elf_tls_setup (link_info.output_bfd, &link_info);
+ /* Make __ehdr_start hidden if it has been referenced, to
+ prevent the symbol from being dynamic. */
+ if (!bfd_elf_record_link_assignment (link_info.output_bfd, &link_info,
+ "__ehdr_start", TRUE, TRUE))
+ einfo ("%P%F: failed to record assignment to %s: %E\n",
+ "__ehdr_start");
+
/* If we are going to make any variable assignments, we need to
let the ELF backend know about them in case the variables are
referred to by dynamic objects. */
Index: binutils-2.23.2/ld/testsuite/ld-elf/ehdr_start.d
===================================================================
--- binutils-2.23.2.orig/ld/testsuite/ld-elf/ehdr_start.d 2013-06-26 23:29:32.000000000 -0700
+++ binutils-2.23.2/ld/testsuite/ld-elf/ehdr_start.d 2013-06-26 23:39:22.174432315 -0700
@@ -4,5 +4,5 @@
#target: *-*-linux* *-*-gnu* *-*-nacl*
#...
-[0-9a-f]*000 [ADRT] __ehdr_start
+[0-9a-f]*000 [Adrt] __ehdr_start
#pass
Index: binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-1.ld
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-1.ld 2013-06-26 23:39:22.174432315 -0700
@@ -0,0 +1,9 @@
+ENTRY (__start)
+SECTIONS
+{
+ . = 0x12300000 + SIZEOF_HEADERS;
+ .text : { *(.text) }
+ . = 0x23400000;
+ HIDDEN (_gp = ALIGN (16) + 0x7ff0);
+ .got : { *(.got) }
+}
Index: binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-1.nd
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-1.nd 2013-06-26 23:39:22.174432315 -0700
@@ -0,0 +1,4 @@
+Symbol table '\.symtab' contains [0-9]+ entries:
+#...
+ *[0-9]+: 0*12300000 +0 (?:NOTYPE|OBJECT) +LOCAL +DEFAULT +[0-9]+ __ehdr_start
+#pass
Index: binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-2.ld
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-2.ld 2013-06-26 23:39:22.174432315 -0700
@@ -0,0 +1,10 @@
+ENTRY (__start)
+SECTIONS
+{
+ . = 0x12300000 + SIZEOF_HEADERS;
+ .text : { *(.text) }
+ . = 0x23400000;
+ __ehdr_start = .;
+ HIDDEN (_gp = ALIGN (16) + 0x7ff0);
+ .got : { *(.got) }
+}
Index: binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-2.nd
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-2.nd 2013-06-26 23:39:22.178432315 -0700
@@ -0,0 +1,4 @@
+Symbol table '\.symtab' contains [0-9]+ entries:
+#...
+ *[0-9]+: 0*23400000 +0 (?:NOTYPE|OBJECT) +LOCAL +DEFAULT +[0-9]+ __ehdr_start
+#pass
Index: binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-new.s
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-new.s 2013-06-26 23:39:22.178432315 -0700
@@ -0,0 +1,13 @@
+ .abicalls
+ .text
+ .weak __ehdr_start
+ .globl __start
+ .ent __start
+ .frame $29, 0, $31
+ .mask 0x00000000, 0
+__start:
+ .cplocal $2
+ .cpsetup $t9, $zero, __start
+ lw $2, __ehdr_start
+ jr $31
+ .end __start
Index: binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-o32.s
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils-2.23.2/ld/testsuite/ld-mips-elf/ehdr_start-o32.s 2013-06-26 23:39:22.178432315 -0700
@@ -0,0 +1,14 @@
+ .abicalls
+ .text
+ .weak __ehdr_start
+ .globl __start
+ .ent __start
+ .frame $29, 0, $31
+ .mask 0x00000000, 0
+__start:
+ .set noreorder
+ .cpload $25
+ .set reorder
+ lw $2, __ehdr_start
+ jr $31
+ .end __start
Index: binutils-2.23.2/ld/testsuite/ld-mips-elf/mips-elf.exp
===================================================================
--- binutils-2.23.2.orig/ld/testsuite/ld-mips-elf/mips-elf.exp 2013-06-26 23:29:32.000000000 -0700
+++ binutils-2.23.2/ld/testsuite/ld-mips-elf/mips-elf.exp 2013-06-26 23:39:22.178432315 -0700
@@ -669,3 +669,28 @@
"readelf -A export-class-call16-${abi}.gd"] \
"export-class-call16-${abi}.so"]]
}
+
+# Magic __ehdr_start symbol tests.
+set abis [concat o32 [expr {$has_newabi ? "n32 n64" : ""}]]
+foreach { abi } $abis {
+ set suff [string map {o32 o32 n32 new n64 new} $abi]
+ run_ld_link_tests [list \
+ [list \
+ "MIPS magic __ehdr_start symbol test 1 ($abi)" \
+ "$abi_ldflags($abi) -T ehdr_start-1.ld" "" \
+ "$abi_asflags($abi)" \
+ [list ehdr_start-${suff}.s] \
+ [list "readelf -s ehdr_start-1.nd"] \
+ "ehdr_start-1-${abi}"]]
+ if [regexp "(?:n32|n64)" "$abi"] {
+ setup_kfail "mips*-*-*" "ld/15428"
+ }
+ run_ld_link_tests [list \
+ [list \
+ "MIPS magic __ehdr_start symbol test 2 ($abi)" \
+ "$abi_ldflags($abi) -T ehdr_start-2.ld" "" \
+ "$abi_asflags($abi)" \
+ [list ehdr_start-${suff}.s] \
+ [list "readelf -s ehdr_start-2.nd"] \
+ "ehdr_start-2-${abi}"]]
+}

View File

@ -1,117 +0,0 @@
From: Yufeng Zhang <yufeng.zhang@arm.com>
Date: Mon, 13 May 2013 22:50:00 +0000 (+0000)
Subject: gas/
X-Git-Url: http://sourceware.org/git/?p=binutils.git;a=commitdiff_plain;h=1796bf893c4729d5c523502318d72cae78495d6c
Upstream-Status: backport
gas/
Backport from mainline:
2013-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
for system registers.
gas/testsuite/
Backport from mainline:
2013-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/illegal.l: Delete the error message for
msr S3_1_C13_C15_1,x7.
* gas/aarch64/sysreg.s: Add new tests.
* gas/aarch64/sysreg.d: Update.
---
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 821acc9..3d09792 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,11 @@
+2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ Backport from mainline:
+
+ 2013-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
+ * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
+ for system registers.
+
2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 162c865..db28c71 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -3243,10 +3243,14 @@ parse_sys_reg (char **str, struct hash_control *sys_regs, int imple_defined_p)
unsigned int op0, op1, cn, cm, op2;
if (sscanf (buf, "s%u_%u_c%u_c%u_%u", &op0, &op1, &cn, &cm, &op2) != 5)
return PARSE_FAIL;
- /* Register access is encoded as follows:
+ /* The architecture specifies the encoding space for implementation
+ defined registers as:
op0 op1 CRn CRm op2
- 11 xxx 1x11 xxxx xxx. */
- if (op0 != 3 || op1 > 7 || (cn | 0x4) != 0xf || cm > 15 || op2 > 7)
+ 11 xxx 1x11 xxxx xxx
+ For convenience GAS accepts a wider encoding space, as follows:
+ op0 op1 CRn CRm op2
+ 11 xxx xxxx xxxx xxx */
+ if (op0 != 3 || op1 > 7 || cn > 15 || cm > 15 || op2 > 7)
return PARSE_FAIL;
value = (op0 << 14) | (op1 << 11) | (cn << 7) | (cm << 3) | op2;
}
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d1ebc3b..8ee06c8 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ Backport from mainline:
+
+ 2013-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
+ * gas/aarch64/illegal.l: Delete the error message for
+ msr S3_1_C13_C15_1,x7.
+ * gas/aarch64/sysreg.s: Add new tests.
+ * gas/aarch64/sysreg.d: Update.
+
2013-03-08 Christian Groessler <chris@groessler.org>
Backport from mainline:
diff --git a/gas/testsuite/gas/aarch64/illegal.l b/gas/testsuite/gas/aarch64/illegal.l
index e17a1de..f7e4074 100644
--- a/gas/testsuite/gas/aarch64/illegal.l
+++ b/gas/testsuite/gas/aarch64/illegal.l
@@ -520,7 +520,6 @@
[^:]*:496: Error: .*`str x1,page_table_count'
[^:]*:498: Error: .*`prfm PLDL3KEEP,\[x9,x15,sxtx#2\]'
[^:]*:500: Error: .*`mrs x5,S1_0_C13_C8_0'
-[^:]*:501: Error: .*`msr S3_1_C13_C15_1,x7'
[^:]*:502: Error: .*`msr S3_1_C11_C15_-1,x7'
[^:]*:503: Error: .*`msr S3_1_11_15_1,x7'
[^:]*:506: Error: .*`movi w1,#15'
diff --git a/gas/testsuite/gas/aarch64/sysreg.d b/gas/testsuite/gas/aarch64/sysreg.d
index b83b270..c7cf00e 100644
--- a/gas/testsuite/gas/aarch64/sysreg.d
+++ b/gas/testsuite/gas/aarch64/sysreg.d
@@ -23,3 +23,6 @@ Disassembly of section \.text:
3c: d5380260 mrs x0, id_isar3_el1
40: d5380280 mrs x0, id_isar4_el1
44: d53802a0 mrs x0, id_isar5_el1
+ 48: d538cc00 mrs x0, s3_0_c12_c12_0
+ 4c: d5384600 mrs x0, s3_0_c4_c6_0
+ 50: d5184600 msr s3_0_c4_c6_0, x0
diff --git a/gas/testsuite/gas/aarch64/sysreg.s b/gas/testsuite/gas/aarch64/sysreg.s
index e6f770e..3287594 100644
--- a/gas/testsuite/gas/aarch64/sysreg.s
+++ b/gas/testsuite/gas/aarch64/sysreg.s
@@ -22,3 +22,7 @@
mrs x0, id_isar3_el1
mrs x0, id_isar4_el1
mrs x0, id_isar5_el1
+
+ mrs x0, s3_0_c12_c12_0
+ mrs x0, s3_0_c4_c6_0
+ msr s3_0_c4_c6_0, x0

View File

@ -1,144 +0,0 @@
From: Yufeng Zhang <yufeng.zhang@arm.com>
Date: Mon, 13 May 2013 23:09:51 +0000 (+0000)
Subject: gas/testsuite/
X-Git-Url: http://sourceware.org/git/?p=binutils.git;a=commitdiff_plain;h=f426901e1be0f58fe4e9386cada50ca57d0a4f36
Upstream-Status: backport
gas/testsuite/
Backport from mainline:
2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/diagnostic.s: Update.
* gas/aarch64/diagnostic.l: Ditto.
* gas/aarch64/movi.s: Add new tests.
* gas/aarch64/movi.d: Update.
opcodes/
Backport from mainline:
2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Remove assertion.
* aarch64-opc.c (operand_general_constraint_met_p): Relax the range
check from [0, 255] to [-128, 255].
---
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 8ee06c8..475c93a 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ Backport from mainline:
+
+ 2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
+ * gas/aarch64/diagnostic.s: Update.
+ * gas/aarch64/diagnostic.l: Ditto.
+ * gas/aarch64/movi.s: Add new tests.
+ * gas/aarch64/movi.d: Update.
+
2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
Backport from mainline:
diff --git a/gas/testsuite/gas/aarch64/diagnostic.l b/gas/testsuite/gas/aarch64/diagnostic.l
index f37f11c..d7a1347 100644
--- a/gas/testsuite/gas/aarch64/diagnostic.l
+++ b/gas/testsuite/gas/aarch64/diagnostic.l
@@ -38,8 +38,8 @@
[^:]*:40: Error: invalid shift amount at operand 3 -- `shll v1.4s,v2.4h,#32'
[^:]*:41: Error: immediate value out of range 0 to 31 at operand 3 -- `shl v1.2s,v2.2s,32'
[^:]*:42: Error: immediate value out of range 1 to 8 at operand 3 -- `sqshrn2 v2.16b,v3.8h,#17'
-[^:]*:43: Error: immediate value out of range 0 to 255 at operand 2 -- `movi v1.4h,256'
-[^:]*:44: Error: immediate value out of range 0 to 255 at operand 2 -- `movi v1.4h,-1'
+[^:]*:43: Error: immediate value out of range -128 to 255 at operand 2 -- `movi v1.4h,256'
+[^:]*:44: Error: immediate value out of range -128 to 255 at operand 2 -- `movi v1.4h,-129'
[^:]*:45: Error: invalid shift operator at operand 2 -- `movi v1.4h,255,msl#8'
[^:]*:46: Error: invalid value for immediate at operand 2 -- `movi d0,256'
[^:]*:47: Error: immediate value should be a multiple of 8 at operand 2 -- `movi v1.4h,255,lsl#7'
diff --git a/gas/testsuite/gas/aarch64/diagnostic.s b/gas/testsuite/gas/aarch64/diagnostic.s
index 99ebf8f..e5443ab 100644
--- a/gas/testsuite/gas/aarch64/diagnostic.s
+++ b/gas/testsuite/gas/aarch64/diagnostic.s
@@ -41,7 +41,7 @@
shl v1.2s, v2.2s, 32
sqshrn2 v2.16b, v3.8h, #17
movi v1.4h, 256
- movi v1.4h, -1
+ movi v1.4h, -129
movi v1.4h, 255, msl #8
movi d0, 256
movi v1.4h, 255, lsl #7
diff --git a/gas/testsuite/gas/aarch64/movi.d b/gas/testsuite/gas/aarch64/movi.d
index 2c73cc4..c225b21 100644
--- a/gas/testsuite/gas/aarch64/movi.d
+++ b/gas/testsuite/gas/aarch64/movi.d
@@ -8201,3 +8201,6 @@ Disassembly of section \.text:
8004: 6f07e7e0 movi v0.2d, #0xffffffffffffffff
8008: 6f07e7e0 movi v0.2d, #0xffffffffffffffff
800c: 2f07e7ff movi d31, #0xffffffffffffffff
+ 8010: 0f04e403 movi v3.8b, #0x80
+ 8014: 0f04e423 movi v3.8b, #0x81
+ 8018: 0f07e7e3 movi v3.8b, #0xff
diff --git a/gas/testsuite/gas/aarch64/movi.s b/gas/testsuite/gas/aarch64/movi.s
index 99ca34a..76f2d47 100644
--- a/gas/testsuite/gas/aarch64/movi.s
+++ b/gas/testsuite/gas/aarch64/movi.s
@@ -102,3 +102,8 @@
movi v0.2d, bignum
movi d31, 18446744073709551615
.set bignum, 0xffffffffffffffff
+
+ // Allow -128 to 255 in #<imm8>
+ movi v3.8b, -128
+ movi v3.8b, -127
+ movi v3.8b, -1
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 96dfaeb..4adbc86 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,12 @@
+2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ Backport from mainline:
+
+ 2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com>
+ * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Remove assertion.
+ * aarch64-opc.c (operand_general_constraint_met_p): Relax the range
+ check from [0, 255] to [-128, 255].
+
2013-03-25 Tristan Gingold <gingold@adacore.com>
Backport of: 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 16cdaa9..ba463d9 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -369,7 +369,6 @@ aarch64_ins_advsimd_imm_modified (const aarch64_operand *self ATTRIBUTE_UNUSED,
imm = aarch64_shrink_expanded_imm8 (imm);
assert ((int)imm >= 0);
}
- assert (imm <= 255);
insert_fields (code, imm, 0, 2, FLD_defgh, FLD_abc);
if (kind == AARCH64_MOD_NONE)
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 73a760a..32f34c6 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -1724,10 +1724,10 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
assert (idx == 1);
if (aarch64_get_qualifier_esize (opnds[0].qualifier) != 8)
{
- /* uimm8 */
- if (!value_in_range_p (opnd->imm.value, 0, 255))
+ /* uimm8 or simm8 */
+ if (!value_in_range_p (opnd->imm.value, -128, 255))
{
- set_imm_out_of_range_error (mismatch_detail, idx, 0, 255);
+ set_imm_out_of_range_error (mismatch_detail, idx, -128, 255);
return 0;
}
}

View File

@ -1,60 +0,0 @@
Upstream-Status: Backport
* elf32-xtensa.c
* (free_section_cache): Renamed from clear_section_cache.
* (section_cache_section): Remove ineffectual zero of cache.
Call init_section_cache instead.
binutils build might fail on recent Linux distros:
binutils-2.23.1/bfd/elf32-xtensa.c:6078:36: error: argument to 'sizeof' in 'memset' call is the same expression as the destination; did you mean to dereference it? [-Werror=sizeof-pointer-memaccess]
memset (sec_cache, 0, sizeof (sec_cache));
^
binutils-2.23.1/bfd/elf32-xtensa.c:6120:32: error: argument to 'sizeof' in 'memset' call is the same expression as the destination; did you mean to dereference it? [-Werror=sizeof-pointer-memaccess]
memset (sec_cache, 0, sizeof (sec_cache));
The original commit is http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/elf32-xtensa.c.diff?r1=1.135&r2=1.136&cvsroot=src
Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
--- binutils-2.23.1/bfd/elf32-xtensa.c.org 2013-03-12 03:04:29.000000000 -0500
+++ binutils-2.23.1/bfd/elf32-xtensa.c 2013-03-12 03:06:37.000000000 -0500
@@ -6067,7 +6067,7 @@
static void
-clear_section_cache (section_cache_t *sec_cache)
+free_section_cache (section_cache_t *sec_cache)
{
if (sec_cache->sec)
{
@@ -6075,7 +6075,6 @@
release_internal_relocs (sec_cache->sec, sec_cache->relocs);
if (sec_cache->ptbl)
free (sec_cache->ptbl);
- memset (sec_cache, 0, sizeof (sec_cache));
}
}
@@ -6116,8 +6115,8 @@
goto err;
/* Fill in the new section cache. */
- clear_section_cache (sec_cache);
- memset (sec_cache, 0, sizeof (sec_cache));
+ free_section_cache (sec_cache);
+ init_section_cache (sec_cache);
sec_cache->sec = sec;
sec_cache->contents = contents;
@@ -8272,8 +8271,9 @@
#endif /* DEBUG */
error_return:
- if (prop_table) free (prop_table);
- clear_section_cache (&target_sec_cache);
+ if (prop_table)
+ free (prop_table);
+ free_section_cache (&target_sec_cache);
release_contents (sec, contents);
release_internal_relocs (sec, internal_relocs);

View File

@ -1,50 +0,0 @@
PR gas/14887
* config/tc-arm.c (skip_past_char): Skip whitespace before the anticipated character.
* config/tc-arm.c (parse_address_main): Delete skip of whitespace here as it is no longer needed.
Upstream-Status: Backport [PR14887]
Signed-off-by: Saul Wold <sgw@linux.intel.com>
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.4898
retrieving revision 1.4899
Index: binutils-2.23.2/gas/config/tc-arm.c
===================================================================
--- binutils-2.23.2.orig/gas/config/tc-arm.c
+++ binutils-2.23.2/gas/config/tc-arm.c
@@ -885,6 +885,9 @@ const char FLT_CHARS[] = "rRsSfFdDxXeEpP
static inline int
skip_past_char (char ** str, char c)
{
+ /* PR gas/14987: Allow for whitespace before the expected character. */
+ skip_whitespace (*str);
+
if (**str == c)
{
(*str)++;
@@ -5168,6 +5171,9 @@ parse_address_main (char **str, int i, i
return PARSE_OPERAND_SUCCESS;
}
+ /* PR gas/14987: Allow for whitespace before the expected character. */
+ skip_whitespace (p);
+
if ((reg = arm_reg_parse (&p, REG_TYPE_RN)) == FAIL)
{
inst.error = _(reg_expected_msgs[REG_TYPE_RN]);
Index: binutils-2.23.2/gas/testsuite/gas/arm/neon-ldst-es.s
===================================================================
--- binutils-2.23.2.orig/gas/testsuite/gas/arm/neon-ldst-es.s
+++ binutils-2.23.2/gas/testsuite/gas/arm/neon-ldst-es.s
@@ -57,3 +57,7 @@
vld2.32 {q1},[r7]
vld4.32 {q1-q2},[r7]
vld4.32 {q14-q15},[r7]
+
+ @ PR 14987 and 14887: Allow for whitespace in the instruction.
+ vld1.32 { d1 [ ] } , [ r2 ] , r3
+

View File

@ -1,26 +0,0 @@
Upstream-Status: Backport
* arc-dis.c (write_comments_): Don't use strncat due to
the size of state->commentBuffer pointer isn't predictable.
binutils build will fail on Fedora18+.
binutils-2.23.1/opcodes/arc-dis.c:430:13: error: argument to 'sizeof' in '__builtin_strncat' call is the same expression as the destination; did you mean to provide an explicit length? [-Werror=sizeof-pointer-memaccess]
sizeof (state->commentBuffer));
^
The original commit is http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/arc-dis.c.diff?r1=1.17&r2=1.18&cvsroot=src
Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
--- binutils-2.23.1/opcodes/arc-dis.c.orig 2013-03-13 00:10:27.978498158 -0500
+++ binutils-2.23.1/opcodes/arc-dis.c 2013-03-13 00:11:28.297499381 -0500
@@ -426,8 +426,7 @@
strcpy (state->commentBuffer, comment_prefix);
else
strcat (state->commentBuffer, ", ");
- strncat (state->commentBuffer, state->comm[i],
- sizeof (state->commentBuffer));
+ strcat (state->commentBuffer, state->comm[i]);
}
}
}

View File

@ -1,20 +0,0 @@
Upstream-Status: Pending
binutils build fails on Fedora18+ due to over array bounds issue:
binutils-2.23.1/opcodes/rl78-dis.c:230:13: error: array subscript is above array bounds [-Werror=array-bounds]
if (oper->use_es && indirect_type (oper->type))
^
Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
--- binutils-2.23.1/opcodes/rl78-dis.c.orig 2013-03-12 22:17:47.664361066 -0500
+++ binutils-2.23.1/opcodes/rl78-dis.c 2013-03-12 23:39:51.383460914 -0500
@@ -221,7 +221,7 @@
case '0':
case '1':
- oper = opcode.op + *s - '0';
+ oper = &opcode.op[*s - '0'];
if (do_bang)
PC ('!');

View File

@ -1,29 +0,0 @@
#!/bin/sh -e
## 127_x86_64_i386_biarch.dpatch
##
## DP: Description: Add (/usr)/lib32 to the search paths on x86_64.
## DP: Author: Aurelien Jarno <aurel32.debian.org>
## DP: Upstream status: Debian specific
#
# Hacked to apply with quilt
# Adapted to binutils 2.18.50.0.7
Upstream-Status: Inappropriate [embedded specific]
Index: binutils-2.22/ld/emulparams/elf_i386.sh
===================================================================
--- binutils-2.22.orig/ld/emulparams/elf_i386.sh
+++ binutils-2.22/ld/emulparams/elf_i386.sh
@@ -14,3 +14,13 @@ GENERATE_PIE_SCRIPT=yes
NO_SMALL_DATA=yes
SEPARATE_GOTPLT=12
IREL_IN_PLT=
+
+# Linux modify the default library search path to first include
+# a 32-bit specific directory.
+case "$target" in
+ x86_64*-linux* | i[3-7]86*-linux* | x86_64*-kfreebsd*-gnu | i[3-7]86*-kfreebsd*-gnu)
+ case "$EMULATION_NAME" in
+ *i386*) LIBPATH_SUFFIX=32 ;;
+ esac
+ ;;
+esac

View File

@ -1,398 +0,0 @@
Upstream-Status: Unknown
Signed-off-by: Khem Raj <raj.khem@gmail.com>
From 26adb06ce515aadfec08ce13109b4b98287f677b Mon Sep 17 00:00:00 2001
From: Nebu Philips <nphilips@netlogicmicro.com>
Date: Fri, 30 Jul 2010 15:10:03 -0700
Subject: [PATCH] Add support for Netlogic XLP
Using the mipsisa64r2nlm target, add support for XLP from
Netlogic. Also, update vendor name to NLM wherever applicable.
---
bfd/aoutx.h | 1 +
bfd/archures.c | 1 +
bfd/bfd-in2.h | 1 +
bfd/config.bfd | 5 +++++
bfd/cpu-mips.c | 6 ++++--
bfd/elfxx-mips.c | 8 ++++++++
binutils/readelf.c | 1 +
config.sub | 6 ++++++
gas/config/tc-mips.c | 7 ++++++-
gas/configure | 3 +++
gas/configure.tgt | 2 +-
gas/doc/c-mips.texi | 3 ++-
include/elf/mips.h | 1 +
include/opcode/mips.h | 6 +++++-
ld/configure.tgt | 2 ++
opcodes/mips-dis.c | 6 ++++++
opcodes/mips-opc.c | 31 ++++++++++++++++++++-----------
17 files changed, 73 insertions(+), 17 deletions(-)
Index: binutils-2.23.2/bfd/aoutx.h
===================================================================
--- binutils-2.23.2.orig/bfd/aoutx.h 2013-04-16 04:19:48.241282004 -0700
+++ binutils-2.23.2/bfd/aoutx.h 2013-04-16 04:19:52.741282087 -0700
@@ -798,6 +798,7 @@
case bfd_mach_mipsisa64r2:
case bfd_mach_mips_sb1:
case bfd_mach_mips_xlr:
+ case bfd_mach_mips_xlp:
/* FIXME: These should be MIPS3, MIPS4, MIPS16, MIPS32, etc. */
arch_flags = M_MIPS2;
break;
Index: binutils-2.23.2/bfd/archures.c
===================================================================
--- binutils-2.23.2.orig/bfd/archures.c 2013-04-16 04:19:48.241282004 -0700
+++ binutils-2.23.2/bfd/archures.c 2013-04-16 04:19:52.741282087 -0700
@@ -179,6 +179,7 @@
.#define bfd_mach_mips_octeonp 6601
.#define bfd_mach_mips_octeon2 6502
.#define bfd_mach_mips_xlr 887682 {* decimal 'XLR' *}
+.#define bfd_mach_mips_xlp 887680 {* decimal 'XLP' *}
.#define bfd_mach_mipsisa32 32
.#define bfd_mach_mipsisa32r2 33
.#define bfd_mach_mipsisa64 64
Index: binutils-2.23.2/bfd/bfd-in2.h
===================================================================
--- binutils-2.23.2.orig/bfd/bfd-in2.h 2013-04-16 04:19:48.241282004 -0700
+++ binutils-2.23.2/bfd/bfd-in2.h 2013-04-16 04:19:52.745282088 -0700
@@ -1908,6 +1908,7 @@
#define bfd_mach_mips_octeonp 6601
#define bfd_mach_mips_octeon2 6502
#define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */
+#define bfd_mach_mips_xlp 887680 /* decimal 'XLP' */
#define bfd_mach_mipsisa32 32
#define bfd_mach_mipsisa32r2 33
#define bfd_mach_mipsisa64 64
Index: binutils-2.23.2/bfd/config.bfd
===================================================================
--- binutils-2.23.2.orig/bfd/config.bfd 2013-04-16 04:19:50.897282052 -0700
+++ binutils-2.23.2/bfd/config.bfd 2013-04-16 04:19:52.745282088 -0700
@@ -992,6 +992,11 @@
targ_defvec=bfd_elf32_littlemips_vec
targ_selvecs="bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
;;
+ mipsisa64*-*-elf*)
+ targ_defvec=bfd_elf32_tradbigmips_vec
+ targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
+ want64=true
+ ;;
mips*-*-elf* | mips*-*-rtems* | mips*-*-vxworks | mips*-*-windiss)
targ_defvec=bfd_elf32_bigmips_vec
targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
Index: binutils-2.23.2/bfd/cpu-mips.c
===================================================================
--- binutils-2.23.2.orig/bfd/cpu-mips.c 2013-04-16 04:19:48.241282004 -0700
+++ binutils-2.23.2/bfd/cpu-mips.c 2013-04-16 04:27:21.097290918 -0700
@@ -97,7 +97,8 @@
I_mipsocteonp,
I_mipsocteon2,
I_xlr,
- I_micromips
+ I_micromips,
+ I_xlp
};
#define NN(index) (&arch_info_struct[(index) + 1])
@@ -140,7 +141,8 @@
N (64, 64, bfd_mach_mips_octeonp,"mips:octeon+", FALSE, NN(I_mipsocteonp)),
N (64, 64, bfd_mach_mips_octeon2,"mips:octeon2", FALSE, NN(I_mipsocteon2)),
N (64, 64, bfd_mach_mips_xlr, "mips:xlr", FALSE, NN(I_xlr)),
- N (64, 64, bfd_mach_mips_micromips,"mips:micromips",FALSE,0)
+ N (64, 64, bfd_mach_mips_micromips,"mips:micromips",FALSE,NN(I_micromips)),
+ N (64, 64, bfd_mach_mips_xlp, "mips:xlp", FALSE, 0)
};
/* The default architecture is mips:3000, but with a machine number of
Index: binutils-2.23.2/bfd/elfxx-mips.c
===================================================================
--- binutils-2.23.2.orig/bfd/elfxx-mips.c 2013-04-16 04:19:48.241282004 -0700
+++ binutils-2.23.2/bfd/elfxx-mips.c 2013-04-16 04:19:52.749282089 -0700
@@ -6293,6 +6293,9 @@
case E_MIPS_MACH_XLR:
return bfd_mach_mips_xlr;
+ case E_MIPS_MACH_XLP:
+ return bfd_mach_mips_xlp;
+
default:
switch (flags & EF_MIPS_ARCH)
{
@@ -11048,6 +11051,10 @@
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON2;
break;
+ case bfd_mach_mips_xlp:
+ val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_XLP;
+ break;
+
case bfd_mach_mipsisa32:
val = E_MIPS_ARCH_32;
break;
@@ -13639,6 +13646,7 @@
{ bfd_mach_mips_octeon2, bfd_mach_mips_octeonp },
{ bfd_mach_mips_octeonp, bfd_mach_mips_octeon },
{ bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 },
+ { bfd_mach_mips_xlp, bfd_mach_mipsisa64r2 },
/* MIPS64 extensions. */
{ bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
Index: binutils-2.23.2/binutils/readelf.c
===================================================================
--- binutils-2.23.2.orig/binutils/readelf.c 2013-04-16 04:19:48.241282004 -0700
+++ binutils-2.23.2/binutils/readelf.c 2013-04-16 04:19:52.753282089 -0700
@@ -2435,6 +2435,7 @@
case E_MIPS_MACH_OCTEON: strcat (buf, ", octeon"); break;
case E_MIPS_MACH_OCTEON2: strcat (buf, ", octeon2"); break;
case E_MIPS_MACH_XLR: strcat (buf, ", xlr"); break;
+ case E_MIPS_MACH_XLP: strcat (buf, ", xlp"); break;
case 0:
/* We simply ignore the field in this case to avoid confusion:
MIPS ELF does not specify EF_MIPS_MACH, it is a GNU
Index: binutils-2.23.2/gas/config/tc-mips.c
===================================================================
--- binutils-2.23.2.orig/gas/config/tc-mips.c 2013-04-16 04:19:48.241282004 -0700
+++ binutils-2.23.2/gas/config/tc-mips.c 2013-04-16 04:19:52.761282087 -0700
@@ -530,6 +530,7 @@
|| mips_opts.arch == CPU_RM7000 \
|| mips_opts.arch == CPU_VR5500 \
|| mips_opts.micromips \
+ || mips_opts.arch == CPU_XLP \
)
/* Whether the processor uses hardware interlocks to protect reads
@@ -558,6 +559,7 @@
&& mips_opts.isa != ISA_MIPS3) \
|| mips_opts.arch == CPU_R4300 \
|| mips_opts.micromips \
+ || mips_opts.arch == CPU_XLP \
)
/* Whether the processor uses hardware interlocks to protect reads
@@ -19176,9 +19178,12 @@
{ "octeon+", 0, ISA_MIPS64R2, CPU_OCTEONP },
{ "octeon2", 0, ISA_MIPS64R2, CPU_OCTEON2 },
- /* RMI Xlr */
+ /* Netlogic Xlr */
{ "xlr", 0, ISA_MIPS64, CPU_XLR },
+ /* Netlogic Xlp */
+ { "xlp", 0, ISA_MIPS64R2, CPU_XLP },
+
/* Broadcom XLP.
XLP is mostly like XLR, with the prominent exception that it is
MIPS64R2 rather than MIPS64. */
Index: binutils-2.23.2/gas/configure
===================================================================
--- binutils-2.23.2.orig/gas/configure 2013-04-16 04:19:50.353282044 -0700
+++ binutils-2.23.2/gas/configure 2013-04-16 04:19:52.765282087 -0700
@@ -12695,6 +12695,9 @@
mipsisa64r2 | mipsisa64r2el)
mips_cpu=mips64r2
;;
+ mipsisa64r2nlm | mipsisa64r2nlmel)
+ mips_cpu=xlp
+ ;;
mipstx39 | mipstx39el)
mips_cpu=r3900
;;
Index: binutils-2.23.2/gas/configure.tgt
===================================================================
--- binutils-2.23.2.orig/gas/configure.tgt 2013-04-16 04:19:50.097282037 -0700
+++ binutils-2.23.2/gas/configure.tgt 2013-04-16 04:19:52.765282087 -0700
@@ -310,7 +310,7 @@
mips-*-sysv4*MP* | mips-*-gnu*) fmt=elf em=tmips ;;
mips*-sde-elf*) fmt=elf em=tmips ;;
mips-*-sysv*) fmt=ecoff ;;
- mips-*-elf* | mips-*-rtems*) fmt=elf ;;
+ mips-*-elf* | mips-*-rtems*) fmt=elf em=tmips ;;
mips-*-netbsd*) fmt=elf em=tmips ;;
mips-*-openbsd*) fmt=elf em=tmips ;;
Index: binutils-2.23.2/include/elf/mips.h
===================================================================
--- binutils-2.23.2.orig/include/elf/mips.h 2013-04-16 04:19:48.241282004 -0700
+++ binutils-2.23.2/include/elf/mips.h 2013-04-16 04:19:52.765282087 -0700
@@ -268,6 +268,7 @@
#define E_MIPS_MACH_SB1 0x008a0000
#define E_MIPS_MACH_OCTEON 0x008b0000
#define E_MIPS_MACH_XLR 0x008c0000
+#define E_MIPS_MACH_XLP 0x008e0000
#define E_MIPS_MACH_OCTEON2 0x008d0000
#define E_MIPS_MACH_5400 0x00910000
#define E_MIPS_MACH_5500 0x00980000
Index: binutils-2.23.2/include/opcode/mips.h
===================================================================
--- binutils-2.23.2.orig/include/opcode/mips.h 2013-04-16 04:19:48.241282004 -0700
+++ binutils-2.23.2/include/opcode/mips.h 2013-04-16 04:19:52.769282089 -0700
@@ -772,8 +772,10 @@
#define INSN_LOONGSON_2F 0x80000000
/* Loongson 3A. */
#define INSN_LOONGSON_3A 0x00000400
-/* RMI Xlr instruction */
+/* Netlogic Xlr instruction */
#define INSN_XLR 0x00000020
+/* Netlogic Xlp instruction */
+#define INSN_XLP 0x00000040
/* MCU (MicroController) ASE */
#define INSN_MCU 0x00000010
@@ -833,6 +835,7 @@
#define CPU_OCTEONP 6601
#define CPU_OCTEON2 6502
#define CPU_XLR 887682 /* decimal 'XLR' */
+#define CPU_XLP 887680 /* decimal 'XLP' */
/* Return true if the given CPU is included in INSN_* mask MASK. */
@@ -897,6 +900,9 @@
case CPU_XLR:
return (mask & INSN_XLR) != 0;
+ case CPU_XLP:
+ return (mask & INSN_XLP) != 0;
+
default:
return FALSE;
}
Index: binutils-2.23.2/ld/configure.tgt
===================================================================
--- binutils-2.23.2.orig/ld/configure.tgt 2013-04-16 04:19:50.897282052 -0700
+++ binutils-2.23.2/ld/configure.tgt 2013-04-16 04:19:52.769282089 -0700
@@ -426,6 +426,8 @@
targ_extra_emuls="elf32btsmip elf32ltsmipn32 elf64ltsmip elf32btsmipn32 elf64btsmip" ;;
mips*-sde-elf*) targ_emul=elf32btsmip
targ_extra_emuls="elf32ltsmip elf32btsmipn32 elf64btsmip elf32ltsmipn32 elf64ltsmip" ;;
+mipsisa64*-*-elf*) targ_emul=elf32btsmip
+ targ_extra_emuls="elf32ltsmip elf64btsmip elf64ltsmip" ;;
mips*el-*-elf*) targ_emul=elf32elmip ;;
mips*-*-elf*) targ_emul=elf32ebmip ;;
mips*-*-rtems*) targ_emul=elf32ebmip ;;
Index: binutils-2.23.2/opcodes/mips-dis.c
===================================================================
--- binutils-2.23.2.orig/opcodes/mips-dis.c 2013-04-16 04:19:48.241282004 -0700
+++ binutils-2.23.2/opcodes/mips-dis.c 2013-04-16 04:19:52.769282089 -0700
@@ -627,6 +627,12 @@
mips_cp0sel_names_xlr, ARRAY_SIZE (mips_cp0sel_names_xlr),
mips_hwr_names_numeric },
+ { "xlp", 1, bfd_mach_mips_xlp, CPU_XLP,
+ (ISA_MIPS64R2 | INSN_XLP),
+ mips_cp0_names_mips3264r2,
+ mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2),
+ mips_hwr_names_mips3264r2 },
+
/* This entry, mips16, is here only for ISA/processor selection; do
not print its name. */
{ "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3,
Index: binutils-2.23.2/opcodes/mips-opc.c
===================================================================
--- binutils-2.23.2.orig/opcodes/mips-opc.c 2013-04-16 04:19:48.241282004 -0700
+++ binutils-2.23.2/opcodes/mips-opc.c 2013-04-16 04:19:52.773282090 -0700
@@ -126,6 +126,7 @@
#define IOCTP (INSN_OCTEONP | INSN_OCTEON2)
#define IOCT2 INSN_OCTEON2
#define XLR INSN_XLR
+#define XLP INSN_XLP
#define G1 (T3 \
)
@@ -606,6 +607,7 @@
{"cins", "t,r,+p,+s",0x70000032, 0xfc00003f, WR_t|RD_s, 0, IOCT },
{"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d|WR_t|RD_s, 0, I32|N55 },
{"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d|WR_t|RD_s, 0, I32|N55 },
+{"crc", "d,s,t", 0x7000001c, 0xfc0007ff, WR_d|RD_s|RD_t, 0, XLP },
{"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, 0, I1, IOCT|IOCTP|IOCT2 },
{"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, 0, I1 },
{"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, 0, I1 },
@@ -638,10 +640,11 @@
{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s, 0, I3 },
{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I3 },
{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, 0, I3 },
-{"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_d|RD_s|RD_t|WR_C0|RD_C0, 0, XLR },
+{"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_d|RD_s|RD_t|WR_C0|RD_C0,0, XLR|XLP },
{"dbreak", "", 0x7000003f, 0xffffffff, 0, 0, N5 },
{"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t, 0, I64|N55 },
{"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t, 0, I64|N55 },
+{"dcrc", "d,s,t", 0x7000001d, 0xfc0007ff, WR_d|RD_s|RD_t, 0, XLP },
/* dctr and dctw are used on the r5000. */
{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, 0, I3 },
{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, 0, I3 },
@@ -697,6 +700,7 @@
{"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, 0, I3 },
{"dmfc0", "t,+D", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, 0, I64 },
{"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, 0, I64 },
+{"dmfur", "t,d", 0x7000001e, 0xffe007ff, WR_t, 0, XLP},
{"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
{"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, 0, I3 },
@@ -710,6 +714,8 @@
/* dmtc2 is at the bottom of the table. */
/* dmfc3 is at the bottom of the table. */
/* dmtc3 is at the bottom of the table. */
+{"dmtur", "t,d", 0x7000001f, 0xffe007ff, RD_t, 0, XLP},
+{"dmul", "d,s,t", 0x70000006, 0xfc0007ff, WR_d|RD_s|RD_t, 0, XLP},
{"dmul", "d,v,t", 0x70000003, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, 0, IOCT },
{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, 0, I3 },
{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, 0, I3 },
@@ -848,9 +854,9 @@
{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, 0, I1 },
{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, 0, I3 },
{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, 0, I1 },
-{"ldaddw", "t,b", 0x70000010, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR },
-{"ldaddwu", "t,b", 0x70000011, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR },
-{"ldaddd", "t,b", 0x70000012, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR },
+{"ldaddw", "t,b", 0x70000010, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR|XLP },
+{"ldaddwu", "t,b", 0x70000011, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR|XLP },
+{"ldaddd", "t,b", 0x70000012, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR|XLP },
{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, 0, I2 },
{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, 0, I2 },
{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I2 },
@@ -985,7 +991,7 @@
{"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, 0, I1 },
{"mflo", "d,9", 0x00000012, 0xff9f07ff, WR_d|RD_LO, 0, D32 },
{"mflhxu", "d", 0x00000052, 0xffff07ff, WR_d|MOD_HILO, 0, SMT },
-{"mfcr", "t,s", 0x70000018, 0xfc00ffff, WR_t, 0, XLR },
+{"mfcr", "t,s", 0x70000018, 0xfc00ffff, WR_t, 0, XLR|XLP },
{"min.ob", "X,Y,Q", 0x78000006, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, MX|SB1 },
{"min.ob", "D,S,T", 0x4ac00006, 0xffe0003f, WR_D|RD_S|RD_T, 0, N54 },
{"min.ob", "D,S,T[e]", 0x48000006, 0xfe20003f, WR_D|RD_S|RD_T, 0, N54 },
@@ -1029,10 +1035,13 @@
/* move is at the top of the table. */
{"msgn.qh", "X,Y,Q", 0x78200000, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, MX },
{"msgsnd", "t", 0, (int) M_MSGSND, INSN_MACRO, 0, XLR },
+{"msgsnds", "d,t", 0x4a000001, 0xffe007ff, WR_d|RD_t|RD_C0|WR_C0, 0, XLP },
{"msgld", "", 0, (int) M_MSGLD, INSN_MACRO, 0, XLR },
{"msgld", "t", 0, (int) M_MSGLD_T, INSN_MACRO, 0, XLR },
-{"msgwait", "", 0, (int) M_MSGWAIT, INSN_MACRO, 0, XLR },
-{"msgwait", "t", 0, (int) M_MSGWAIT_T,INSN_MACRO, 0, XLR },
+{"msglds", "d,t", 0x4a000002, 0xffe007ff, WR_d|RD_t|RD_C0|WR_C0, 0, XLP },
+{"msgwait", "", 0, (int) M_MSGWAIT, INSN_MACRO, 0, XLR|XLP },
+{"msgwait", "t", 0, (int) M_MSGWAIT_T,INSN_MACRO, 0, XLR|XLP },
+{"msgsync", "", 0x4a000004, 0xffffffff, 0, 0, XLP },
{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I4_33 },
{"msub.d", "D,S,T", 0x46200019, 0xffe0003f, RD_S|RD_T|WR_D|FP_D, 0, IL2E },
{"msub.d", "D,S,T", 0x72200019, 0xffe0003f, RD_S|RD_T|WR_D|FP_D, 0, IL2F },
@@ -1066,7 +1075,7 @@
{"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, 0, I1 },
{"mtlo", "s,7", 0x00000013, 0xfc1fe7ff, RD_s|WR_LO, 0, D32 },
{"mtlhx", "s", 0x00000053, 0xfc1fffff, RD_s|MOD_HILO, 0, SMT },
-{"mtcr", "t,s", 0x70000019, 0xfc00ffff, RD_t, 0, XLR },
+{"mtcr", "t,s", 0x70000019, 0xfc00ffff, RD_t, 0, XLR|XLP },
{"mtm0", "s", 0x70000008, 0xfc1fffff, RD_s, 0, IOCT },
{"mtm1", "s", 0x7000000c, 0xfc1fffff, RD_s, 0, IOCT },
{"mtm2", "s", 0x7000000d, 0xfc1fffff, RD_s, 0, IOCT },
@@ -1425,9 +1434,9 @@
{"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, SM|RD_S|RD_t|RD_b|FP_D, 0, I5_33|N55},
{"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, 0, I1 },
{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, 0, I1 },
-{"swapw", "t,b", 0x70000014, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR },
-{"swapwu", "t,b", 0x70000015, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR },
-{"swapd", "t,b", 0x70000016, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR },
+{"swapw", "t,b", 0x70000014, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR|XLP },
+{"swapwu", "t,b", 0x70000015, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR|XLP },
+{"swapd", "t,b", 0x70000016, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR|XLP },
{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, 0, I1, IOCT|IOCTP|IOCT2 },
{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, 0, I1, IOCT|IOCTP|IOCT2 },
{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, 0, I1 },

View File

@ -1,5 +1,3 @@
PR = "r4"
LIC_FILES_CHKSUM="\
file://src-release;endline=17;md5=4830a9ef968f3b18dd5e9f2c00db2d35\
file://COPYING;md5=59530bdf33659b29e73d4adb9f9f6552\
@ -20,33 +18,15 @@ SRC_URI = "\
file://binutils-uclibc-300-006_better_file_error.patch \
file://binutils-uclibc-300-012_check_ldrunpath_length.patch \
file://binutils-uclibc-gas-needs-libm.patch \
file://binutils-x86_64_i386_biarch.patch \
file://libtool-2.4-update.patch \
file://libiberty_path_fix.patch \
file://binutils-poison.patch \
file://libtool-rpath-fix.patch \
file://binutils-armv5e.patch \
file://mips64-default-ld-emulation.patch \
${BACKPORT} \
file://binutils-fix-over-array-bounds-issue.patch \
file://binutils-xlp-support.patch \
file://fix-pr15815.patch \
"
BACKPORT = "\
file://backport/0001-doc-binutils.texi-elfedit-Fix-use-of-itemx-in-table.patch \
file://backport/0001-ld.texinfo-Replace-with-when-it-is-part-of-the-text.patch \
file://backport/binutils-fix-ineffectual-zero-of-cache.patch \
file://backport/binutils-replace-strncat-with-strcat.patch \
file://backport/0001-config-tc-ppc.c-md_assemble-Do-not-generate-APUinfo-.patch \
file://backport/binutils-fix-skip-whitespace-pr14887.patch \
file://backport/aarch64-crn.patch \
file://backport/aarch64-movi.patch \
file://backport/0001-config-tc-ppc.c-PPC_VLE_SPLIT16A-Delete-unused-macro.patch \
file://backport/0002-config-tc-ppc.c-md_apply_fix-Sign-extend-fieldval-un.patch \
file://backport/0001-emultempl-elf32.em-gld-EMULATION_NAME-_before_alloca.patch \
file://backport/0002-emultempl-elf32.em-gld-EMULATION_NAME-_before_alloca.patch \
file://backport/0003-gold.patch \
"
SRC_URI[md5sum] = "4f8fa651e35ef262edc01d60fb45702e"
SRC_URI[sha256sum] = "fe914e56fed7a9ec2eb45274b1f2e14b0d8b4f41906a5194eac6883cfe5c1097"
SRC_URI[md5sum] = "e0f71a7b2ddab0f8612336ac81d9636b"
SRC_URI[sha256sum] = "e5e8c5be9664e7f7f96e0d09919110ab5ad597794f5b1809871177a0f0f14137"

View File

@ -52,10 +52,10 @@ Code Merged from Sourcery G++ binutils 2.19 - 4.4-277
Signed-off-by: Mark Hatle <mark.hatle@windriver.com>
Signed-off-by: Scott Garman <scott.a.garman@intel.com>
Index: binutils-2.22.90/ld/config.in
Index: binutils-2.24/ld/config.in
===================================================================
--- binutils-2.22.90.orig/ld/config.in 2012-05-17 08:13:21.000000000 -0700
+++ binutils-2.22.90/ld/config.in 2012-08-07 23:09:34.834490113 -0700
--- binutils-2.24.orig/ld/config.in 2013-12-15 11:46:17.000000000 -0800
+++ binutils-2.24/ld/config.in 2013-12-15 11:46:59.810435651 -0800
@@ -11,6 +11,9 @@
language is requested. */
#undef ENABLE_NLS
@ -66,11 +66,11 @@ Index: binutils-2.22.90/ld/config.in
/* Additional extension a shared object might have. */
#undef EXTRA_SHLIB_EXTENSION
Index: binutils-2.22.90/ld/configure
Index: binutils-2.24/ld/configure
===================================================================
--- binutils-2.22.90.orig/ld/configure 2012-08-07 23:08:50.000000000 -0700
+++ binutils-2.22.90/ld/configure 2012-08-07 23:09:34.838490177 -0700
@@ -776,6 +776,7 @@
--- binutils-2.24.orig/ld/configure 2013-12-15 11:46:17.000000000 -0800
+++ binutils-2.24/ld/configure 2013-12-15 11:46:59.810435651 -0800
@@ -777,6 +777,7 @@
enable_targets
enable_64_bit_bfd
with_sysroot
@ -78,7 +78,7 @@ Index: binutils-2.22.90/ld/configure
enable_gold
enable_got
enable_werror
@@ -1432,6 +1433,8 @@
@@ -1433,6 +1434,8 @@
(and sometimes confusing) to the casual installer
--enable-targets alternative target configurations
--enable-64-bit-bfd 64-bit support (on hosts with narrower word sizes)
@ -87,7 +87,7 @@ Index: binutils-2.22.90/ld/configure
--enable-gold[=ARG] build gold [ARG={default,yes,no}]
--enable-got=<type> GOT handling scheme (target, single, negative,
multigot)
@@ -4344,7 +4347,18 @@
@@ -4345,7 +4348,18 @@
fi
@ -106,11 +106,11 @@ Index: binutils-2.22.90/ld/configure
# Check whether --enable-got was given.
if test "${enable_got+set}" = set; then :
Index: binutils-2.22.90/ld/configure.in
Index: binutils-2.24/ld/configure.in
===================================================================
--- binutils-2.22.90.orig/ld/configure.in 2012-05-17 08:13:23.000000000 -0700
+++ binutils-2.22.90/ld/configure.in 2012-08-07 23:09:34.838490177 -0700
@@ -70,6 +70,16 @@
--- binutils-2.24.orig/ld/configure.in 2013-12-15 11:46:17.000000000 -0800
+++ binutils-2.24/ld/configure.in 2013-12-15 11:46:59.810435651 -0800
@@ -87,6 +87,16 @@
AC_SUBST(TARGET_SYSTEM_ROOT)
AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE)
@ -127,10 +127,10 @@ Index: binutils-2.22.90/ld/configure.in
dnl Use --enable-gold to decide if this linker should be the default.
dnl "install_as_default" is set to false if gold is the default linker.
dnl "installed_linker" is the installed BFD linker name.
Index: binutils-2.22.90/ld/ldfile.c
Index: binutils-2.24/ld/ldfile.c
===================================================================
--- binutils-2.22.90.orig/ld/ldfile.c 2012-07-13 06:20:26.000000000 -0700
+++ binutils-2.22.90/ld/ldfile.c 2012-08-07 23:30:35.166538044 -0700
--- binutils-2.24.orig/ld/ldfile.c 2013-12-15 11:46:17.000000000 -0800
+++ binutils-2.24/ld/ldfile.c 2013-12-15 11:46:59.813768989 -0800
@@ -116,6 +116,23 @@
new_dirs->name = concat (ld_sysroot, name + 1, (const char *) NULL);
else
@ -155,11 +155,11 @@ Index: binutils-2.22.90/ld/ldfile.c
}
/* Try to open a BFD for a lang_input_statement. */
Index: binutils-2.22.90/ld/ld.h
Index: binutils-2.24/ld/ld.h
===================================================================
--- binutils-2.22.90.orig/ld/ld.h 2012-07-09 23:50:55.000000000 -0700
+++ binutils-2.22.90/ld/ld.h 2012-08-07 23:09:34.838490177 -0700
@@ -203,6 +203,14 @@
--- binutils-2.24.orig/ld/ld.h 2013-12-15 11:46:17.000000000 -0800
+++ binutils-2.24/ld/ld.h 2013-12-15 11:46:59.813768989 -0800
@@ -180,6 +180,14 @@
/* If TRUE we'll just print the default output on stdout. */
bfd_boolean print_output_format;
@ -174,24 +174,24 @@ Index: binutils-2.22.90/ld/ld.h
/* Big or little endian as set on command line. */
enum endian_enum endian;
Index: binutils-2.22.90/ld/ldmain.c
Index: binutils-2.24/ld/ldmain.c
===================================================================
--- binutils-2.22.90.orig/ld/ldmain.c 2012-07-13 06:20:26.000000000 -0700
+++ binutils-2.22.90/ld/ldmain.c 2012-08-07 23:09:34.846490172 -0700
@@ -265,6 +265,8 @@
--- binutils-2.24.orig/ld/ldmain.c 2013-12-15 11:46:17.000000000 -0800
+++ binutils-2.24/ld/ldmain.c 2013-12-15 11:48:12.087101740 -0800
@@ -266,6 +266,8 @@
command_line.warn_mismatch = TRUE;
command_line.warn_search_mismatch = TRUE;
command_line.check_section_addresses = -1;
command_line.disable_target_specific_optimizations = -1;
+ command_line.poison_system_directories = TRUE;
+ command_line.error_poison_system_directories = FALSE;
/* We initialize DEMANGLING based on the environment variable
COLLECT_NO_DEMANGLE. The gcc collect2 program will demangle the
Index: binutils-2.22.90/ld/ld.texinfo
Index: binutils-2.24/ld/ld.texinfo
===================================================================
--- binutils-2.22.90.orig/ld/ld.texinfo 2012-07-09 23:50:55.000000000 -0700
+++ binutils-2.22.90/ld/ld.texinfo 2012-08-07 23:09:34.850490143 -0700
@@ -2147,6 +2147,18 @@
--- binutils-2.24.orig/ld/ld.texinfo 2013-12-15 11:46:17.000000000 -0800
+++ binutils-2.24/ld/ld.texinfo 2013-12-15 11:46:59.813768989 -0800
@@ -2175,6 +2175,18 @@
Passing @code{none} for @var{style} disables the setting from any
@code{--build-id} options earlier on the command line.
@ -210,26 +210,26 @@ Index: binutils-2.22.90/ld/ld.texinfo
@end table
@c man end
Index: binutils-2.22.90/ld/lexsup.c
Index: binutils-2.24/ld/lexsup.c
===================================================================
--- binutils-2.22.90.orig/ld/lexsup.c 2012-07-13 06:20:26.000000000 -0700
+++ binutils-2.22.90/ld/lexsup.c 2012-08-07 23:09:34.850490143 -0700
@@ -496,6 +496,14 @@
TWO_DASHES },
{ {"wrap", required_argument, NULL, OPTION_WRAP},
'\0', N_("SYMBOL"), N_("Use wrapper functions for SYMBOL"), TWO_DASHES },
--- binutils-2.24.orig/ld/lexsup.c 2013-12-15 11:46:17.000000000 -0800
+++ binutils-2.24/ld/lexsup.c 2013-12-15 11:49:28.950434490 -0800
@@ -507,6 +507,14 @@
OPTION_IGNORE_UNRESOLVED_SYMBOL},
'\0', N_("SYMBOL"),
N_("Unresolved SYMBOL will not cause an error or warning"), TWO_DASHES },
+ { {"no-poison-system-directories", no_argument, NULL,
+ OPTION_NO_POISON_SYSTEM_DIRECTORIES},
+ '\0', NULL, N_("Do not warn for -L options using system directories"),
+ TWO_DASHES },
+ { {"error-poison-system-directories", no_argument, NULL,
+ OPTION_ERROR_POISON_SYSTEM_DIRECTORIES},
+ + OPTION_ERROR_POISON_SYSTEM_DIRECTORIES},
+ '\0', NULL, N_("Give an error for -L options using system directories"),
+ TWO_DASHES },
};
#define OPTION_COUNT ARRAY_SIZE (ld_options)
@@ -1424,6 +1432,14 @@
@@ -1442,6 +1450,14 @@
einfo (_("%P%X: --hash-size needs a numeric argument\n"));
}
break;
@ -244,16 +244,16 @@ Index: binutils-2.22.90/ld/lexsup.c
}
}
Index: binutils-2.22.90/ld/ldlex.h
Index: binutils-2.24/ld/ldlex.h
===================================================================
--- binutils-2.22.90.orig/ld/ldlex.h 2012-05-26 04:13:19.000000000 -0700
+++ binutils-2.22.90/ld/ldlex.h 2012-08-07 23:34:17.122546581 -0700
@@ -135,6 +135,8 @@
#endif /* ENABLE_PLUGINS */
--- binutils-2.24.orig/ld/ldlex.h 2013-12-15 11:46:17.000000000 -0800
+++ binutils-2.24/ld/ldlex.h 2013-12-15 11:47:43.230435299 -0800
@@ -138,6 +138,8 @@
OPTION_DEFAULT_SCRIPT,
OPTION_PRINT_OUTPUT_FORMAT,
OPTION_IGNORE_UNRESOLVED_SYMBOL,
+ OPTION_NO_POISON_SYSTEM_DIRECTORIES,
+ OPTION_ERROR_POISON_SYSTEM_DIRECTORIES
+ OPTION_ERROR_POISON_SYSTEM_DIRECTORIES,
};
/* The initial parser states. */

View File

@ -0,0 +1,402 @@
Upstream-Status: Unknown
Signed-off-by: Khem Raj <raj.khem@gmail.com>
From 26adb06ce515aadfec08ce13109b4b98287f677b Mon Sep 17 00:00:00 2001
From: Nebu Philips <nphilips@netlogicmicro.com>
Date: Fri, 30 Jul 2010 15:10:03 -0700
Subject: [PATCH] Add support for Netlogic XLP
Using the mipsisa64r2nlm target, add support for XLP from
Netlogic. Also, update vendor name to NLM wherever applicable.
---
bfd/aoutx.h | 1 +
bfd/archures.c | 1 +
bfd/bfd-in2.h | 1 +
bfd/config.bfd | 5 +++++
bfd/cpu-mips.c | 6 ++++--
bfd/elfxx-mips.c | 8 ++++++++
binutils/readelf.c | 1 +
config.sub | 6 ++++++
gas/config/tc-mips.c | 7 ++++++-
gas/configure | 3 +++
gas/configure.tgt | 2 +-
gas/doc/c-mips.texi | 3 ++-
include/elf/mips.h | 1 +
include/opcode/mips.h | 6 +++++-
ld/configure.tgt | 2 ++
opcodes/mips-dis.c | 6 ++++++
opcodes/mips-opc.c | 31 ++++++++++++++++++++-----------
17 files changed, 73 insertions(+), 17 deletions(-)
Index: binutils-2.24/bfd/aoutx.h
===================================================================
--- binutils-2.24.orig/bfd/aoutx.h 2013-12-15 13:07:57.180399300 -0800
+++ binutils-2.24/bfd/aoutx.h 2013-12-15 13:08:03.397065919 -0800
@@ -798,6 +798,7 @@
case bfd_mach_mipsisa64r2:
case bfd_mach_mips_sb1:
case bfd_mach_mips_xlr:
+ case bfd_mach_mips_xlp:
/* FIXME: These should be MIPS3, MIPS4, MIPS16, MIPS32, etc. */
arch_flags = M_MIPS2;
break;
Index: binutils-2.24/bfd/archures.c
===================================================================
--- binutils-2.24.orig/bfd/archures.c 2013-12-15 13:07:57.180399300 -0800
+++ binutils-2.24/bfd/archures.c 2013-12-15 13:08:03.397065919 -0800
@@ -178,6 +178,7 @@
.#define bfd_mach_mips_octeonp 6601
.#define bfd_mach_mips_octeon2 6502
.#define bfd_mach_mips_xlr 887682 {* decimal 'XLR' *}
+.#define bfd_mach_mips_xlp 887680 {* decimal 'XLP' *}
.#define bfd_mach_mipsisa32 32
.#define bfd_mach_mipsisa32r2 33
.#define bfd_mach_mipsisa64 64
Index: binutils-2.24/bfd/bfd-in2.h
===================================================================
--- binutils-2.24.orig/bfd/bfd-in2.h 2013-12-15 13:07:57.180399300 -0800
+++ binutils-2.24/bfd/bfd-in2.h 2013-12-15 13:08:03.400399254 -0800
@@ -1933,6 +1933,7 @@
#define bfd_mach_mips_octeonp 6601
#define bfd_mach_mips_octeon2 6502
#define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */
+#define bfd_mach_mips_xlp 887680 /* decimal 'XLP' */
#define bfd_mach_mipsisa32 32
#define bfd_mach_mipsisa32r2 33
#define bfd_mach_mipsisa64 64
Index: binutils-2.24/bfd/config.bfd
===================================================================
--- binutils-2.24.orig/bfd/config.bfd 2013-12-15 13:08:03.047065922 -0800
+++ binutils-2.24/bfd/config.bfd 2013-12-15 13:08:03.400399254 -0800
@@ -1032,6 +1032,11 @@
targ_defvec=bfd_elf32_littlemips_vec
targ_selvecs="bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
;;
+ mipsisa64*-*-elf*)
+ targ_defvec=bfd_elf32_tradbigmips_vec
+ targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
+ want64=true
+ ;;
mips*-*-elf* | mips*-*-rtems* | mips*-*-vxworks | mips*-*-windiss)
targ_defvec=bfd_elf32_bigmips_vec
targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
Index: binutils-2.24/bfd/cpu-mips.c
===================================================================
--- binutils-2.24.orig/bfd/cpu-mips.c 2013-12-15 13:07:57.180399300 -0800
+++ binutils-2.24/bfd/cpu-mips.c 2013-12-15 13:08:03.400399254 -0800
@@ -99,7 +99,8 @@
I_mipsocteonp,
I_mipsocteon2,
I_xlr,
- I_micromips
+ I_micromips,
+ I_xlp
};
#define NN(index) (&arch_info_struct[(index) + 1])
@@ -143,7 +144,8 @@
N (64, 64, bfd_mach_mips_octeonp,"mips:octeon+", FALSE, NN(I_mipsocteonp)),
N (64, 64, bfd_mach_mips_octeon2,"mips:octeon2", FALSE, NN(I_mipsocteon2)),
N (64, 64, bfd_mach_mips_xlr, "mips:xlr", FALSE, NN(I_xlr)),
- N (64, 64, bfd_mach_mips_micromips,"mips:micromips",FALSE,0)
+ N (64, 64, bfd_mach_mips_micromips,"mips:micromips",FALSE,NN(I_micromips)),
+ N (64, 64, bfd_mach_mips_xlp, "mips:xlp", FALSE, 0)
};
/* The default architecture is mips:3000, but with a machine number of
Index: binutils-2.24/bfd/elfxx-mips.c
===================================================================
--- binutils-2.24.orig/bfd/elfxx-mips.c 2013-12-15 13:07:57.180399300 -0800
+++ binutils-2.24/bfd/elfxx-mips.c 2013-12-15 13:08:03.400399254 -0800
@@ -6404,6 +6404,9 @@
case E_MIPS_MACH_XLR:
return bfd_mach_mips_xlr;
+ case E_MIPS_MACH_XLP:
+ return bfd_mach_mips_xlp;
+
default:
switch (flags & EF_MIPS_ARCH)
{
@@ -11622,6 +11625,10 @@
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON2;
break;
+ case bfd_mach_mips_xlp:
+ val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_XLP;
+ break;
+
case bfd_mach_mipsisa32:
val = E_MIPS_ARCH_32;
break;
@@ -14202,6 +14209,7 @@
{ bfd_mach_mips_octeon2, bfd_mach_mips_octeonp },
{ bfd_mach_mips_octeonp, bfd_mach_mips_octeon },
{ bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 },
+ { bfd_mach_mips_xlp, bfd_mach_mipsisa64r2 },
/* MIPS64 extensions. */
{ bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
Index: binutils-2.24/binutils/readelf.c
===================================================================
--- binutils-2.24.orig/binutils/readelf.c 2013-12-15 13:07:57.180399300 -0800
+++ binutils-2.24/binutils/readelf.c 2013-12-15 13:08:03.403732587 -0800
@@ -2602,6 +2602,7 @@
case E_MIPS_MACH_OCTEON: strcat (buf, ", octeon"); break;
case E_MIPS_MACH_OCTEON2: strcat (buf, ", octeon2"); break;
case E_MIPS_MACH_XLR: strcat (buf, ", xlr"); break;
+ case E_MIPS_MACH_XLP: strcat (buf, ", xlp"); break;
case 0:
/* We simply ignore the field in this case to avoid confusion:
MIPS ELF does not specify EF_MIPS_MACH, it is a GNU
Index: binutils-2.24/gas/config/tc-mips.c
===================================================================
--- binutils-2.24.orig/gas/config/tc-mips.c 2013-12-15 13:07:57.180399300 -0800
+++ binutils-2.24/gas/config/tc-mips.c 2013-12-15 13:17:19.943728439 -0800
@@ -486,6 +486,7 @@
|| mips_opts.arch == CPU_RM7000 \
|| mips_opts.arch == CPU_VR5500 \
|| mips_opts.micromips \
+ || mips_opts.arch == CPU_XLP \
)
/* Whether the processor uses hardware interlocks to protect reads
@@ -515,6 +516,7 @@
&& mips_opts.isa != ISA_MIPS3) \
|| mips_opts.arch == CPU_R4300 \
|| mips_opts.micromips \
+ || mips_opts.arch == CPU_XLP \
)
/* Whether the processor uses hardware interlocks to protect reads
@@ -17794,7 +17796,7 @@
/* Broadcom XLP.
XLP is mostly like XLR, with the prominent exception that it is
MIPS64R2 rather than MIPS64. */
- { "xlp", 0, 0, ISA_MIPS64R2, CPU_XLR },
+ { "xlp", 0, 0, ISA_MIPS64R2, CPU_XLP },
/* End marker */
{ NULL, 0, 0, 0, 0 }
Index: binutils-2.24/gas/configure
===================================================================
--- binutils-2.24.orig/gas/configure 2013-12-15 13:08:01.127065936 -0800
+++ binutils-2.24/gas/configure 2013-12-15 13:08:03.407065920 -0800
@@ -12697,6 +12697,9 @@
mipsisa64r2 | mipsisa64r2el)
mips_cpu=mips64r2
;;
+ mipsisa64r2nlm | mipsisa64r2nlmel)
+ mips_cpu=xlp
+ ;;
mipstx39 | mipstx39el)
mips_cpu=r3900
;;
Index: binutils-2.24/gas/configure.tgt
===================================================================
--- binutils-2.24.orig/gas/configure.tgt 2013-12-15 13:08:00.783732605 -0800
+++ binutils-2.24/gas/configure.tgt 2013-12-15 13:08:03.407065920 -0800
@@ -325,7 +325,7 @@
fmt=elf em=freebsd ;;
mips-*-sysv4*MP* | mips-*-gnu*) fmt=elf em=tmips ;;
mips*-sde-elf* | mips*-mti-elf*) fmt=elf em=tmips ;;
- mips-*-elf* | mips-*-rtems*) fmt=elf ;;
+ mips-*-elf* | mips-*-rtems*) fmt=elf em=tmips ;;
mips-*-netbsd*) fmt=elf em=tmips ;;
mips-*-openbsd*) fmt=elf em=tmips ;;
Index: binutils-2.24/include/elf/mips.h
===================================================================
--- binutils-2.24.orig/include/elf/mips.h 2013-12-15 13:07:57.180399300 -0800
+++ binutils-2.24/include/elf/mips.h 2013-12-15 13:08:03.407065920 -0800
@@ -274,6 +274,7 @@
#define E_MIPS_MACH_SB1 0x008a0000
#define E_MIPS_MACH_OCTEON 0x008b0000
#define E_MIPS_MACH_XLR 0x008c0000
+#define E_MIPS_MACH_XLP 0x008e0000
#define E_MIPS_MACH_OCTEON2 0x008d0000
#define E_MIPS_MACH_5400 0x00910000
#define E_MIPS_MACH_5900 0x00920000
Index: binutils-2.24/include/opcode/mips.h
===================================================================
--- binutils-2.24.orig/include/opcode/mips.h 2013-12-15 13:07:57.180399300 -0800
+++ binutils-2.24/include/opcode/mips.h 2013-12-15 13:40:11.130384844 -0800
@@ -1092,8 +1092,10 @@
#define INSN_LOONGSON_2F 0x80000000
/* Loongson 3A. */
#define INSN_LOONGSON_3A 0x00000400
-/* RMI Xlr instruction */
-#define INSN_XLR 0x00000020
+/* Netlogic Xlr instruction */
+#define INSN_XLR 0x00000020
+/* Netlogic XlP instruction */
+#define INSN_XLP 0x00000040
/* DSP ASE */
#define ASE_DSP 0x00000001
@@ -1172,6 +1174,7 @@
#define CPU_OCTEONP 6601
#define CPU_OCTEON2 6502
#define CPU_XLR 887682 /* decimal 'XLR' */
+#define CPU_XLP 887680 /* decimal 'XLP' */
/* Return true if the given CPU is included in INSN_* mask MASK. */
@@ -1239,6 +1242,9 @@
case CPU_XLR:
return (mask & INSN_XLR) != 0;
+ case CPU_XLP:
+ return (mask & INSN_XLP) != 0;
+
default:
return FALSE;
}
Index: binutils-2.24/ld/configure.tgt
===================================================================
--- binutils-2.24.orig/ld/configure.tgt 2013-12-15 13:08:03.047065922 -0800
+++ binutils-2.24/ld/configure.tgt 2013-12-15 13:08:03.407065920 -0800
@@ -457,6 +457,8 @@
mips*-sde-elf* | mips*-mti-elf*)
targ_emul=elf32btsmip
targ_extra_emuls="elf32ltsmip elf32btsmipn32 elf64btsmip elf32ltsmipn32 elf64ltsmip" ;;
+mipsisa64*-*-elf*) targ_emul=elf32btsmip
+ targ_extra_emuls="elf32ltsmip elf64btsmip elf64ltsmip" ;;
mips64*el-ps2-elf*) targ_emul=elf32lr5900n32
targ_extra_emuls="elf32lr5900"
targ_extra_libpath=$targ_extra_emuls ;;
Index: binutils-2.24/opcodes/mips-dis.c
===================================================================
--- binutils-2.24.orig/opcodes/mips-dis.c 2013-12-15 13:07:57.180399300 -0800
+++ binutils-2.24/opcodes/mips-dis.c 2013-12-15 13:39:50.243718329 -0800
@@ -554,13 +554,11 @@
mips_cp0sel_names_xlr, ARRAY_SIZE (mips_cp0sel_names_xlr),
mips_hwr_names_numeric },
- /* XLP is mostly like XLR, with the prominent exception it is being
- MIPS64R2. */
- { "xlp", 1, bfd_mach_mips_xlr, CPU_XLR,
- ISA_MIPS64R2 | INSN_XLR, 0,
- mips_cp0_names_xlr,
- mips_cp0sel_names_xlr, ARRAY_SIZE (mips_cp0sel_names_xlr),
- mips_hwr_names_numeric },
+ { "xlp", 1, bfd_mach_mips_xlp, CPU_XLP,
+ ISA_MIPS64R2 | INSN_XLP, 0,
+ mips_cp0_names_mips3264r2,
+ mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2),
+ mips_hwr_names_mips3264r2 },
/* This entry, mips16, is here only for ISA/processor selection; do
not print its name. */
Index: binutils-2.24/opcodes/mips-opc.c
===================================================================
--- binutils-2.24.orig/opcodes/mips-opc.c 2013-12-15 13:07:57.180399300 -0800
+++ binutils-2.24/opcodes/mips-opc.c 2013-12-15 13:27:30.573724118 -0800
@@ -262,7 +262,8 @@
#define IOCT (INSN_OCTEON | INSN_OCTEONP | INSN_OCTEON2)
#define IOCTP (INSN_OCTEONP | INSN_OCTEON2)
#define IOCT2 INSN_OCTEON2
-#define XLR INSN_XLR
+#define XLR INSN_XLR
+#define XLP INSN_XLP
#define IVIRT ASE_VIRT
#define IVIRT64 ASE_VIRT64
@@ -881,6 +882,7 @@
{"cins", "t,r,+p,+S", 0x70000032, 0xfc00003f, WR_1|RD_2, 0, IOCT, 0, 0 },
{"clo", "U,s", 0x70000021, 0xfc0007ff, WR_1|RD_2, 0, I32|N55, 0, 0 },
{"clz", "U,s", 0x70000020, 0xfc0007ff, WR_1|RD_2, 0, I32|N55, 0, 0 },
+{"crc", "d,s,t", 0x7000001c, 0xfc0007ff, WR_1|RD_2|RD_3, 0, XLP, 0, 0 },
{"ctc0", "t,G", 0x40c00000, 0xffe007ff, RD_1|WR_CC|COD, 0, I1, 0, IOCT|IOCTP|IOCT2 },
{"ctc1", "t,G", 0x44c00000, 0xffe007ff, RD_1|WR_CC|COD|FP_S, 0, I1, 0, 0 },
{"ctc1", "t,S", 0x44c00000, 0xffe007ff, RD_1|WR_CC|COD|FP_S, 0, I1, 0, 0 },
@@ -913,10 +915,11 @@
{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_1|RD_2, 0, I3, 0, 0 },
{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 },
{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, 0, I3, 0, 0 },
-{"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_1|RD_2|RD_3|WR_C0|RD_C0, 0, XLR, 0, 0 },
+{"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_1|RD_2|RD_3|WR_C0|RD_C0, 0, XLR|XLP, 0, 0 },
{"dbreak", "", 0x7000003f, 0xffffffff, 0, 0, N5, 0, 0 },
{"dclo", "U,s", 0x70000025, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, 0 },
{"dclz", "U,s", 0x70000024, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, 0 },
+{"dcrc", "d,s,t", 0x7000001d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, XLP, 0, 0 },
/* dctr and dctw are used on the r5000. */
{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_2, 0, I3, 0, 0 },
{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_2, 0, I3, 0, 0 },
@@ -980,6 +983,7 @@
{"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, WR_1|RD_C0|LCD, 0, I64, 0, 0 },
{"dmfgc0", "t,G", 0x40600100, 0xffe007ff, WR_1|RD_C0|LCD, 0, 0, IVIRT64, 0 },
{"dmfgc0", "t,G,H", 0x40600100, 0xffe007f8, WR_1|RD_C0|LCD, 0, 0, IVIRT64, 0 },
+{"dmfur", "t,d", 0x7000001e, 0xffe007ff, WR_1, 0, XLP, 0, 0 },
{"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
{"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1|WR_C0|WR_CC|COD, 0, I3, 0, EE },
@@ -994,6 +998,8 @@
/* dmtc2 is at the bottom of the table. */
/* dmfc3 is at the bottom of the table. */
/* dmtc3 is at the bottom of the table. */
+{"dmtur", "t,d", 0x7000001f, 0xffe007ff, RD_1, 0, XLP, 0, 0 },
+{"dmul", "d,s,t", 0x70000006, 0xfc0007ff, WR_1|RD_2|RD_3, 0, XLP, 0, 0 },
{"dmul", "d,v,t", 0x70000003, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, IOCT, 0, 0 },
{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, 0, I3, 0, M32 },
{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, 0, I3, 0, M32 },
@@ -1134,9 +1140,9 @@
/* The macro has to be first to handle o32 correctly. */
{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, 0, I1, 0, 0 },
{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_1|RD_3, 0, I3, 0, 0 },
-{"ldaddw", "t,b", 0x70000010, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
-{"ldaddwu", "t,b", 0x70000011, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
-{"ldaddd", "t,b", 0x70000012, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
+{"ldaddw", "t,b", 0x70000010, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR|XLP, 0, 0 },
+{"ldaddwu", "t,b", 0x70000011, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR|XLP, 0, 0 },
+{"ldaddd", "t,b", 0x70000012, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR|XLP, 0, 0 },
{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, WR_1|RD_3|CLD|FP_D, 0, I2, 0, SF },
{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, WR_1|RD_3|CLD|FP_D, 0, I2, 0, SF },
{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I2, 0, SF },
@@ -1288,7 +1294,7 @@
{"mflo", "d,9", 0x00000012, 0xff9f07ff, WR_1|RD_LO, 0, 0, D32, 0 },
{"mflo1", "d", 0x70000012, 0xffff07ff, WR_1|RD_LO, 0, EE, 0, 0 },
{"mflhxu", "d", 0x00000052, 0xffff07ff, WR_1|MOD_HILO, 0, 0, SMT, 0 },
-{"mfcr", "t,s", 0x70000018, 0xfc00ffff, WR_1, 0, XLR, 0, 0 },
+{"mfcr", "t,s", 0x70000018, 0xfc00ffff, WR_1, 0, XLR|XLP, 0, 0 },
{"mfsa", "d", 0x00000028, 0xffff07ff, WR_1, 0, EE, 0, 0 },
{"min.ob", "X,Y,Q", 0x78000006, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
{"min.ob", "D,S,Q", 0x48000006, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
@@ -1332,10 +1338,13 @@
/* move is at the top of the table. */
{"msgn.qh", "X,Y,Q", 0x78200000, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
{"msgsnd", "t", 0, (int) M_MSGSND, INSN_MACRO, 0, XLR, 0, 0 },
+{"msgsnds", "d,t", 0x4a000001, 0xffe007ff, WR_1|RD_2|RD_C0|WR_C0, 0, XLP, 0, 0 },
{"msgld", "", 0, (int) M_MSGLD, INSN_MACRO, 0, XLR, 0, 0 },
{"msgld", "t", 0, (int) M_MSGLD_T, INSN_MACRO, 0, XLR, 0, 0 },
-{"msgwait", "", 0, (int) M_MSGWAIT, INSN_MACRO, 0, XLR, 0, 0 },
-{"msgwait", "t", 0, (int) M_MSGWAIT_T,INSN_MACRO, 0, XLR, 0, 0 },
+{"msglds", "d,t", 0x4a000002, 0xffe007ff, WR_1|RD_2|RD_C0|WR_C0, 0, XLP, 0, 0 },
+{"msgwait", "", 0, (int) M_MSGWAIT, INSN_MACRO, 0, XLR|XLP, 0, 0 },
+{"msgwait", "t", 0, (int) M_MSGWAIT_T,INSN_MACRO, 0, XLR|XLP, 0, 0 },
+{"msgsync", "", 0x4a000004, 0xffffffff,0, 0, XLP, 0, 0 },
{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I4_33, 0, 0 },
{"msub.d", "D,S,T", 0x46200019, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
{"msub.d", "D,S,T", 0x72200019, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F, 0, 0 },
@@ -1381,7 +1390,7 @@
{"mtlo", "s,7", 0x00000013, 0xfc1fe7ff, RD_1|WR_LO, 0, 0, D32, 0 },
{"mtlo1", "s", 0x70000013, 0xfc1fffff, RD_1|WR_LO, 0, EE, 0, 0 },
{"mtlhx", "s", 0x00000053, 0xfc1fffff, RD_1|MOD_HILO, 0, 0, SMT, 0 },
-{"mtcr", "t,s", 0x70000019, 0xfc00ffff, RD_1, 0, XLR, 0, 0 },
+{"mtcr", "t,s", 0x70000019, 0xfc00ffff, RD_1, 0, XLR|XLP, 0, 0 },
{"mtm0", "s", 0x70000008, 0xfc1fffff, RD_1, 0, IOCT, 0, 0 },
{"mtm1", "s", 0x7000000c, 0xfc1fffff, RD_1, 0, IOCT, 0, 0 },
{"mtm2", "s", 0x7000000d, 0xfc1fffff, RD_1, 0, IOCT, 0, 0 },
@@ -1802,9 +1811,9 @@
{"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, RD_1|RD_2|RD_3|SM|FP_D, 0, I5_33|N55, 0, 0},
{"sw", "t,o(b)", 0xac000000, 0xfc000000, RD_1|RD_3|SM, 0, I1, 0, 0 },
{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, 0, I1, 0, 0 },
-{"swapw", "t,b", 0x70000014, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
-{"swapwu", "t,b", 0x70000015, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
-{"swapd", "t,b", 0x70000016, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
+{"swapw", "t,b", 0x70000014, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR|XLP, 0, 0 },
+{"swapwu", "t,b", 0x70000015, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR|XLP, 0, 0 },
+{"swapd", "t,b", 0x70000016, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR|XLP, 0, 0 },
{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, RD_3|RD_C0|SM, 0, I1, 0, IOCT|IOCTP|IOCT2 },
{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2 },
{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, RD_1|RD_3|SM|FP_S, 0, I1, 0, 0 },

View File

@ -0,0 +1,36 @@
This patch fixes the problem where libiberty is not installed in spite of
asking it via --enable-install-libiberty, the problem is that target_header_dir
is reset explicitly which means libiberty.a will never get installed
also check
https://sourceware.org/bugzilla/show_bug.cgi?id=15815
Upstream-Status: Pending
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Index: binutils-2.24/libiberty/configure
===================================================================
--- binutils-2.24.orig/libiberty/configure 2013-12-16 00:08:09.280103157 -0800
+++ binutils-2.24/libiberty/configure 2013-12-16 00:08:29.753436339 -0800
@@ -5507,7 +5507,6 @@
setobjs=
CHECK=
-target_header_dir=
if test -n "${with_target_subdir}"; then
# We are being configured as a target library. AC_REPLACE_FUNCS
Index: binutils-2.24/libiberty/configure.ac
===================================================================
--- binutils-2.24.orig/libiberty/configure.ac 2013-11-08 02:13:49.000000000 -0800
+++ binutils-2.24/libiberty/configure.ac 2013-12-16 00:07:45.133436672 -0800
@@ -405,7 +405,6 @@
setobjs=
CHECK=
-target_header_dir=
if test -n "${with_target_subdir}"; then
# We are being configured as a target library. AC_REPLACE_FUNCS

View File

@ -5,33 +5,38 @@ Upstream-Status: Inappropriate [ OE configuration Specific]
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Index: binutils-2.22/bfd/config.bfd
Index: binutils-2.24/bfd/config.bfd
===================================================================
--- binutils-2.22.orig/bfd/config.bfd 2011-07-28 15:35:13.000000000 -0700
+++ binutils-2.22/bfd/config.bfd 2012-04-23 21:07:44.151578222 -0700
@@ -970,13 +970,13 @@
--- binutils-2.24.orig/bfd/config.bfd 2013-11-04 07:33:37.000000000 -0800
+++ binutils-2.24/bfd/config.bfd 2013-12-15 11:54:57.113765374 -0800
@@ -1052,14 +1052,14 @@
targ_defvec=bfd_elf32_bigmips_vec
targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec ecoff_big_vec ecoff_little_vec"
;;
#ifdef BFD64
mips64*el-*-linux*)
- mips64*el-*-linux*)
- targ_defvec=bfd_elf32_ntradlittlemips_vec
- targ_selvecs="bfd_elf32_ntradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradlittlemips_vec bfd_elf64_tradbigmips_vec"
+ targ_defvec=bfd_elf64_tradlittlemips_vec
+ targ_selvecs="bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradbigmips_vec"
want64=true
;;
mips64*-*-linux*)
- ;;
- mips64*-*-linux*)
- targ_defvec=bfd_elf32_ntradbigmips_vec
- targ_selvecs="bfd_elf32_ntradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
- ;;
+ mips64*el-*-linux*)
+ targ_defvec=bfd_elf64_tradlittlemips_vec
+ targ_selvecs="bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradbigmips_vec"
+ ;;
+ mips64*-*-linux*)
+ targ_defvec=bfd_elf64_tradbigmips_vec
+ targ_selvecs="bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf64_tradlittlemips_vec"
want64=true
;;
#endif
Index: binutils-2.22/ld/configure.tgt
+ ;;
mips*el-*-linux*)
targ_defvec=bfd_elf32_tradlittlemips_vec
targ_selvecs="bfd_elf32_tradbigmips_vec ecoff_little_vec ecoff_big_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec"
Index: binutils-2.24/ld/configure.tgt
===================================================================
--- binutils-2.22.orig/ld/configure.tgt 2011-11-21 01:29:37.000000000 -0800
+++ binutils-2.22/ld/configure.tgt 2012-04-23 21:05:34.183571931 -0700
@@ -395,11 +395,11 @@
--- binutils-2.24.orig/ld/configure.tgt 2013-11-26 03:37:33.000000000 -0800
+++ binutils-2.24/ld/configure.tgt 2013-12-15 11:50:52.273766155 -0800
@@ -471,11 +471,11 @@
mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
targ_extra_emuls="elf32elmipvxworks" ;;
mips*-*-windiss) targ_emul=elf32mipswindiss ;;

View File

@ -5,10 +5,14 @@ DEPENDS += "flex bison zlib"
EXTRA_OECONF += "--with-sysroot=/ \
--enable-install-libbfd \
--enable-install-libiberty \
--enable-shared \
"
EXTRA_OECONF_class-native = "--enable-targets=all --enable-64-bit-bfd --enable-install-libbfd"
EXTRA_OECONF_class-native = "--enable-targets=all \
--enable-64-bit-bfd \
--enable-install-libiberty \
--enable-install-libbfd"
do_install_class-native () {
autotools_do_install