157 lines
4.4 KiB
Diff
157 lines
4.4 KiB
Diff
# This patch contains various fixes for the thumb code handling in GCC 3.4.4
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#
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# Most of these are minor fixes to code which is either missing (Linux thumb
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# div0, thumb clear instruction cache) or uses the wrong return mechanism
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# (libffi)
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#
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# There is also a significant design problem with the _call_via_rx code -
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# it cannot be in a shared library because a call via PLT simply won't
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# work (for _call_via_ip) and is very inefficient anyway.
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#
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# This is fixed in uclibc simply by incorporating the code into crti.S
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# (an extra 30 bytes for the 15 functions) even though not all link units
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# require all the code - there is so little of it. That doesn't work with
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# the crti.asm here because it is linked with libgcc.a which already defines
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# these symbols
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#
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--- gcc-3.4.4/gcc/config/arm/t-linux.orig 2005-08-09 08:55:02.181797492 -0700
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+++ gcc-3.4.4/gcc/config/arm/t-linux 2005-08-09 08:58:22.766419486 -0700
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@@ -7,6 +7,7 @@
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LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
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_negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
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_truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
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+ _call_via_rX \
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_fixsfsi _fixunssfsi
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# MULTILIB_OPTIONS = mhard-float/msoft-float
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--- gcc-3.4.4/.pc/gcc34-thumb-support.patch/gcc/config/arm/lib1funcs.asm 2004-01-15 08:56:34.000000000 -0800
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+++ gcc-3.4.4/gcc/config/arm/lib1funcs.asm 2005-09-21 21:32:03.376927755 -0700
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@@ -811,13 +811,18 @@
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/* Constants taken from <asm/unistd.h> and <asm/signal.h> */
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#define SIGFPE 8
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+#if !defined __thumb__
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#define __NR_SYSCALL_BASE 0x900000
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+#else
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+#define __NR_SYSCALL_BASE 0
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+#endif
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#define __NR_getpid (__NR_SYSCALL_BASE+ 20)
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#define __NR_kill (__NR_SYSCALL_BASE+ 37)
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.code 32
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FUNC_START div0
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+#if ! defined __thumb__
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stmfd sp!, {r1, lr}
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swi __NR_getpid
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cmn r0, #1000
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@@ -825,6 +830,28 @@
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mov r1, #SIGFPE
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swi __NR_kill
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RETLDM r1
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+#else
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+ push {r1, r7, lr}
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+ mov r7, #__NR_getpid
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+ swi 0
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+ @ above the compare is with -1000, but the standard syscall
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+ @ macro checks for -1..-125
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+ add r0, #125
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+ bcs 90f
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+ sub r0, #125
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+ mov r1, #SIGFPE
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+ mov r7, #__NR_kill
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+ swi 0
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+90:
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+#if __ARM_ARCH__ > 4
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+ pop {r1, r7, pc}
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+#else
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+ @ on 4T that won't work
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+ pop {r1, r7}
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+ pop {r3}
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+ bx r3
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+#endif
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+#endif
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FUNC_END div0
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@@ -845,14 +872,14 @@
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code here switches to the correct mode before executing the function. */
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.text
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- .align 0
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+ .align 1
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.force_thumb
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.macro call_via register
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THUMB_FUNC_START _call_via_\register
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+ .hidden SYM (_call_via_\register)
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bx \register
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- nop
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SIZE (_call_via_\register)
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.endm
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@@ -903,6 +930,7 @@
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.code 16
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THUMB_FUNC_START _interwork_call_via_\register
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+ .hidden SYM (_interwork_call_via_\register)
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bx pc
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nop
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--- gcc-3.4.4/.pc/gcc34-thumb-support.patch/gcc/config/arm/linux-gas.h 2003-06-19 14:47:06.000000000 -0700
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+++ gcc-3.4.4/gcc/config/arm/linux-gas.h 2005-09-20 16:09:55.027862200 -0700
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@@ -56,6 +56,7 @@
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/* Clear the instruction cache from `beg' to `end'. This makes an
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inline system call to SYS_cacheflush. */
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+#if !defined(__thumb__)
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#define CLEAR_INSN_CACHE(BEG, END) \
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{ \
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register unsigned long _beg __asm ("a1") = (unsigned long) (BEG); \
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@@ -65,3 +66,18 @@
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: "=r" (_beg) \
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: "0" (_beg), "r" (_end), "r" (_flg)); \
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}
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+#else
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+#define CLEAR_INSN_CACHE(BEG, END) \
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+{ \
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+ register unsigned long _beg __asm ("a1") = (unsigned long) (BEG); \
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+ register unsigned long _end __asm ("a2") = (unsigned long) (END); \
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+ register unsigned long _flg __asm ("a3") = 0; \
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+ register unsigned long _swi __asm ("a4") = 0xf0002; \
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+ __asm __volatile ("push {r7}\n" \
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+ " mov r7,a4\n" \
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+ " swi 0 @ sys_cacheflush\n" \
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+ " pop {r7}\n" \
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+ : "=r" (_beg) \
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+ : "0" (_beg), "r" (_end), "r" (_flg), "r" (_swi)); \
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+}
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+#endif
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--- gcc-3.4.4/.pc/gcc34-thumb-support.patch/libffi/src/arm/sysv.S 2003-10-21 12:01:55.000000000 -0700
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+++ gcc-3.4.4/libffi/src/arm/sysv.S 2005-09-20 16:09:55.027862200 -0700
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@@ -41,6 +41,14 @@
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#define ENTRY(x) .globl CNAME(x); .type CNAME(x),%function; CNAME(x):
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#endif
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+/* Get the correct return instruction */
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+#if defined(__ARM_ARCH_4T__) || defined(__ARM_ARCH_5__) \
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+ || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__)
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+#define RET bx r
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+#else
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+#define RET mov pc,
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+#endif
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+
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.text
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# a1: ffi_prep_args
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@@ -66,7 +74,7 @@
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# And call
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mov lr, pc
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- mov pc, ip
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+ RET ip
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# move first 4 parameters in registers
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ldr a1, [sp, #0]
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