855 lines
24 KiB
Diff
855 lines
24 KiB
Diff
These are Paul Brook's patches to QEMU-0.8.2 to enable the running of single
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ARM binaries under QEMU's user-emulation mode. Without them, QEMU-0.8.1
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immediately dies saying:
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Error: f0005
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qemu: uncaught target signal 6 (Aborted) - exiting
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while qemu-0.8.2 dies saying:
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qemu: Unsupported syscall: 983045
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cannot set up thread-local storage: unknown error
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This file is a rediffing of the patches visible at
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https://nowt.dyndns.org/patch.qemu_nptl on 27 Sept 2006
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which "patch" fails to apply automatically.
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See also http://lists.gnu.org/archive/html/qemu-devel/2006-09/msg00194.html
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Martin Guy, 27 Sept 2006
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---
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configure | 25 ++++++
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exec-all.h | 165 ------------------------------------------
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linux-user/arm/syscall.h | 4 -
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linux-user/main.c | 94 +++++++++++++++++++++---
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linux-user/qemu.h | 3
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linux-user/syscall.c | 91 ++++++++++++++++++++++-
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qemu_spinlock.h | 181 +++++++++++++++++++++++++++++++++++++++++++++++
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target-arm/cpu.h | 10 ++
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target-arm/op.c | 6 +
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target-arm/translate.c | 9 ++
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10 files changed, 405 insertions(+), 183 deletions(-)
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Index: qemu/configure
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===================================================================
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--- qemu.orig/configure 2008-04-09 23:02:37.000000000 +0100
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+++ qemu/configure 2008-04-09 23:06:36.000000000 +0100
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@@ -109,6 +109,7 @@
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build_docs="no"
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uname_release=""
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curses="yes"
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+nptl="yes"
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# OS specific
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targetos=`uname -s`
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@@ -334,6 +335,8 @@
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;;
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*) echo "ERROR: unknown option $opt"; show_help="yes"
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;;
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+ --disable-nptl) nptl="no"
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+ ;;
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esac
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done
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@@ -429,6 +432,7 @@
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echo " --disable-linux-user disable all linux usermode emulation targets"
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echo " --enable-darwin-user enable all darwin usermode emulation targets"
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echo " --disable-darwin-user disable all darwin usermode emulation targets"
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+echo " --disable-nptl disable usermode NPTL guest support"
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echo " --fmod-lib path to FMOD library"
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echo " --fmod-inc path to FMOD includes"
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echo " --enable-uname-release=R Return R for uname -r in usermode emulation"
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@@ -595,6 +599,23 @@
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}
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EOF
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+# check NPTL support
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+cat > $TMPC <<EOF
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+#include <sched.h>
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+void foo()
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+{
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+#ifndef CLONE_SETTLS
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+#error bork
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+#endif
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+}
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+EOF
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+
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+if $cc -c -o $TMPO $TMPC 2> /dev/null ; then
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+ :
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+else
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+ nptl="no"
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+fi
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+
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##########################################
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# SDL probe
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@@ -778,6 +799,7 @@
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echo "Documentation $build_docs"
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[ ! -z "$uname_release" ] && \
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echo "uname -r $uname_release"
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+echo "NPTL support $nptl"
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if test $sdl_too_old = "yes"; then
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echo "-> Your SDL version is too old - please upgrade to have SDL support"
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@@ -1115,6 +1137,9 @@
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echo "TARGET_ARCH=arm" >> $config_mak
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echo "#define TARGET_ARCH \"arm\"" >> $config_h
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echo "#define TARGET_ARM 1" >> $config_h
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+ if test "$nptl" = "yes" ; then
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+ echo "#define USE_NPTL 1" >> $config_h
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+ fi
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bflt="yes"
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elif test "$target_cpu" = "sparc" ; then
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echo "TARGET_ARCH=sparc" >> $config_mak
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Index: qemu/exec-all.h
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===================================================================
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--- qemu.orig/exec-all.h 2008-04-09 22:39:38.000000000 +0100
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+++ qemu/exec-all.h 2008-04-09 23:05:55.000000000 +0100
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@@ -297,170 +297,7 @@
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extern CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4];
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extern void *io_mem_opaque[IO_MEM_NB_ENTRIES];
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-#if defined(__powerpc__)
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-static inline int testandset (int *p)
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-{
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- int ret;
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- __asm__ __volatile__ (
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- "0: lwarx %0,0,%1\n"
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- " xor. %0,%3,%0\n"
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- " bne 1f\n"
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- " stwcx. %2,0,%1\n"
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- " bne- 0b\n"
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- "1: "
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- : "=&r" (ret)
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- : "r" (p), "r" (1), "r" (0)
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- : "cr0", "memory");
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- return ret;
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-}
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-#elif defined(__i386__)
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-static inline int testandset (int *p)
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-{
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- long int readval = 0;
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-
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- __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
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- : "+m" (*p), "+a" (readval)
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- : "r" (1)
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- : "cc");
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- return readval;
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-}
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-#elif defined(__x86_64__)
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-static inline int testandset (int *p)
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-{
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- long int readval = 0;
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-
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- __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
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- : "+m" (*p), "+a" (readval)
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- : "r" (1)
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- : "cc");
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- return readval;
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-}
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-#elif defined(__s390__)
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-static inline int testandset (int *p)
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-{
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- int ret;
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-
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- __asm__ __volatile__ ("0: cs %0,%1,0(%2)\n"
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- " jl 0b"
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- : "=&d" (ret)
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- : "r" (1), "a" (p), "0" (*p)
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- : "cc", "memory" );
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- return ret;
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-}
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-#elif defined(__alpha__)
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-static inline int testandset (int *p)
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-{
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- int ret;
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- unsigned long one;
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-
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- __asm__ __volatile__ ("0: mov 1,%2\n"
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- " ldl_l %0,%1\n"
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- " stl_c %2,%1\n"
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- " beq %2,1f\n"
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- ".subsection 2\n"
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- "1: br 0b\n"
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- ".previous"
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- : "=r" (ret), "=m" (*p), "=r" (one)
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- : "m" (*p));
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- return ret;
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-}
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-#elif defined(__sparc__)
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-static inline int testandset (int *p)
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-{
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- int ret;
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-
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- __asm__ __volatile__("ldstub [%1], %0"
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- : "=r" (ret)
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- : "r" (p)
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- : "memory");
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-
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- return (ret ? 1 : 0);
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-}
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-#elif defined(__arm__)
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-static inline int testandset (int *spinlock)
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-{
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- register unsigned int ret;
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- __asm__ __volatile__("swp %0, %1, [%2]"
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- : "=r"(ret)
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- : "0"(1), "r"(spinlock));
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-
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- return ret;
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-}
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-#elif defined(__mc68000)
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-static inline int testandset (int *p)
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-{
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- char ret;
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- __asm__ __volatile__("tas %1; sne %0"
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- : "=r" (ret)
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- : "m" (p)
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- : "cc","memory");
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- return ret;
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-}
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-#elif defined(__ia64)
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-
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-#include <ia64intrin.h>
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-
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-static inline int testandset (int *p)
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-{
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- return __sync_lock_test_and_set (p, 1);
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-}
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-#elif defined(__mips__)
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-static inline int testandset (int *p)
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-{
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- int ret;
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-
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- __asm__ __volatile__ (
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- " .set push \n"
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- " .set noat \n"
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- " .set mips2 \n"
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- "1: li $1, 1 \n"
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- " ll %0, %1 \n"
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- " sc $1, %1 \n"
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- " beqz $1, 1b \n"
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- " .set pop "
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- : "=r" (ret), "+R" (*p)
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- :
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- : "memory");
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-
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- return ret;
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-}
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-#else
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-#error unimplemented CPU support
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-#endif
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-
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-typedef int spinlock_t;
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-
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-#define SPIN_LOCK_UNLOCKED 0
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-
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-#if defined(CONFIG_USER_ONLY)
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-static inline void spin_lock(spinlock_t *lock)
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-{
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- while (testandset(lock));
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-}
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-
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-static inline void spin_unlock(spinlock_t *lock)
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-{
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- *lock = 0;
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-}
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-
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-static inline int spin_trylock(spinlock_t *lock)
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-{
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- return !testandset(lock);
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-}
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-#else
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-static inline void spin_lock(spinlock_t *lock)
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-{
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-}
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-
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-static inline void spin_unlock(spinlock_t *lock)
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-{
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-}
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-
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-static inline int spin_trylock(spinlock_t *lock)
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-{
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- return 1;
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-}
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-#endif
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+#include "qemu_spinlock.h"
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extern spinlock_t tb_lock;
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Index: qemu/linux-user/arm/syscall.h
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===================================================================
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--- qemu.orig/linux-user/arm/syscall.h 2007-11-27 12:09:33.000000000 +0000
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+++ qemu/linux-user/arm/syscall.h 2008-04-09 23:05:55.000000000 +0100
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@@ -28,7 +28,9 @@
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#define ARM_SYSCALL_BASE 0x900000
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#define ARM_THUMB_SYSCALL 0
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-#define ARM_NR_cacheflush (ARM_SYSCALL_BASE + 0xf0000 + 2)
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+#define ARM_NR_BASE 0xf0000
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+#define ARM_NR_cacheflush (ARM_NR_BASE + 2)
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+#define ARM_NR_set_tls (ARM_NR_BASE + 5)
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#define ARM_NR_semihosting 0x123456
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#define ARM_NR_thumb_semihosting 0xAB
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Index: qemu/linux-user/main.c
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===================================================================
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--- qemu.orig/linux-user/main.c 2008-04-09 23:02:37.000000000 +0100
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+++ qemu/linux-user/main.c 2008-04-09 23:05:55.000000000 +0100
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@@ -364,6 +364,50 @@
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}
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}
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+/* Handle a jump to the kernel code page. */
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+static int
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+do_kernel_trap(CPUARMState *env)
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+{
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+ uint32_t addr;
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+ uint32_t *ptr;
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+ uint32_t cpsr;
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+
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+ switch (env->regs[15]) {
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+ case 0xffff0fc0: /* __kernel_cmpxchg */
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+ /* XXX: This only works between threads, not between processes.
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+ Use native atomic operations. */
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+ /* ??? This probably breaks horribly if the access segfaults. */
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+ cpu_lock();
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+ ptr = (uint32_t *)env->regs[2];
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+ cpsr = cpsr_read(env);
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+ if (*ptr == env->regs[0]) {
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+ *ptr = env->regs[1];
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+ env->regs[0] = 0;
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+ cpsr |= CPSR_C;
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+ } else {
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+ env->regs[0] = -1;
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+ cpsr &= ~CPSR_C;
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+ }
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+ cpsr_write(env, cpsr, CPSR_C);
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+ cpu_unlock();
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+ break;
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+ case 0xffff0fe0: /* __kernel_get_tls */
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+ env->regs[0] = env->cp15.c13_tls;
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+ break;
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+ default:
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+ return 1;
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+ }
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+ /* Jump back to the caller. */
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+ addr = env->regs[14];
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+ if (addr & 1) {
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+ env->thumb = 1;
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+ addr &= ~1;
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+ }
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+ env->regs[15] = addr;
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+
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+ return 0;
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+}
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+
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void cpu_loop(CPUARMState *env)
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{
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int trapnr;
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@@ -474,10 +518,8 @@
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}
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}
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- if (n == ARM_NR_cacheflush) {
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- arm_cache_flush(env->regs[0], env->regs[1]);
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- } else if (n == ARM_NR_semihosting
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- || n == ARM_NR_thumb_semihosting) {
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+ if (n == ARM_NR_semihosting
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+ || n == ARM_NR_thumb_semihosting) {
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env->regs[0] = do_arm_semihosting (env);
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} else if (n == 0 || n >= ARM_SYSCALL_BASE
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|| (env->thumb && n == ARM_THUMB_SYSCALL)) {
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@@ -488,14 +530,34 @@
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n -= ARM_SYSCALL_BASE;
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env->eabi = 0;
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}
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- env->regs[0] = do_syscall(env,
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- n,
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- env->regs[0],
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- env->regs[1],
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- env->regs[2],
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- env->regs[3],
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- env->regs[4],
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- env->regs[5]);
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+ if ( n > ARM_NR_BASE) {
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+ switch (n)
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+ {
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+ case ARM_NR_cacheflush:
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+ arm_cache_flush(env->regs[0], env->regs[1]);
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+ break;
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+#ifdef USE_NPTL
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+ case ARM_NR_set_tls:
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+ cpu_set_tls(env, env->regs[0]);
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+ env->regs[0] = 0;
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+ break;
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+#endif
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+ default:
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+ printf ("Error: Bad syscall: %x\n", n);
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+ goto error;
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+ }
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+ }
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+ else
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+ {
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+ env->regs[0] = do_syscall(env,
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+ n,
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+ env->regs[0],
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+ env->regs[1],
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+ env->regs[2],
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+ env->regs[3],
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+ env->regs[4],
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+ env->regs[5]);
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+ }
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} else {
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goto error;
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}
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@@ -534,6 +596,10 @@
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}
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}
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break;
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+ case EXCP_KERNEL_TRAP:
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+ if (do_kernel_trap(env))
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+ goto error;
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+ break;
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default:
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error:
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fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
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@@ -2402,6 +2468,10 @@
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ts->heap_base = info->brk;
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/* This will be filled in on the first SYS_HEAPINFO call. */
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ts->heap_limit = 0;
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+ /* Register the magic kernel code page. The cpu will generate a
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+ special exception when it tries to execute code here. We can't
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+ put real code here because it may be in use by the host kernel. */
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+ page_set_flags(0xffff0000, 0xffff0fff, 0);
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#endif
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if (gdbstub_port) {
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Index: qemu/linux-user/qemu.h
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===================================================================
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--- qemu.orig/linux-user/qemu.h 2008-01-02 15:48:21.000000000 +0000
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+++ qemu/linux-user/qemu.h 2008-04-09 23:05:55.000000000 +0100
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@@ -107,6 +107,9 @@
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uint32_t heap_base;
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uint32_t heap_limit;
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#endif
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+#ifdef USE_NPTL
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+ uint32_t *child_tidptr;
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+#endif
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int used; /* non zero if used */
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struct image_info *info;
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uint8_t stack[0];
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Index: qemu/linux-user/syscall.c
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===================================================================
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--- qemu.orig/linux-user/syscall.c 2008-04-09 23:02:38.000000000 +0100
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+++ qemu/linux-user/syscall.c 2008-04-09 23:05:55.000000000 +0100
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@@ -71,9 +71,18 @@
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#include <linux/kd.h>
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#include "qemu.h"
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+#include "qemu_spinlock.h"
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//#define DEBUG
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+#ifdef USE_NPTL
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+#define CLONE_NPTL_FLAGS2 (CLONE_SETTLS | \
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+ CLONE_PARENT_SETTID | CLONE_CHILD_SETTID | CLONE_CHILD_CLEARTID)
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+#else
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+/* XXX: Hardcode the above values. */
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+#define CLONE_NPTL_FLAGS2 0
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+#endif
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+
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#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC) \
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|| defined(TARGET_M68K) || defined(TARGET_SH4) || defined(TARGET_CRIS)
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/* 16 bit uid wrappers emulation */
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@@ -2702,9 +2711,19 @@
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thread/process */
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#define NEW_STACK_SIZE 8192
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+#ifdef USE_NPTL
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+static spinlock_t nptl_lock = SPIN_LOCK_UNLOCKED;
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+#endif
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+
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static int clone_func(void *arg)
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{
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CPUState *env = arg;
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+#ifdef HAVE_NPTL
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+ /* Wait until the parent has finshed initializing the tls state. */
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+ while (!spin_trylock(&nptl_lock))
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+ usleep(1);
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+ spin_unlock(&nptl_lock);
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+#endif
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cpu_loop(env);
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/* never exits */
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return 0;
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@@ -2712,13 +2731,22 @@
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/* do_fork() Must return host values and target errnos (unlike most
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do_*() functions). */
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-int do_fork(CPUState *env, unsigned int flags, abi_ulong newsp)
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+int do_fork(CPUState *env, unsigned int flags, unsigned long newsp,
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+ uint32_t *parent_tidptr, void *newtls,
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+ uint32_t *child_tidptr)
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{
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int ret;
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TaskState *ts;
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uint8_t *new_stack;
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CPUState *new_env;
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+#ifdef USE_NPTL
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+ unsigned int nptl_flags;
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+
|
|
+ if (flags & CLONE_PARENT_SETTID)
|
|
+ *parent_tidptr = gettid();
|
|
+#endif
|
|
+
|
|
if (flags & CLONE_VM) {
|
|
ts = malloc(sizeof(TaskState) + NEW_STACK_SIZE);
|
|
memset(ts, 0, sizeof(TaskState));
|
|
@@ -2784,16 +2812,67 @@
|
|
#error unsupported target CPU
|
|
#endif
|
|
new_env->opaque = ts;
|
|
+#ifdef USE_NPTL
|
|
+ nptl_flags = flags;
|
|
+ flags &= ~CLONE_NPTL_FLAGS2;
|
|
+
|
|
+ if (nptl_flags & CLONE_CHILD_CLEARTID) {
|
|
+ ts->child_tidptr = child_tidptr;
|
|
+ }
|
|
+
|
|
+ if (nptl_flags & CLONE_SETTLS)
|
|
+ cpu_set_tls (new_env, newtls);
|
|
+
|
|
+ /* Grab the global cpu lock so that the thread setup appears
|
|
+ atomic. */
|
|
+ if (nptl_flags & CLONE_CHILD_SETTID)
|
|
+ spin_lock(&nptl_lock);
|
|
+
|
|
+#else
|
|
+ if (flags & CLONE_NPTL_FLAGS2)
|
|
+ return -EINVAL;
|
|
+#endif
|
|
+
|
|
+ if (CLONE_VFORK & flags)
|
|
+ flags ^= CLONE_VM;
|
|
#ifdef __ia64__
|
|
ret = __clone2(clone_func, new_stack + NEW_STACK_SIZE, flags, new_env);
|
|
#else
|
|
ret = clone(clone_func, new_stack + NEW_STACK_SIZE, flags, new_env);
|
|
#endif
|
|
+#ifdef USE_NPTL
|
|
+ if (ret != -1) {
|
|
+ if (nptl_flags & CLONE_CHILD_SETTID)
|
|
+ *child_tidptr = ret;
|
|
+ }
|
|
+
|
|
+ /* Allow the child to continue. */
|
|
+ if (nptl_flags & CLONE_CHILD_SETTID)
|
|
+ spin_unlock(&nptl_lock);
|
|
+#endif
|
|
} else {
|
|
/* if no CLONE_VM, we consider it is a fork */
|
|
- if ((flags & ~CSIGNAL) != 0)
|
|
+ if ((flags & ~(CSIGNAL | CLONE_NPTL_FLAGS2)) != 0)
|
|
return -EINVAL;
|
|
ret = fork();
|
|
+#ifdef USE_NPTL
|
|
+ /* There is a race condition here. The parent process could
|
|
+ theoretically read the TID in the child process before the child
|
|
+ tid is set. This would require using either ptrace
|
|
+ (not implemented) or having *_tidptr to point at a shared memory
|
|
+ mapping. We can't repeat the spinlock hack used above because
|
|
+ the child process gets its own copy of the lock. */
|
|
+ if (ret == 0) {
|
|
+ /* Child Process. */
|
|
+ if (flags & CLONE_CHILD_SETTID)
|
|
+ *child_tidptr = gettid();
|
|
+ ts = (TaskState *)env->opaque;
|
|
+ if (flags & CLONE_CHILD_CLEARTID)
|
|
+ ts->child_tidptr = child_tidptr;
|
|
+ if (flags & CLONE_SETTLS)
|
|
+ cpu_set_tls (env, newtls);
|
|
+ }
|
|
+#endif
|
|
}
|
|
return ret;
|
|
}
|
|
@@ -3118,7 +3197,7 @@
|
|
ret = do_brk(arg1);
|
|
break;
|
|
case TARGET_NR_fork:
|
|
- ret = get_errno(do_fork(cpu_env, SIGCHLD, 0));
|
|
+ ret = get_errno(do_fork(cpu_env, SIGCHLD, 0, NULL, NULL, NULL));
|
|
break;
|
|
#ifdef TARGET_NR_waitpid
|
|
case TARGET_NR_waitpid:
|
|
@@ -4481,7 +4560,8 @@
|
|
ret = get_errno(fsync(arg1));
|
|
break;
|
|
case TARGET_NR_clone:
|
|
- ret = get_errno(do_fork(cpu_env, arg1, arg2));
|
|
+ ret = get_errno(do_fork(cpu_env, arg1, arg2, (uint32_t *)arg3,
|
|
+ (void *)arg4, (uint32_t *)arg5));
|
|
break;
|
|
#ifdef __NR_exit_group
|
|
/* new thread calls */
|
|
@@ -4928,7 +5008,8 @@
|
|
#endif
|
|
#ifdef TARGET_NR_vfork
|
|
case TARGET_NR_vfork:
|
|
- ret = get_errno(do_fork(cpu_env, CLONE_VFORK | CLONE_VM | SIGCHLD, 0));
|
|
+ ret = get_errno(do_fork(cpu_env, CLONE_VFORK | CLONE_VM | SIGCHLD, 0,
|
|
+ NULL, NULL, NULL));
|
|
break;
|
|
#endif
|
|
#ifdef TARGET_NR_ugetrlimit
|
|
Index: qemu/qemu_spinlock.h
|
|
===================================================================
|
|
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
|
|
+++ qemu/qemu_spinlock.h 2008-04-09 23:05:55.000000000 +0100
|
|
@@ -0,0 +1,181 @@
|
|
+/*
|
|
+ * Atomic operation helper include
|
|
+ *
|
|
+ * Copyright (c) 2005 Fabrice Bellard
|
|
+ *
|
|
+ * This library is free software; you can redistribute it and/or
|
|
+ * modify it under the terms of the GNU Lesser General Public
|
|
+ * License as published by the Free Software Foundation; either
|
|
+ * version 2 of the License, or (at your option) any later version.
|
|
+ *
|
|
+ * This library is distributed in the hope that it will be useful,
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
+ * Lesser General Public License for more details.
|
|
+ *
|
|
+ * You should have received a copy of the GNU Lesser General Public
|
|
+ * License along with this library; if not, write to the Free Software
|
|
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
+ */
|
|
+#ifndef QEMU_SPINLOCK_H
|
|
+#define QEMU_SPINLOCK_H
|
|
+
|
|
+#ifdef __powerpc__
|
|
+static inline int testandset (int *p)
|
|
+{
|
|
+ int ret;
|
|
+ __asm__ __volatile__ (
|
|
+ "0: lwarx %0,0,%1\n"
|
|
+ " xor. %0,%3,%0\n"
|
|
+ " bne 1f\n"
|
|
+ " stwcx. %2,0,%1\n"
|
|
+ " bne- 0b\n"
|
|
+ "1: "
|
|
+ : "=&r" (ret)
|
|
+ : "r" (p), "r" (1), "r" (0)
|
|
+ : "cr0", "memory");
|
|
+ return ret;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifdef __i386__
|
|
+static inline int testandset (int *p)
|
|
+{
|
|
+ long int readval = 0;
|
|
+
|
|
+ __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
|
|
+ : "+m" (*p), "+a" (readval)
|
|
+ : "r" (1)
|
|
+ : "cc");
|
|
+ return readval;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifdef __x86_64__
|
|
+static inline int testandset (int *p)
|
|
+{
|
|
+ long int readval = 0;
|
|
+
|
|
+ __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
|
|
+ : "+m" (*p), "+a" (readval)
|
|
+ : "r" (1)
|
|
+ : "cc");
|
|
+ return readval;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifdef __s390__
|
|
+static inline int testandset (int *p)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ __asm__ __volatile__ ("0: cs %0,%1,0(%2)\n"
|
|
+ " jl 0b"
|
|
+ : "=&d" (ret)
|
|
+ : "r" (1), "a" (p), "0" (*p)
|
|
+ : "cc", "memory" );
|
|
+ return ret;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifdef __alpha__
|
|
+static inline int testandset (int *p)
|
|
+{
|
|
+ int ret;
|
|
+ unsigned long one;
|
|
+
|
|
+ __asm__ __volatile__ ("0: mov 1,%2\n"
|
|
+ " ldl_l %0,%1\n"
|
|
+ " stl_c %2,%1\n"
|
|
+ " beq %2,1f\n"
|
|
+ ".subsection 2\n"
|
|
+ "1: br 0b\n"
|
|
+ ".previous"
|
|
+ : "=r" (ret), "=m" (*p), "=r" (one)
|
|
+ : "m" (*p));
|
|
+ return ret;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifdef __sparc__
|
|
+static inline int testandset (int *p)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ __asm__ __volatile__("ldstub [%1], %0"
|
|
+ : "=r" (ret)
|
|
+ : "r" (p)
|
|
+ : "memory");
|
|
+
|
|
+ return (ret ? 1 : 0);
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifdef __arm__
|
|
+static inline int testandset (int *spinlock)
|
|
+{
|
|
+ register unsigned int ret;
|
|
+ __asm__ __volatile__("swp %0, %1, [%2]"
|
|
+ : "=r"(ret)
|
|
+ : "0"(1), "r"(spinlock));
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifdef __mc68000
|
|
+static inline int testandset (int *p)
|
|
+{
|
|
+ char ret;
|
|
+ __asm__ __volatile__("tas %1; sne %0"
|
|
+ : "=r" (ret)
|
|
+ : "m" (p)
|
|
+ : "cc","memory");
|
|
+ return ret;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifdef __ia64
|
|
+#include <ia64intrin.h>
|
|
+
|
|
+static inline int testandset (int *p)
|
|
+{
|
|
+ return __sync_lock_test_and_set (p, 1);
|
|
+}
|
|
+#endif
|
|
+
|
|
+typedef int spinlock_t;
|
|
+
|
|
+#define SPIN_LOCK_UNLOCKED 0
|
|
+
|
|
+#if defined(CONFIG_USER_ONLY)
|
|
+static inline void spin_lock(spinlock_t *lock)
|
|
+{
|
|
+ while (testandset(lock));
|
|
+}
|
|
+
|
|
+static inline void spin_unlock(spinlock_t *lock)
|
|
+{
|
|
+ *lock = 0;
|
|
+}
|
|
+
|
|
+static inline int spin_trylock(spinlock_t *lock)
|
|
+{
|
|
+ return !testandset(lock);
|
|
+}
|
|
+#else
|
|
+static inline void spin_lock(spinlock_t *lock)
|
|
+{
|
|
+}
|
|
+
|
|
+static inline void spin_unlock(spinlock_t *lock)
|
|
+{
|
|
+}
|
|
+
|
|
+static inline int spin_trylock(spinlock_t *lock)
|
|
+{
|
|
+ return 1;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#endif
|
|
Index: qemu/target-arm/cpu.h
|
|
===================================================================
|
|
--- qemu.orig/target-arm/cpu.h 2007-11-27 12:09:57.000000000 +0000
|
|
+++ qemu/target-arm/cpu.h 2008-04-09 23:05:55.000000000 +0100
|
|
@@ -38,6 +38,7 @@
|
|
#define EXCP_FIQ 6
|
|
#define EXCP_BKPT 7
|
|
#define EXCP_EXCEPTION_EXIT 8 /* Return from v7M exception. */
|
|
+#define EXCP_KERNEL_TRAP 9 /* Jumped to kernel code page. */
|
|
|
|
#define ARMV7M_EXCP_RESET 1
|
|
#define ARMV7M_EXCP_NMI 2
|
|
@@ -222,6 +223,15 @@
|
|
void cpu_lock(void);
|
|
void cpu_unlock(void);
|
|
|
|
+void cpu_lock(void);
|
|
+void cpu_unlock(void);
|
|
+#if defined(USE_NPTL)
|
|
+static inline void cpu_set_tls(CPUARMState *env, void *newtls)
|
|
+{
|
|
+ env->cp15.c13_tls2 = (uint32_t)(long)newtls;
|
|
+}
|
|
+#endif
|
|
+
|
|
#define CPSR_M (0x1f)
|
|
#define CPSR_T (1 << 5)
|
|
#define CPSR_F (1 << 6)
|
|
Index: qemu/target-arm/op.c
|
|
===================================================================
|
|
--- qemu.orig/target-arm/op.c 2008-04-09 22:40:01.000000000 +0100
|
|
+++ qemu/target-arm/op.c 2008-04-09 23:05:55.000000000 +0100
|
|
@@ -994,6 +994,12 @@
|
|
cpu_loop_exit();
|
|
}
|
|
|
|
+void OPPROTO op_kernel_trap(void)
|
|
+{
|
|
+ env->exception_index = EXCP_KERNEL_TRAP;
|
|
+ cpu_loop_exit();
|
|
+}
|
|
+
|
|
/* VFP support. We follow the convention used for VFP instrunctions:
|
|
Single precition routines have a "s" suffix, double precision a
|
|
"d" suffix. */
|
|
Index: qemu/target-arm/translate.c
|
|
===================================================================
|
|
--- qemu.orig/target-arm/translate.c 2008-04-09 22:40:01.000000000 +0100
|
|
+++ qemu/target-arm/translate.c 2008-04-09 23:05:55.000000000 +0100
|
|
@@ -7496,7 +7496,14 @@
|
|
gen_op_exception_exit();
|
|
}
|
|
#endif
|
|
-
|
|
+#ifdef CONFIG_USER_ONLY
|
|
+ /* Intercept jump to the magic kernel page. */
|
|
+ if (dc->pc > 0xffff0000) {
|
|
+ gen_op_kernel_trap();
|
|
+ dc->is_jmp = DISAS_UPDATE;
|
|
+ break;
|
|
+ }
|
|
+#endif
|
|
if (env->nb_breakpoints > 0) {
|
|
for(j = 0; j < env->nb_breakpoints; j++) {
|
|
if (env->breakpoints[j] == dc->pc) {
|