130 lines
3.9 KiB
Diff
130 lines
3.9 KiB
Diff
Upstream-Status: Inappropriate [others]
|
|
|
|
Patch from gentoo which is not appropriate for us to upstream.
|
|
|
|
# Patch copied from the OpenEmbedded libatomics-ops recipe. Original
|
|
# source was from Gentoo.
|
|
#
|
|
# Signed-off-by: Scott Garman <scott.a.garman@intel.com>
|
|
diff --git a/src/atomic_ops.h b/src/atomic_ops.h
|
|
index c23f30b..791b360 100755
|
|
--- a/src/atomic_ops.h
|
|
+++ b/src/atomic_ops.h
|
|
@@ -220,6 +220,9 @@
|
|
# if defined(__cris__) || defined(CRIS)
|
|
# include "atomic_ops/sysdeps/gcc/cris.h"
|
|
# endif
|
|
+# if defined(__mips__)
|
|
+# include "atomic_ops/sysdeps/gcc/mips.h"
|
|
+# endif
|
|
#endif /* __GNUC__ && !AO_USE_PTHREAD_DEFS */
|
|
|
|
#if defined(__INTEL_COMPILER) && !defined(AO_USE_PTHREAD_DEFS)
|
|
diff --git a/src/atomic_ops/sysdeps/Makefile.am b/src/atomic_ops/sysdeps/Makefile.am
|
|
index 74122b4..d6737c0 100644
|
|
--- a/src/atomic_ops/sysdeps/Makefile.am
|
|
+++ b/src/atomic_ops/sysdeps/Makefile.am
|
|
@@ -29,6 +29,7 @@ nobase_sysdep_HEADERS= generic_pthread.h \
|
|
gcc/powerpc.h gcc/sparc.h \
|
|
gcc/hppa.h gcc/m68k.h gcc/s390.h \
|
|
gcc/ia64.h gcc/x86_64.h gcc/cris.h \
|
|
+ gcc/mips.h \
|
|
\
|
|
icc/ia64.h \
|
|
\
|
|
diff --git a/src/atomic_ops/sysdeps/gcc/mips.h b/src/atomic_ops/sysdeps/gcc/mips.h
|
|
new file mode 100644
|
|
index 0000000..e7f3a5d
|
|
--- /dev/null
|
|
+++ b/src/atomic_ops/sysdeps/gcc/mips.h
|
|
@@ -0,0 +1,89 @@
|
|
+/*
|
|
+ * Copyright (c) 2005 Thiemo Seufer <ths@networkno.de>
|
|
+ * Copyright (c) 2007 Zhang Le <r0bertz@gentoo.org>
|
|
+ *
|
|
+ * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
|
|
+ * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
|
|
+ *
|
|
+ * Permission is hereby granted to use or copy this program
|
|
+ * for any purpose, provided the above notices are retained on all copies.
|
|
+ * Permission to modify the code and to distribute modified code is granted,
|
|
+ * provided the above notices are retained, and a notice that the code was
|
|
+ * modified is included with the above copyright notice.
|
|
+ */
|
|
+
|
|
+#include "../all_aligned_atomic_load_store.h"
|
|
+#include "../test_and_set_t_is_ao_t.h"
|
|
+
|
|
+/* Data dependence does not imply read ordering. */
|
|
+#define AO_NO_DD_ORDERING
|
|
+
|
|
+AO_INLINE void
|
|
+AO_nop_full()
|
|
+{
|
|
+ __asm__ __volatile__(
|
|
+ " .set push \n"
|
|
+ " .set mips3 \n"
|
|
+ " .set noreorder \n"
|
|
+ " .set nomacro \n"
|
|
+ " sync \n"
|
|
+ " .set pop "
|
|
+ : : : "memory");
|
|
+}
|
|
+
|
|
+#define AO_HAVE_nop_full
|
|
+
|
|
+AO_INLINE int
|
|
+AO_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val)
|
|
+{
|
|
+ register int was_equal = 0;
|
|
+ register int temp;
|
|
+
|
|
+ __asm__ __volatile__(
|
|
+ " .set push \n"
|
|
+ " .set mips3 \n"
|
|
+ " .set noreorder \n"
|
|
+ " .set nomacro \n"
|
|
+ "1: ll %0, %1 \n"
|
|
+ " bne %0, %4, 2f \n"
|
|
+ " move %0, %3 \n"
|
|
+ " sc %0, %1 \n"
|
|
+ " .set pop \n"
|
|
+ " beqz %0, 1b \n"
|
|
+ " li %2, 1 \n"
|
|
+ "2: "
|
|
+ : "=&r" (temp), "+R" (*addr), "+r" (was_equal)
|
|
+ : "r" (new_val), "r" (old)
|
|
+ : "memory");
|
|
+ return was_equal;
|
|
+}
|
|
+
|
|
+#define AO_HAVE_compare_and_swap
|
|
+
|
|
+AO_INLINE AO_t
|
|
+AO_fetch_and_add_full (volatile AO_t *p, AO_t incr)
|
|
+{
|
|
+ AO_t result, temp;
|
|
+ __asm__ __volatile__(
|
|
+ " .set push \n"
|
|
+ " .set mips3 \n"
|
|
+ " .set noreorder \n"
|
|
+ " .set nomacro \n"
|
|
+ "1: ll %1, %2 \n"
|
|
+ " addu %0, %1, %3 \n"
|
|
+ " sc %0, %2 \n"
|
|
+ " beqz %0, 1b \n"
|
|
+ " addu %0, %1, %3 \n"
|
|
+ " sync \n"
|
|
+ " .set pop \n"
|
|
+ : "=&r" (result), "=&r" (temp), "=m" (*p)
|
|
+ : "r" (incr), "m" (*p)
|
|
+ : "memory");
|
|
+ return result;
|
|
+}
|
|
+
|
|
+#define AO_HAVE_fetch_and_add_full
|
|
+
|
|
+/*
|
|
+ * FIXME: fetch_and_add_full implemented, any others?
|
|
+ */
|