84 lines
3.4 KiB
Diff
84 lines
3.4 KiB
Diff
From 000ab518aa1269714bc0a9a4633b0a538fae91d9 Mon Sep 17 00:00:00 2001
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From: Khem Raj <raj.khem@gmail.com>
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Date: Thu, 31 Dec 2015 15:15:09 -0800
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Subject: [PATCH 21/26] eglibc: Clear cache lines on ppc8xx
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2007-06-13 Nathan Sidwell <nathan@codesourcery.com>
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Mark Shinwell <shinwell@codesourcery.com>
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* sysdeps/unix/sysv/linux/powerpc/libc-start.c
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(__libc_start_main): Detect 8xx parts and clear
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__cache_line_size if detected.
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* sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c
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(DL_PLATFORM_AUXV): Likewise.
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Upstream-Status: Pending
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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---
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sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c | 14 +++++++++++++-
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sysdeps/unix/sysv/linux/powerpc/libc-start.c | 16 +++++++++++++++-
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2 files changed, 28 insertions(+), 2 deletions(-)
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diff --git a/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c b/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c
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index 98ec2b3..b384ae0 100644
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--- a/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c
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+++ b/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c
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@@ -24,9 +24,21 @@ int __cache_line_size attribute_hidden;
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/* Scan the Aux Vector for the "Data Cache Block Size" entry. If found
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verify that the static extern __cache_line_size is defined by checking
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for not NULL. If it is defined then assign the cache block size
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- value to __cache_line_size. */
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+ value to __cache_line_size. This is used by memset to
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+ optimize setting to zero. We have to detect 8xx processors, which
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+ have buggy dcbz implementations that cannot report page faults
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+ correctly. That requires reading SPR, which is a privileged
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+ operation. Fortunately 2.2.18 and later emulates PowerPC mfspr
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+ reads from the PVR register. */
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#define DL_PLATFORM_AUXV \
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case AT_DCACHEBSIZE: \
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+ if (__LINUX_KERNEL_VERSION >= 0x020218) \
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+ { \
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+ unsigned pvr = 0; \
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+ asm ("mfspr %0, 287" : "=r" (pvr)); \
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+ if ((pvr & 0xffff0000) == 0x00500000) \
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+ break; \
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+ } \
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__cache_line_size = av->a_un.a_val; \
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break;
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diff --git a/sysdeps/unix/sysv/linux/powerpc/libc-start.c b/sysdeps/unix/sysv/linux/powerpc/libc-start.c
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index 0efd297..8cc0ef8 100644
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--- a/sysdeps/unix/sysv/linux/powerpc/libc-start.c
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+++ b/sysdeps/unix/sysv/linux/powerpc/libc-start.c
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@@ -73,11 +73,25 @@ __libc_start_main (int argc, char **argv,
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/* Initialize the __cache_line_size variable from the aux vector. For the
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static case, we also need _dl_hwcap, _dl_hwcap2 and _dl_platform, so we
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- can call __tcb_parse_hwcap_and_convert_at_platform (). */
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+ can call __tcb_parse_hwcap_and_convert_at_platform ().
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+
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+ This is used by memset to optimize setting to zero. We have to
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+ detect 8xx processors, which have buggy dcbz implementations that
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+ cannot report page faults correctly. That requires reading SPR,
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+ which is a privileged operation. Fortunately 2.2.18 and later
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+ emulates PowerPC mfspr reads from the PVR register. */
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for (ElfW (auxv_t) * av = auxvec; av->a_type != AT_NULL; ++av)
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switch (av->a_type)
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{
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case AT_DCACHEBSIZE:
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+ if (__LINUX_KERNEL_VERSION >= 0x020218)
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+ {
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+ unsigned pvr = 0;
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+
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+ asm ("mfspr %0, 287" : "=r" (pvr) :);
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+ if ((pvr & 0xffff0000) == 0x00500000)
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+ break;
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+ }
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__cache_line_size = av->a_un.a_val;
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break;
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#ifndef SHARED
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--
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2.10.2
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