342 lines
11 KiB
Diff
342 lines
11 KiB
Diff
TWL4030: convert early interrupt mask/clear funcs to use array
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From: Paul Walmsley <paul@pwsan.com>
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Mask/clear TWL module IMRs/ISRs by iterating through arrays rather than
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using a block of cut-and-pasted commands. Removes 1056 bytes of bloat.
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Signed-off-by: Paul Walmsley <paul@pwsan.com>
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---
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drivers/i2c/chips/twl4030-core.c | 302 +++++++++++++++++++++++---------------
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1 files changed, 180 insertions(+), 122 deletions(-)
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diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c
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index 38c227a..776b1dd 100644
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--- a/drivers/i2c/chips/twl4030-core.c
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+++ b/drivers/i2c/chips/twl4030-core.c
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@@ -160,6 +160,136 @@
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#define TWL4030_SIH_CTRL_COR_MASK (1 << 2)
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+/**
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+ * struct twl4030_mod_iregs - TWL module IMR/ISR regs to mask/clear at init
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+ * @mod_no: TWL4030 module number (e.g., TWL4030_MODULE_GPIO)
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+ * @sih_ctrl: address of module SIH_CTRL register
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+ * @reg_cnt: number of IMR/ISR regs
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+ * @imrs: pointer to array of TWL module interrupt mask register indices
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+ * @isrs: pointer to array of TWL module interrupt status register indices
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+ *
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+ * Ties together TWL4030 modules and lists of IMR/ISR registers to mask/clear
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+ * during twl_init_irq().
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+ */
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+struct twl4030_mod_iregs {
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+ const u8 mod_no;
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+ const u8 sih_ctrl;
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+ const u8 reg_cnt;
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+ const u8 *imrs;
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+ const u8 *isrs;
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+};
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+
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+/* TWL4030 INT module interrupt mask registers */
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+static const u8 __initconst twl4030_int_imr_regs[] = {
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+ TWL4030_INT_PWR_IMR1,
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+ TWL4030_INT_PWR_IMR2,
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+};
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+
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+/* TWL4030 INT module interrupt status registers */
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+static const u8 __initconst twl4030_int_isr_regs[] = {
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+ TWL4030_INT_PWR_ISR1,
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+ TWL4030_INT_PWR_ISR2,
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+};
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+
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+/* TWL4030 INTERRUPTS module interrupt mask registers */
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+static const u8 __initconst twl4030_interrupts_imr_regs[] = {
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+ TWL4030_INTERRUPTS_BCIIMR1A,
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+ TWL4030_INTERRUPTS_BCIIMR1B,
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+ TWL4030_INTERRUPTS_BCIIMR2A,
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+ TWL4030_INTERRUPTS_BCIIMR2B,
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+};
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+
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+/* TWL4030 INTERRUPTS module interrupt status registers */
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+static const u8 __initconst twl4030_interrupts_isr_regs[] = {
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+ TWL4030_INTERRUPTS_BCIISR1A,
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+ TWL4030_INTERRUPTS_BCIISR1B,
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+ TWL4030_INTERRUPTS_BCIISR2A,
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+ TWL4030_INTERRUPTS_BCIISR2B,
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+};
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+
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+/* TWL4030 MADC module interrupt mask registers */
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+static const u8 __initconst twl4030_madc_imr_regs[] = {
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+ TWL4030_MADC_IMR1,
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+ TWL4030_MADC_IMR2,
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+};
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+
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+/* TWL4030 MADC module interrupt status registers */
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+static const u8 __initconst twl4030_madc_isr_regs[] = {
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+ TWL4030_MADC_ISR1,
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+ TWL4030_MADC_ISR2,
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+};
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+
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+/* TWL4030 keypad module interrupt mask registers */
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+static const u8 __initconst twl4030_keypad_imr_regs[] = {
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+ TWL4030_KEYPAD_KEYP_IMR1,
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+ TWL4030_KEYPAD_KEYP_IMR2,
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+};
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+
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+/* TWL4030 keypad module interrupt status registers */
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+static const u8 __initconst twl4030_keypad_isr_regs[] = {
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+ TWL4030_KEYPAD_KEYP_ISR1,
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+ TWL4030_KEYPAD_KEYP_ISR2,
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+};
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+
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+/* TWL4030 GPIO module interrupt mask registers */
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+static const u8 __initconst twl4030_gpio_imr_regs[] = {
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+ REG_GPIO_IMR1A,
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+ REG_GPIO_IMR1B,
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+ REG_GPIO_IMR2A,
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+ REG_GPIO_IMR2B,
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+ REG_GPIO_IMR3A,
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+ REG_GPIO_IMR3B,
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+};
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+
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+/* TWL4030 GPIO module interrupt status registers */
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+static const u8 __initconst twl4030_gpio_isr_regs[] = {
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+ REG_GPIO_ISR1A,
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+ REG_GPIO_ISR1B,
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+ REG_GPIO_ISR2A,
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+ REG_GPIO_ISR2B,
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+ REG_GPIO_ISR3A,
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+ REG_GPIO_ISR3B,
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+};
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+
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+/* TWL4030 modules that have IMR/ISR registers that must be masked/cleared */
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+static const struct twl4030_mod_iregs __initconst twl4030_mod_regs[] = {
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+ {
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+ .mod_no = TWL4030_MODULE_INT,
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+ .sih_ctrl = TWL4030_INT_PWR_SIH_CTRL,
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+ .reg_cnt = ARRAY_SIZE(twl4030_int_imr_regs),
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+ .imrs = twl4030_int_imr_regs,
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+ .isrs = twl4030_int_isr_regs,
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+ },
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+ {
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+ .mod_no = TWL4030_MODULE_INTERRUPTS,
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+ .sih_ctrl = TWL4030_INTERRUPTS_BCISIHCTRL,
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+ .reg_cnt = ARRAY_SIZE(twl4030_interrupts_imr_regs),
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+ .imrs = twl4030_interrupts_imr_regs,
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+ .isrs = twl4030_interrupts_isr_regs,
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+ },
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+ {
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+ .mod_no = TWL4030_MODULE_MADC,
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+ .sih_ctrl = TWL4030_MADC_MADC_SIH_CTRL,
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+ .reg_cnt = ARRAY_SIZE(twl4030_madc_imr_regs),
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+ .imrs = twl4030_madc_imr_regs,
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+ .isrs = twl4030_madc_isr_regs,
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+ },
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+ {
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+ .mod_no = TWL4030_MODULE_KEYPAD,
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+ .sih_ctrl = TWL4030_KEYPAD_KEYP_SIH_CTRL,
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+ .reg_cnt = ARRAY_SIZE(twl4030_keypad_imr_regs),
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+ .imrs = twl4030_keypad_imr_regs,
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+ .isrs = twl4030_keypad_isr_regs,
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+ },
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+ {
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+ .mod_no = TWL4030_MODULE_GPIO,
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+ .sih_ctrl = REG_GPIO_SIH_CTRL,
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+ .reg_cnt = ARRAY_SIZE(twl4030_gpio_imr_regs),
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+ .imrs = twl4030_gpio_imr_regs,
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+ .isrs = twl4030_gpio_isr_regs,
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+ },
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+};
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+
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/* Helper functions */
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static int
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@@ -779,136 +909,64 @@ static int twl4030_read_cor_bit(u8 mod_no, u8 reg)
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return tmp;
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}
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+/**
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+ * twl4030_mask_clear_intrs - mask and clear all TWL4030 interrupts
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+ * @t: pointer to twl4030_mod_iregs array
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+ * @t_sz: ARRAY_SIZE(t) (starting at 1)
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+ *
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+ * Mask all TWL4030 interrupt mask registers (IMRs) and clear all
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+ * interrupt status registers (ISRs). No return value, but will WARN if
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+ * any I2C operations fail.
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+ */
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+static void __init twl4030_mask_clear_intrs(const struct twl4030_mod_iregs *t,
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+ const u8 t_sz)
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+{
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+ int i, j;
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+
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+ /*
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+ * N.B. - further efficiency is possible here. Eight I2C
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+ * operations on BCI and GPIO modules are avoidable if I2C
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+ * burst read/write transactions were implemented. Would
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+ * probably save about 1ms of boot time and a small amount of
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+ * power.
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+ */
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+ for (i = 0; i < t_sz; i++) {
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+ const struct twl4030_mod_iregs tmr = t[i];
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+
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+ for (j = 0; j < tmr.reg_cnt; j++) {
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+ int cor;
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+
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+ /* Mask interrupts at the TWL4030 */
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+ WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff,
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+ tmr.imrs[j]) < 0);
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+
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+ /* Are ISRs cleared by reads or writes? */
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+ cor = twl4030_read_cor_bit(tmr.mod_no, tmr.sih_ctrl);
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+ WARN_ON(cor < 0);
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+
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+ /* Clear TWL4030 ISRs */
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+ WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no,
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+ tmr.isrs[j], cor) < 0);
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+ }
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+ }
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+
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+ return;
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+}
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+
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+
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static void twl_init_irq(void)
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{
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- int i = 0;
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+ int i;
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int res = 0;
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- int cor;
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char *msg = "Unable to register interrupt subsystem";
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unsigned int irq_num;
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/*
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- * For each TWL4030 module with ISR/IMR registers, mask all
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- * interrupts and then clear any existing interrupt status bits,
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- * since we initially do not have any TWL4030 module interrupt
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- * handlers present.
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+ * Mask and clear all TWL4030 interrupts since initially we do
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+ * not have any TWL4030 module interrupt handlers present
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*/
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-
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- /* Mask INT (PWR) interrupts at TWL4030 */
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff,
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- TWL4030_INT_PWR_IMR1) < 0);
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff,
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- TWL4030_INT_PWR_IMR2) < 0);
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-
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- /* Are PWR interrupt status bits cleared by reads or writes? */
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- cor = twl4030_read_cor_bit(TWL4030_MODULE_INT,
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- TWL4030_INT_PWR_SIH_CTRL);
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- WARN_ON(cor < 0);
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-
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- /* Clear TWL4030 INT (PWR) ISRs */
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT,
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- TWL4030_INT_PWR_ISR1, cor) < 0);
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INT,
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- TWL4030_INT_PWR_ISR2, cor) < 0);
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-
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- /* Slave address 0x4A */
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-
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- /* Mask BCI interrupts at TWL4030 */
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff,
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- TWL4030_INTERRUPTS_BCIIMR1A) < 0);
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff,
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- TWL4030_INTERRUPTS_BCIIMR2A) < 0);
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff,
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- TWL4030_INTERRUPTS_BCIIMR1B) < 0);
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff,
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- TWL4030_INTERRUPTS_BCIIMR2B) < 0);
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-
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- /* Are BCI interrupt status bits cleared by reads or writes? */
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- cor = twl4030_read_cor_bit(TWL4030_MODULE_INTERRUPTS,
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- TWL4030_INTERRUPTS_BCISIHCTRL);
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- WARN_ON(cor < 0);
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-
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- /* Clear TWL4030 BCI ISRs */
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
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- TWL4030_INTERRUPTS_BCIISR1A, cor) < 0);
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
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- TWL4030_INTERRUPTS_BCIISR2A, cor) < 0);
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
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- TWL4030_INTERRUPTS_BCIISR1B, cor) < 0);
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_INTERRUPTS,
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- TWL4030_INTERRUPTS_BCIISR2B, cor) < 0);
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-
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- /* MAD C */
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- /* Mask MADC interrupts at TWL4030 */
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff,
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- TWL4030_MADC_IMR1) < 0);
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff,
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- TWL4030_MADC_IMR2) < 0);
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-
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- /* Are MADC interrupt status bits cleared by reads or writes? */
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- cor = twl4030_read_cor_bit(TWL4030_MODULE_MADC,
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- TWL4030_MADC_MADC_SIH_CTRL);
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- WARN_ON(cor < 0);
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-
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- /* Clear TWL4030 MADC ISRs */
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC,
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- TWL4030_MADC_ISR1, cor) < 0);
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_MADC,
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- TWL4030_MADC_ISR2, cor) < 0);
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-
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- /* key Pad */
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- /* Mask keypad interrupts at TWL4030 */
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff,
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- TWL4030_KEYPAD_KEYP_IMR1) < 0);
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff,
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- TWL4030_KEYPAD_KEYP_IMR2) < 0);
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-
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- /* Are keypad interrupt status bits cleared by reads or writes? */
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- cor = twl4030_read_cor_bit(TWL4030_MODULE_KEYPAD,
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- TWL4030_KEYPAD_KEYP_SIH_CTRL);
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- WARN_ON(cor < 0);
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-
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- /* Clear TWL4030 keypad ISRs */
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- /* XXX does this still need to be done twice for some reason? */
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD,
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- TWL4030_KEYPAD_KEYP_ISR1, cor) < 0);
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD,
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- TWL4030_KEYPAD_KEYP_ISR2, cor) < 0);
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-
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- /* Slave address 0x49 */
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-
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- /* Mask GPIO interrupts at TWL4030 */
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff,
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- REG_GPIO_IMR1A) < 0);
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff,
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- REG_GPIO_IMR2A) < 0);
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff,
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- REG_GPIO_IMR3A) < 0);
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff,
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- REG_GPIO_IMR1B) < 0);
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff,
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- REG_GPIO_IMR2B) < 0);
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- WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff,
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- REG_GPIO_IMR3B) < 0);
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-
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- /* Are GPIO interrupt status bits cleared by reads or writes? */
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- cor = twl4030_read_cor_bit(TWL4030_MODULE_GPIO,
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- REG_GPIO_SIH_CTRL);
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- WARN_ON(cor < 0);
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-
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- /* Clear TWL4030 GPIO ISRs */
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1A,
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- cor) < 0);
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2A,
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- cor) < 0);
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3A,
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- cor) < 0);
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR1B,
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- cor) < 0);
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR2B,
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- cor) < 0);
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- WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_GPIO, REG_GPIO_ISR3B,
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- cor) < 0);
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+ twl4030_mask_clear_intrs(twl4030_mod_regs,
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+ ARRAY_SIZE(twl4030_mod_regs));
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/* install an irq handler for each of the PIH modules */
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for (i = TWL4030_IRQ_BASE; i < TWL4030_IRQ_END; i++) {
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