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Update to API Release v5.1

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master superfemto_v5.1
Harald Welte 8 years ago
parent 84e0cf4651
commit 7f0d5697b8
2 changed files with 29 additions and 7 deletions
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6
include/gsml1const.h
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@ -141,8 +141,9 @@ typedef enum GsmL1_Status_t
GsmL1_Status_TxBurstFifoUndr = -21, ///< Fifo underrun
GsmL1_Status_NotSynchronized = -22, ///< Not synchronized
GsmL1_Status_Unsupported = -23, ///< Unsupported feature
GsmL1_Status_ClockError = -24, ///< System clock error
GSML1_STATUS_NUM = 24
GSML1_STATUS_NUM = 25
} GsmL1_Status_t;
@ -183,7 +184,8 @@ typedef enum GsmL1_DevType_t
GsmL1_DevType_Rxd = 0x01, ///< Monitor type (RX downlink only)
GsmL1_DevType_Rxu = 0x02, ///< Monitor type (RX uplink only)
GsmL1_DevType_Txd = 0x04, ///< Jammer type (TX downlink only)
GsmL1_DevType_Txu = 0x08 ///< Jammer type (TX uplink only)
GsmL1_DevType_Txu = 0x08, ///< Jammer type (TX uplink only)
GsmL1_DevType_TxuRxu = 0x0A ///< Loopback type (TX uplink with downlink frame format, Rx uplink)
} GsmL1_DevType_t;

30
include/superfemto.h
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@ -13,7 +13,7 @@
#include "gsml1const.h"
#define SUPERFEMTO_API(x,y,z) ((x << 16) | (y << 8) | z)
#define SUPERFEMTO_API_VERSION SUPERFEMTO_API(3,11,0)
#define SUPERFEMTO_API_VERSION SUPERFEMTO_API(5,1,0)
/****************************************************************************
* Const *
@ -386,7 +386,12 @@ typedef struct SuperFemto_GetTxCalibTblCnf
for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
for GSM-900 : 0=955, 1:956, ..., 70:1, ..., 317:956, [318-373]:unused
for DCS-1800: 0=512, 1:513, ..., 373:885
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
uint8_t u8DspMajVer; ///< DSP firmware major version (0 if unkown)
uint8_t u8DspMinVer; ///< DSP firmware minor version (0 if unkown)
uint8_t u8FpgaMajVer; ///< FPGA firmware major version (0 if unkown)
uint8_t u8FpgaMinVer; ///< FPGA firmware minor version (0 if unkown)
} SuperFemto_GetTxCalibTblCnf_t;
/****************************************************************************
@ -411,7 +416,12 @@ typedef struct SuperFemto_SetTxCalibTblReq
for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
for GSM-900 : 0=955, 1:956, ..., 70:1, ..., 317:956, [318-373]:unused
for DCS-1800: 0=512, 1:513, ..., 373:885
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
uint8_t u8DspMajVer; ///< DSP firmware major version (0 if unkown)
uint8_t u8DspMinVer; ///< DSP firmware minor version (0 if unkown)
uint8_t u8FpgaMajVer; ///< FPGA firmware major version (0 if unkown)
uint8_t u8FpgaMinVer; ///< FPGA firmware minor version (0 if unkown)
} SuperFemto_SetTxCalibTblReq_t;
/****************************************************************************
@ -471,7 +481,12 @@ typedef struct SuperFemto_GetRxCalibTblCnf
for DCS-1800: 0=512, 1:513, ..., 373:885
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
uint8_t u8IqImbalMode; ///< IQ imbalance mode (0:off, 1:on, 2:auto)
uint16_t u16IqImbalCorr[4]; ///< IQ imbalance compensation
uint16_t u16IqImbalCorr[4]; ///< IQ imbalance compensation
uint8_t u8DspMajVer; ///< DSP firmware major version (0 if unkown)
uint8_t u8DspMinVer; ///< DSP firmware minor version (0 if unkown)
uint8_t u8FpgaMajVer; ///< FPGA firmware major version (0 if unkown)
uint8_t u8FpgaMinVer; ///< FPGA firmware minor version (0 if unkown)
} SuperFemto_GetRxCalibTblCnf_t;
/****************************************************************************
@ -499,7 +514,12 @@ typedef struct SuperFemto_SetRxCalibTblReq
for DCS-1800: 0=512, 1:513, ..., 373:885
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
uint8_t u8IqImbalMode; ///< IQ imbalance mode (0:off, 1:on, 2:auto)
uint16_t u16IqImbalCorr[4]; ///< IQ imbalance compensation
uint16_t u16IqImbalCorr[4]; ///< IQ imbalance compensation
uint8_t u8DspMajVer; ///< DSP firmware major version (0 if unkown)
uint8_t u8DspMinVer; ///< DSP firmware minor version (0 if unkown)
uint8_t u8FpgaMajVer; ///< FPGA firmware major version (0 if unkown)
uint8_t u8FpgaMinVer; ///< FPGA firmware minor version (0 if unkown)
} SuperFemto_SetRxCalibTblReq_t;
/****************************************************************************

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