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Stafford Horne 88a86f8dfa
openrisc: Add _text symbol to fix ksym build error
6 years ago
boot/dts openrisc: use new common dtc rule 10 years ago
configs openrisc: Refresh or1ksim_defconfig for v3.12 10 years ago
include openrisc: Define __ro_after_init to avoid crash 6 years ago
kernel openrisc: Add _text symbol to fix ksym build error 6 years ago
lib ARCH: drivers remove __dev* attributes. 10 years ago
mm treewide: replace obsolete _refok by __ref 7 years ago
Kconfig openrisc: do away with ARCH_REQUIRE_GPIOLIB 7 years ago
Makefile openrisc: Makefile: append "-D__linux__" to KBUILD_CFLAGS 10 years ago
README.openrisc OpenRISC: Miscellaneous 12 years ago
TODO.openrisc OpenRISC: Miscellaneous 12 years ago


OpenRISC Linux

This is a port of Linux to the OpenRISC class of microprocessors; the initial
target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).

For information about OpenRISC processors and ongoing development:


For more information about Linux on OpenRISC, please contact South Pole AB.




Build instructions for OpenRISC toolchain and Linux

In order to build and run Linux for OpenRISC, you'll need at least a basic
toolchain and, perhaps, the architectural simulator.  Steps to get these bits
in place are outlined here.

1)  The toolchain can be obtained from  Instructions for building
a toolchain can be found at:

2) or1ksim (optional)

or1ksim is the architectural simulator which will allow you to actually run
your OpenRISC Linux kernel if you don't have an OpenRISC processor at hand.

	git clone git://

	cd or1ksim
	./configure --prefix=$OPENRISC_PREFIX
	make install

3)  Linux kernel

Build the kernel as usual

	make ARCH=openrisc defconfig
	make ARCH=openrisc

4)  Run in architectural simulator

Grab the or1ksim platform configuration file (from the or1ksim source) and
together with your freshly built vmlinux, run your kernel with the following

	sim -f arch/openrisc/or1ksim.cfg vmlinux



In the code, the following particles are used on symbols to limit the scope
to more or less specific processor implementations:

openrisc: the OpenRISC class of processors
or1k:     the OpenRISC 1000 family of processors
or1200:   the OpenRISC 1200 processor



18. 11. 2003	Matjaz Breskvar (
	initial port of linux to OpenRISC/or32 architecture.
        all the core stuff is implemented and seams usable.

08. 12. 2003	Matjaz Breskvar (
	complete change of TLB miss handling.
	rewrite of exceptions handling.
	fully functional sash-3.6 in default initrd.
	a much improved version with changes all around.

10. 04. 2004	Matjaz Breskvar (
	alot of bugfixes all over.
	ethernet support, functional http and telnet servers.
	running many standard linux apps.

26. 06. 2004	Matjaz Breskvar (
	port to 2.6.x

30. 11. 2004	Matjaz Breskvar (
	lots of bugfixes and enhancments.
	added opencores framebuffer driver.

09. 10. 2010    Jonas Bonn (
	major rewrite to bring up to par with upstream Linux 2.6.36