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u-boot/board/lart/config.mk

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Initial revision
2002-11-03 00:38:21 +00:00
#
# LART board with SA1100 cpu
#
# see http://www.lart.tudelft.nl/ for more information on LART
#
#
# LART has 4 banks of 8 MB DRAM
#
# c000'0000
# c100'0000
# c800'0000
# c900'0000
#
# Linux-Kernel is expected to be at c000'8000, entry c000'8000
#
* Patch by Gleb Natapov, 19 Sep 2003: Move most of the timer interrupt related PPC code to ppc_lib/interrupts.c * Patch by Anders Larsen, 17 Sep 2003: Bring ARM memory layout in sync with the documentation: stack and malloc-heap are now located _below_ the U-Boot code
2003-12-06 19:49:23 +00:00
# we load ourself to c178'0000, the upper 1 MB of second bank
Initial revision
2002-11-03 00:38:21 +00:00
#
# download areas is c800'0000
#
* Patch by Gleb Natapov, 19 Sep 2003: Move most of the timer interrupt related PPC code to ppc_lib/interrupts.c * Patch by Anders Larsen, 17 Sep 2003: Bring ARM memory layout in sync with the documentation: stack and malloc-heap are now located _below_ the U-Boot code
2003-12-06 19:49:23 +00:00
TEXT_BASE = 0xc1780000