187 lines
4.6 KiB
C
187 lines
4.6 KiB
C
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/*
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* Freescale i.MX28 SPI driver
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* NOTE: This driver only supports the SPI-controller chipselects,
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* GPIO driven chipselects are not supported.
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*/
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#include <common.h>
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#include <malloc.h>
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#include <spi.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/sys_proto.h>
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#define MXS_SPI_MAX_TIMEOUT 1000000
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#define MXS_SPI_PORT_OFFSET 0x2000
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struct mxs_spi_slave {
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struct spi_slave slave;
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uint32_t max_khz;
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uint32_t mode;
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struct mx28_ssp_regs *regs;
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};
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static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave)
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{
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return container_of(slave, struct mxs_spi_slave, slave);
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}
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void spi_init(void)
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{
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}
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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{
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struct mxs_spi_slave *mxs_slave;
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uint32_t addr;
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if (bus > 3) {
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printf("MXS SPI: Max bus number is 3\n");
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return NULL;
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}
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mxs_slave = malloc(sizeof(struct mxs_spi_slave));
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if (!mxs_slave)
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return NULL;
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addr = MXS_SSP0_BASE + (bus * MXS_SPI_PORT_OFFSET);
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mxs_slave->slave.bus = bus;
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mxs_slave->slave.cs = cs;
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mxs_slave->max_khz = max_hz / 1000;
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mxs_slave->mode = mode;
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mxs_slave->regs = (struct mx28_ssp_regs *)addr;
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return &mxs_slave->slave;
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}
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void spi_free_slave(struct spi_slave *slave)
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{
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struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
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free(mxs_slave);
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}
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int spi_claim_bus(struct spi_slave *slave)
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{
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struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
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struct mx28_ssp_regs *ssp_regs = mxs_slave->regs;
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uint32_t reg = 0;
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mx28_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
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writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT, &ssp_regs->hw_ssp_ctrl0);
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reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS;
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reg |= (mxs_slave->mode & SPI_CPOL) ? SSP_CTRL1_POLARITY : 0;
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reg |= (mxs_slave->mode & SPI_CPHA) ? SSP_CTRL1_PHASE : 0;
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writel(reg, &ssp_regs->hw_ssp_ctrl1);
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writel(0, &ssp_regs->hw_ssp_cmd0);
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mx28_set_ssp_busclock(slave->bus, mxs_slave->max_khz);
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return 0;
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}
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void spi_release_bus(struct spi_slave *slave)
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{
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}
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static void mxs_spi_start_xfer(struct mx28_ssp_regs *ssp_regs)
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{
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writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_set);
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writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_clr);
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}
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static void mxs_spi_end_xfer(struct mx28_ssp_regs *ssp_regs)
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{
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writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_clr);
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writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set);
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}
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
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const void *dout, void *din, unsigned long flags)
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{
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struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
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struct mx28_ssp_regs *ssp_regs = mxs_slave->regs;
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int len = bitlen / 8;
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const char *tx = dout;
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char *rx = din;
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if (bitlen == 0)
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return 0;
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if (!rx && !tx)
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return 0;
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if (flags & SPI_XFER_BEGIN)
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mxs_spi_start_xfer(ssp_regs);
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while (len--) {
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/* We transfer 1 byte */
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writel(1, &ssp_regs->hw_ssp_xfer_size);
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if ((flags & SPI_XFER_END) && !len)
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mxs_spi_end_xfer(ssp_regs);
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if (tx)
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writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_clr);
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else
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writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_set);
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writel(SSP_CTRL0_RUN, &ssp_regs->hw_ssp_ctrl0_set);
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if (mx28_wait_mask_set(&ssp_regs->hw_ssp_ctrl0_reg,
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SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) {
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printf("MXS SPI: Timeout waiting for start\n");
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return -1;
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}
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if (tx)
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writel(*tx++, &ssp_regs->hw_ssp_data);
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writel(SSP_CTRL0_DATA_XFER, &ssp_regs->hw_ssp_ctrl0_set);
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if (rx) {
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if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_status_reg,
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SSP_STATUS_FIFO_EMPTY, MXS_SPI_MAX_TIMEOUT)) {
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printf("MXS SPI: Timeout waiting for data\n");
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return -1;
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}
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*rx = readl(&ssp_regs->hw_ssp_data);
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rx++;
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}
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if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_ctrl0_reg,
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SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) {
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printf("MXS SPI: Timeout waiting for finish\n");
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return -1;
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}
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}
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return 0;
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}
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