2014-10-21 12:29:11 +00:00
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/*
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* This file contains the configuration parameters for the dbau1x00 board.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <configs/ar7240.h>
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#include <config.h>
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2015-03-01 03:45:46 +00:00
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2015-03-04 17:55:02 +00:00
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#define CONFIG_AR7240 1
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#define CONFIG_MACH_HORNET 1
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#define CONFIG_HORNET_1_1_WAR 1
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2015-03-01 03:45:46 +00:00
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/* enable watchdog */
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#define CONFIG_HW_WATCHDOG
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2015-03-03 13:05:08 +00:00
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#define CFG_CMD_BOOTCYCLE
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2014-10-21 12:29:11 +00:00
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*-----------------------------------------------------------------------
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*/
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#define CFG_MAX_FLASH_BANKS 1
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#define CFG_MAX_FLASH_SECT 256
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#define CFG_FLASH_SECTOR_SIZE (64*1024)
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#define CFG_FLASH_SIZE 0x01000000
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#if (CFG_MAX_FLASH_SECT * CFG_FLASH_SECTOR_SIZE) != CFG_FLASH_SIZE
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# error "Invalid flash configuration"
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#endif
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#define CFG_FLASH_WORD_SIZE unsigned short
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/*
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* We boot from this flash
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*/
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#define CFG_FLASH_BASE 0x9f000000
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#ifdef COMPRESSED_UBOOT
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#define BOOTSTRAP_TEXT_BASE CFG_FLASH_BASE
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#define BOOTSTRAP_CFG_MONITOR_BASE BOOTSTRAP_TEXT_BASE
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#endif
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/*
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* The following #defines are needed to get flash environment right
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*/
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#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_MONITOR_LEN (192 << 10)
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#undef CONFIG_BOOTARGS
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/* XXX - putting rootfs in last partition results in jffs errors */
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/* default mtd partition table */
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#undef MTDPARTS_DEFAULT
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#define CONFIG_BOOTARGS ""
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#define MTDPARTS_DEFAULT ""
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2015-03-04 18:22:14 +00:00
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/* pll and ddr configuration */
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#define CONFIG_40MHZ_XTAL_SUPPORT 1
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#define NEW_DDR_TAP_CAL 1
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2014-10-21 12:29:11 +00:00
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#undef CFG_PLL_FREQ
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#define CFG_PLL_FREQ CFG_PLL_400_400_200
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2015-03-04 18:22:14 +00:00
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#include <configs/ar7240_freq.h>
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2014-10-21 12:29:11 +00:00
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/*
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* timeout values are in ticks
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*/
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#define CFG_FLASH_ERASE_TOUT (2 * CFG_HZ) /* Timeout for Flash Erase */
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#define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */
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/*
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* Cache lock for stack
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*/
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#define CFG_INIT_SP_OFFSET 0x1000
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#ifndef COMPRESSED_UBOOT
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#define CFG_ENV_IS_IN_FLASH 1
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#undef CFG_ENV_IS_NOWHERE
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#else
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#undef CFG_ENV_IS_IN_FLASH
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#define CFG_ENV_IS_NOWHERE 1
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#endif /* #ifndef COMPRESSED_UBOOT */
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/* Address and size of Primary Environment Sector */
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#define CFG_ENV_ADDR 0x9f040000
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#define CFG_ENV_SIZE 0x10000
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#define CONFIG_BOOTCOMMAND "bootm 0x9f050000"
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#define CONFIG_NET_MULTI
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#define CONFIG_MEMSIZE_IN_BYTES
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#ifdef COMPRESSED_UBOOT
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#define ATH_NO_PCI_INIT
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#endif
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/*-----------------------------------------------------------------------
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* Cache Configuration
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*/
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#ifndef COMPRESSED_UBOOT
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#define CONFIG_COMMANDS (( CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_ELF | CFG_CMD_PCI | \
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2015-03-04 17:28:30 +00:00
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CFG_CMD_MII | CFG_CMD_PING | CFG_CMD_NET | CFG_CMD_ENV | \
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2014-10-21 12:29:11 +00:00
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CFG_CMD_FLASH | CFG_CMD_LOADS | CFG_CMD_RUN | CFG_CMD_LOADB | CFG_CMD_ELF | CFG_CMD_ETHREG | CFG_CMD_FAT ))
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#elif defined(VXWORKS_UBOOT)
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#define CONFIG_COMMANDS (( CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET | CFG_CMD_MII | CFG_CMD_ELF))
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#else
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#define CONFIG_COMMANDS (( CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET | CFG_CMD_MII))
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#endif /* #ifndef COMPRESSED_UBOOT */
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#define CFG_ATHRS26_PHY 1
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#define CONFIG_IPADDR 192.168.2.100
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#define CONFIG_SERVERIP 192.168.2.254
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#define CONFIG_ETHADDR 0x00:0xaa:0xbb:0xcc:0xdd:0xee
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#define CFG_FAULT_ECHO_LINK_DOWN 1
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#define CFG_PHY_ADDR 0
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#define CFG_AG7240_NMACS 2
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#define CFG_GMII 0
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#define CFG_MII0_RMII 1
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#define CFG_AG7100_GE0_RMII 1
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#define CFG_BOOTM_LEN (16 << 20) /* 16 MB */
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#undef DEBUG
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#define CFG_CONSOLE_INFO_QUIET /* don't print console @ startup*/
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#define CONFIG_SHOW_BOOT_PROGRESS /* use LEDs to show boot status*/
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#define CONFIG_SHOW_ACTIVITY
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#define CFG_HUSH_PARSER
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#define CFG_PROMPT_HUSH_PS2 "hush>"
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#define CONFIG_CARAMBOLA_FACTORY_MODE
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#define CFG_C2_IMG_LOAD_ADDR "0x80F00000"
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#define CFG_C2_IMG_FILENAME "carambola2.bin"
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#define ARCH_DMA_MINALIGN 4*1024 // 4kb in datasheet
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_EHCI_DESC_BIG_ENDIAN
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_EHCI_IS_TDI
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#define HAVE_BLOCK_DEVICE
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#define CONFIG_PARTITIONS
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#define CONFIG_DOS_PARTITION
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#define CONFIG_FS_FAT
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#define CONFIG_SUPPORT_VFAT
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#define CONFIG_SYS_LOAD_ADDR 0x82000000
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#define CONFIG_NEEDS_MANUAL_RELOC
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2014-10-23 06:38:12 +00:00
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#define CONFIG_AUTOBOOT_KEYED
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#define CONFIG_AUTOBOOT_PROMPT "Hit '%s' key(s) to stop autoboot: %2d "
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#define CONFIG_AUTOBOOT_STOP_STR "\x1B"
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2014-10-21 12:29:11 +00:00
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2014-10-24 07:46:31 +00:00
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#undef CFG_BAUDRATE_TABLE
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2014-10-28 08:59:19 +00:00
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#define CFG_BAUDRATE_TABLE { 300, 1200, 2400, 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, \
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115200, 128000, 230400, 250000, 256000, 460800, 500000, 576000, 921600, \
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1000000, 1152000, 1500000, 2000000, 3000000}
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2014-10-21 12:29:11 +00:00
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/*
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** Parameters defining the location of the calibration/initialization
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** information for the two Merlin devices.
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** NOTE: **This will change with different flash configurations**
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*/
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#define WLANCAL 0x9fff1000
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#define BOARDCAL 0x9fff0000
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#define ATHEROS_PRODUCT_ID 138
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#define CAL_SECTOR (CFG_MAX_FLASH_SECT - 1)
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/* For Kite, only PCI-e interface is valid */
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#define AR7240_ART_PCICFG_OFFSET 3
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#include <cmd_confdefs.h>
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#endif /* __CONFIG_H */
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