27 lines
572 B
C
27 lines
572 B
C
|
/*
|
||
|
* Copyright 2015 Freescale Semiconductor, Inc.
|
||
|
*
|
||
|
* SPDX-License-Identifier: GPL-2.0+
|
||
|
*/
|
||
|
|
||
|
#ifndef __LS2_QDS_QIXIS_H__
|
||
|
#define __LS2_QDS_QIXIS_H__
|
||
|
|
||
|
/* SYSCLK */
|
||
|
#define QIXIS_SYSCLK_66 0x0
|
||
|
#define QIXIS_SYSCLK_83 0x1
|
||
|
#define QIXIS_SYSCLK_100 0x2
|
||
|
#define QIXIS_SYSCLK_125 0x3
|
||
|
#define QIXIS_SYSCLK_133 0x4
|
||
|
#define QIXIS_SYSCLK_150 0x5
|
||
|
#define QIXIS_SYSCLK_160 0x6
|
||
|
#define QIXIS_SYSCLK_166 0x7
|
||
|
|
||
|
/* DDRCLK */
|
||
|
#define QIXIS_DDRCLK_66 0x0
|
||
|
#define QIXIS_DDRCLK_100 0x1
|
||
|
#define QIXIS_DDRCLK_125 0x2
|
||
|
#define QIXIS_DDRCLK_133 0x3
|
||
|
|
||
|
#endif /*__LS2_QDS_QIXIS_H__*/
|