ARM: tegra: reduce CSITE clock from 204M to 136M

The L4T kernel complains about a CSITE clock rate above 144MHz, presumably
because the HW is only characterized for a clock less than that. Adjust the
rate to 136MHz to avoid the warning and stay in spec.

Signed-off-by: Bryan Wu <pengw@nvidia.com>
(swarren, re-wrote commit description)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Bryan Wu 2016-08-11 16:28:27 -06:00 committed by Tom Warren
parent 06264a79b4
commit 027638d3cf
1 changed files with 1 additions and 1 deletions

View File

@ -16,7 +16,7 @@
#elif defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA114) || \
defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA210)
#define NVBL_PLLP_KHZ 408000
#define CSITE_KHZ 204000
#define CSITE_KHZ 136000
#else
#error "Unknown Tegra chip!"
#endif