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power: Remove old TPS65090 drivers 

Remove the old drivers (both the normal one and the cros_ec one) now that
we have new drivers that use driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2015-08-03 08:19:32 -06:00
parent 54abb000e3
commit 05bccbcd76
7 changed files with 0 additions and 607 deletions
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2
drivers/power/pmic/Makefile
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@ -18,8 +18,6 @@ obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o
obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o
obj-$(CONFIG_POWER_MAX77686) += pmic_max77686.o
obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o
obj-$(CONFIG_POWER_TPS65090_I2C) += pmic_tps65090.o
obj-$(CONFIG_POWER_TPS65090_EC) += pmic_tps65090_ec.o
obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
obj-$(CONFIG_POWER_TPS65218) += pmic_tps62362.o
obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o

310
drivers/power/pmic/pmic_tps65090.c
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@ -1,310 +0,0 @@
/*
* Copyright (c) 2012 The Chromium OS Authors.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <errno.h>
#include <fdtdec.h>
#include <i2c.h>
#include <power/pmic.h>
#include <power/tps65090_pmic.h>
DECLARE_GLOBAL_DATA_PTR;
#define TPS65090_NAME "TPS65090_PMIC"
/* TPS65090 register addresses */
enum {
REG_IRQ1 = 0,
REG_CG_CTRL0 = 4,
REG_CG_STATUS1 = 0xa,
REG_FET1_CTRL = 0x0f,
REG_FET2_CTRL,
REG_FET3_CTRL,
REG_FET4_CTRL,
REG_FET5_CTRL,
REG_FET6_CTRL,
REG_FET7_CTRL,
TPS65090_NUM_REGS,
};
enum {
IRQ1_VBATG = 1 << 3,
CG_CTRL0_ENC_MASK = 0x01,
MAX_FET_NUM = 7,
MAX_CTRL_READ_TRIES = 5,
/* TPS65090 FET_CTRL register values */
FET_CTRL_TOFET = 1 << 7, /* Timeout, startup, overload */
FET_CTRL_PGFET = 1 << 4, /* Power good for FET status */
FET_CTRL_WAIT = 3 << 2, /* Overcurrent timeout max */
FET_CTRL_ADENFET = 1 << 1, /* Enable output auto discharge */
FET_CTRL_ENFET = 1 << 0, /* Enable FET */
};
/**
* Checks for a valid FET number
*
* @param fet_id FET number to check
* @return 0 if ok, -EINVAL if FET value is out of range
*/
static int tps65090_check_fet(unsigned int fet_id)
{
if (fet_id == 0 || fet_id > MAX_FET_NUM) {
debug("parameter fet_id is out of range, %u not in 1 ~ %u\n",
fet_id, MAX_FET_NUM);
return -EINVAL;
}
return 0;
}
/**
* Set the power state for a FET
*
* @param pmic pmic structure for the tps65090
* @param fet_id Fet number to set (1..MAX_FET_NUM)
* @param set 1 to power on FET, 0 to power off
* @return -EIO if we got a comms error, -EAGAIN if the FET failed to
* change state. If all is ok, returns 0.
*/
static int tps65090_fet_set(struct pmic *pmic, int fet_id, bool set)
{
int retry;
u32 reg, value;
value = FET_CTRL_ADENFET | FET_CTRL_WAIT;
if (set)
value |= FET_CTRL_ENFET;
if (pmic_reg_write(pmic, REG_FET1_CTRL + fet_id - 1, value))
return -EIO;
/* Try reading until we get a result */
for (retry = 0; retry < MAX_CTRL_READ_TRIES; retry++) {
if (pmic_reg_read(pmic, REG_FET1_CTRL + fet_id - 1, &reg))
return -EIO;
/* Check that the fet went into the expected state */
if (!!(reg & FET_CTRL_PGFET) == set)
return 0;
/* If we got a timeout, there is no point in waiting longer */
if (reg & FET_CTRL_TOFET)
break;
mdelay(1);
}
debug("FET %d: Power good should have set to %d but reg=%#02x\n",
fet_id, set, reg);
return -EAGAIN;
}
int tps65090_fet_enable(unsigned int fet_id)
{
struct pmic *pmic;
ulong start;
int loops;
int ret;
ret = tps65090_check_fet(fet_id);
if (ret)
return ret;
pmic = pmic_get(TPS65090_NAME);
if (!pmic)
return -EACCES;
start = get_timer(0);
for (loops = 0;; loops++) {
ret = tps65090_fet_set(pmic, fet_id, true);
if (!ret)
break;
if (get_timer(start) > 100)
break;
/* Turn it off and try again until we time out */
tps65090_fet_set(pmic, fet_id, false);
}
if (ret)
debug("%s: FET%d failed to power on: time=%lums, loops=%d\n",
__func__, fet_id, get_timer(start), loops);
else if (loops)
debug("%s: FET%d powered on after %lums, loops=%d\n",
__func__, fet_id, get_timer(start), loops);
/*
* Unfortunately, there are some conditions where the power
* good bit will be 0, but the fet still comes up. One such
* case occurs with the lcd backlight. We'll just return 0 here
* and assume that the fet will eventually come up.
*/
if (ret == -EAGAIN)
ret = 0;
return ret;
}
int tps65090_fet_disable(unsigned int fet_id)
{
struct pmic *pmic;
int ret;
ret = tps65090_check_fet(fet_id);
if (ret)
return ret;
pmic = pmic_get(TPS65090_NAME);
if (!pmic)
return -EACCES;
ret = tps65090_fet_set(pmic, fet_id, false);
return ret;
}
int tps65090_fet_is_enabled(unsigned int fet_id)
{
struct pmic *pmic;
u32 reg;
int ret;
ret = tps65090_check_fet(fet_id);
if (ret)
return ret;
pmic = pmic_get(TPS65090_NAME);
if (!pmic)
return -ENODEV;
ret = pmic_reg_read(pmic, REG_FET1_CTRL + fet_id - 1, &reg);
if (ret) {
debug("fail to read FET%u_CTRL register over I2C", fet_id);
return -EIO;
}
return reg & FET_CTRL_ENFET;
}
int tps65090_get_charging(void)
{
struct pmic *pmic;
u32 val;
int ret;
pmic = pmic_get(TPS65090_NAME);
if (!pmic)
return -EACCES;
ret = pmic_reg_read(pmic, REG_CG_CTRL0, &val);
if (ret)
return ret;
return !!(val & CG_CTRL0_ENC_MASK);
}
static int tps65090_charger_state(struct pmic *pmic, int state,
int current)
{
u32 val;
int ret;
ret = pmic_reg_read(pmic, REG_CG_CTRL0, &val);
if (!ret) {
if (state == PMIC_CHARGER_ENABLE)
val |= CG_CTRL0_ENC_MASK;
else
val &= ~CG_CTRL0_ENC_MASK;
ret = pmic_reg_write(pmic, REG_CG_CTRL0, val);
}
if (ret) {
debug("%s: Failed to read/write register\n", __func__);
return ret;
}
return 0;
}
int tps65090_get_status(void)
{
struct pmic *pmic;
u32 val;
int ret;
pmic = pmic_get(TPS65090_NAME);
if (!pmic)
return -EACCES;
ret = pmic_reg_read(pmic, REG_CG_STATUS1, &val);
if (ret)
return ret;
return val;
}
static int tps65090_charger_bat_present(struct pmic *pmic)
{
u32 val;
int ret;
ret = pmic_reg_read(pmic, REG_IRQ1, &val);
if (ret)
return ret;
return !!(val & IRQ1_VBATG);
}
static struct power_chrg power_chrg_pmic_ops = {
.chrg_bat_present = tps65090_charger_bat_present,
.chrg_state = tps65090_charger_state,
};
int tps65090_init(void)
{
struct pmic *p;
int bus;
int addr;
const void *blob = gd->fdt_blob;
int node, parent;
node = fdtdec_next_compatible(blob, 0, COMPAT_TI_TPS65090);
if (node < 0) {
debug("PMIC: No node for PMIC Chip in device tree\n");
debug("node = %d\n", node);
return -ENODEV;
}
parent = fdt_parent_offset(blob, node);
if (parent < 0) {
debug("%s: Cannot find node parent\n", __func__);
return -EINVAL;
}
bus = i2c_get_bus_num_fdt(parent);
if (bus < 0) {
debug("%s: Cannot find I2C bus\n", __func__);
return -ENOENT;
}
addr = fdtdec_get_int(blob, node, "reg", TPS65090_I2C_ADDR);
p = pmic_alloc();
if (!p) {
printf("%s: POWER allocation error!\n", __func__);
return -ENOMEM;
}
p->name = TPS65090_NAME;
p->bus = bus;
p->interface = PMIC_I2C;
p->number_of_regs = TPS65090_NUM_REGS;
p->hw.i2c.addr = addr;
p->hw.i2c.tx_num = 1;
p->chrg = &power_chrg_pmic_ops;
puts("TPS65090 PMIC init\n");
return 0;
}

218
drivers/power/pmic/pmic_tps65090_ec.c
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@ -1,218 +0,0 @@
/*
* Copyright (c) 2013 The Chromium OS Authors.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <cros_ec.h>
#include <errno.h>
#include <power/tps65090_pmic.h>
DECLARE_GLOBAL_DATA_PTR;
#define TPS65090_ADDR 0x48
static struct tps65090 {
struct cros_ec_dev *dev; /* The CROS_EC device */
} config;
/* TPS65090 register addresses */
enum {
REG_IRQ1 = 0,
REG_CG_CTRL0 = 4,
REG_CG_STATUS1 = 0xa,
REG_FET1_CTRL = 0x0f,
REG_FET2_CTRL,
REG_FET3_CTRL,
REG_FET4_CTRL,
REG_FET5_CTRL,
REG_FET6_CTRL,
REG_FET7_CTRL,
TPS65090_NUM_REGS,
};
enum {
IRQ1_VBATG = 1 << 3,
CG_CTRL0_ENC_MASK = 0x01,
MAX_FET_NUM = 7,
MAX_CTRL_READ_TRIES = 5,
/* TPS65090 FET_CTRL register values */
FET_CTRL_TOFET = 1 << 7, /* Timeout, startup, overload */
FET_CTRL_PGFET = 1 << 4, /* Power good for FET status */
FET_CTRL_WAIT = 3 << 2, /* Overcurrent timeout max */
FET_CTRL_ADENFET = 1 << 1, /* Enable output auto discharge */
FET_CTRL_ENFET = 1 << 0, /* Enable FET */
};
/**
* tps65090_read - read a byte from tps6090
*
* @param reg The register address to read from.
* @param val We'll return value value read here.
* @return 0 if ok; error if EC returns failure.
*/
static int tps65090_read(u32 reg, u8 *val)
{
return cros_ec_i2c_xfer_old(config.dev, TPS65090_ADDR, reg, 1,
val, 1, true);
}
/**
* tps65090_write - write a byte to tps6090
*
* @param reg The register address to write to.
* @param val The value to write.
* @return 0 if ok; error if EC returns failure.
*/
static int tps65090_write(u32 reg, u8 val)
{
return cros_ec_i2c_xfer_old(config.dev, TPS65090_ADDR, reg, 1,
&val, 1, false);
}
/**
* Checks for a valid FET number
*
* @param fet_id FET number to check
* @return 0 if ok, -EINVAL if FET value is out of range
*/
static int tps65090_check_fet(unsigned int fet_id)
{
if (fet_id == 0 || fet_id > MAX_FET_NUM) {
debug("parameter fet_id is out of range, %u not in 1 ~ %u\n",
fet_id, MAX_FET_NUM);
return -EINVAL;
}
return 0;
}
/**
* Set the power state for a FET
*
* @param fet_id Fet number to set (1..MAX_FET_NUM)
* @param set 1 to power on FET, 0 to power off
* @return -EIO if we got a comms error, -EAGAIN if the FET failed to
* change state. If all is ok, returns 0.
*/
static int tps65090_fet_set(int fet_id, bool set)
{
int retry;
u8 reg, value;
value = FET_CTRL_ADENFET | FET_CTRL_WAIT;
if (set)
value |= FET_CTRL_ENFET;
if (tps65090_write(REG_FET1_CTRL + fet_id - 1, value))
return -EIO;
/* Try reading until we get a result */
for (retry = 0; retry < MAX_CTRL_READ_TRIES; retry++) {
if (tps65090_read(REG_FET1_CTRL + fet_id - 1, &reg))
return -EIO;
/* Check that the fet went into the expected state */
if (!!(reg & FET_CTRL_PGFET) == set)
return 0;
/* If we got a timeout, there is no point in waiting longer */
if (reg & FET_CTRL_TOFET)
break;
mdelay(1);
}
debug("FET %d: Power good should have set to %d but reg=%#02x\n",
fet_id, set, reg);
return -EAGAIN;
}
int tps65090_fet_enable(unsigned int fet_id)
{
ulong start;
int loops;
int ret;
ret = tps65090_check_fet(fet_id);
if (ret)
return ret;
start = get_timer(0);
for (loops = 0;; loops++) {
ret = tps65090_fet_set(fet_id, true);
if (!ret)
break;
if (get_timer(start) > 100)
break;
/* Turn it off and try again until we time out */
tps65090_fet_set(fet_id, false);
}
if (ret) {
debug("%s: FET%d failed to power on: time=%lums, loops=%d\n",
__func__, fet_id, get_timer(start), loops);
} else if (loops) {
debug("%s: FET%d powered on after %lums, loops=%d\n",
__func__, fet_id, get_timer(start), loops);
}
/*
* Unfortunately, there are some conditions where the power
* good bit will be 0, but the fet still comes up. One such
* case occurs with the lcd backlight. We'll just return 0 here
* and assume that the fet will eventually come up.
*/
if (ret == -EAGAIN)
ret = 0;
return ret;
}
int tps65090_fet_disable(unsigned int fet_id)
{
int ret;
ret = tps65090_check_fet(fet_id);
if (ret)
return ret;
ret = tps65090_fet_set(fet_id, false);
return ret;
}
int tps65090_fet_is_enabled(unsigned int fet_id)
{
u8 reg = 0;
int ret;
ret = tps65090_check_fet(fet_id);
if (ret)
return ret;
ret = tps65090_read(REG_FET1_CTRL + fet_id - 1, &reg);
if (ret) {
debug("fail to read FET%u_CTRL register over I2C", fet_id);
return -EIO;
}
return reg & FET_CTRL_ENFET;
}
int tps65090_init(void)
{
puts("TPS65090 PMIC EC init\n");
config.dev = board_get_cros_ec_dev();
if (!config.dev) {
debug("%s: no cros_ec device: cannot init tps65090\n",
__func__);
return -ENODEV;
}
return 0;
}

2
include/configs/peach-pit.h
View File

@ -34,8 +34,6 @@
#define CONFIG_VIDEO_PARADE
#define CONFIG_POWER_TPS65090_EC
/* DRAM Memory Banks */
#define CONFIG_NR_DRAM_BANKS 4
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */

1
include/fdtdec.h
View File

@ -170,7 +170,6 @@ enum fdt_compat_id {
COMPAT_INFINEON_SLB9645_TPM, /* Infineon SLB9645 TPM */
COMPAT_SAMSUNG_EXYNOS5_I2C, /* Exynos5 High Speed I2C Controller */
COMPAT_SANDBOX_LCD_SDL, /* Sandbox LCD emulation with SDL */
COMPAT_TI_TPS65090, /* Texas Instrument TPS65090 */
COMPAT_NXP_PTN3460, /* NXP PTN3460 DP/LVDS bridge */
COMPAT_SAMSUNG_EXYNOS_SYSMMU, /* Exynos sysmmu */
COMPAT_PARADE_PS8625, /* Parade PS8622 EDP->LVDS bridge */

73
include/power/tps65090_pmic.h
View File

@ -1,73 +0,0 @@
/*
* Copyright (c) 2012 The Chromium OS Authors.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __TPS65090_PMIC_H_
#define __TPS65090_PMIC_H_
/* I2C device address for TPS65090 PMU */
#define TPS65090_I2C_ADDR 0x48
enum {
/* Status register fields */
TPS65090_ST1_OTC = 1 << 0,
TPS65090_ST1_OCC = 1 << 1,
TPS65090_ST1_STATE_SHIFT = 4,
TPS65090_ST1_STATE_MASK = 0xf << TPS65090_ST1_STATE_SHIFT,
};
/**
* Enable FET
*
* @param fet_id FET ID, value between 1 and 7
* @return 0 on success, non-0 on failure
*/
int tps65090_fet_enable(unsigned int fet_id);
/**
* Disable FET
*
* @param fet_id FET ID, value between 1 and 7
* @return 0 on success, non-0 on failure
*/
int tps65090_fet_disable(unsigned int fet_id);
/**
* Is FET enabled?
*
* @param fet_id FET ID, value between 1 and 7
* @return 1 enabled, 0 disabled, negative value on failure
*/
int tps65090_fet_is_enabled(unsigned int fet_id);
/**
* Enable / disable the battery charger
*
* @param enable 0 to disable charging, non-zero to enable
*/
int tps65090_set_charge_enable(int enable);
/**
* Check whether we have enabled battery charging
*
* @return 1 if enabled, 0 if disabled
*/
int tps65090_get_charging(void);
/**
* Return the value of the status register
*
* @return status register value, or -1 on error
*/
int tps65090_get_status(void);
/**
* Initialize the TPS65090 PMU.
*
* @return 0 on success, non-0 on failure
*/
int tps65090_init(void);
#endif /* __TPS65090_PMIC_H_ */

1
lib/fdtdec.c
View File

@ -62,7 +62,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(INFINEON_SLB9645_TPM, "infineon,slb9645tt"),
COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
COMPAT(TI_TPS65090, "ti,tps65090"),
COMPAT(COMPAT_NXP_PTN3460, "nxp,ptn3460"),
COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
COMPAT(PARADE_PS8625, "parade,ps8625"),