Merge branch 'master' into next
This commit is contained in:
Wolfgang Denk
commit
0a9463e935
154
CHANGELOG
154
CHANGELOG
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|
@ -1,3 +1,157 @@
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commit 161e4ae46046282fde6a69a0f1f80965f2a1b6f4
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Author: Heiko Schocher <hs@denx.de>
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Date: Thu Jun 17 07:01:40 2010 +0200
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powerpc: fix wrong comment at GOT definitions
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r12 is used for accessing the GOT not r14. Fix this in the
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comment.
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Signed-off-by: Heiko Schocher <hs@denx.de>
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commit 7030d56b7946c8db2e8082a9b84cd69b9540a0ca
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Author: Becky Bruce <beckyb@kernel.crashing.org>
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Date: Thu Jun 17 11:37:27 2010 -0500
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MAKEALL: Add missing powerpc 36-bit targets
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We were missing 8641HPCN_36BIT and MPC8536DS_36BIT.
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Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
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commit e03b4d296b27790de3b25edd32784d20538240d8
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Author: Anatolij Gustschin <agust@denx.de>
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Date: Sat Jun 26 00:39:28 2010 +0200
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Fix compiler warnings for EVB64260, P3G4 and ZUMA
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Fix following warnings:
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$ ./MAKEALL EVB64260 P3G4 ZUMA
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Configuring for EVB64260 board...
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mpsc.c: In function 'mpsc_putchar_early':
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mpsc.c:121: warning: dereferencing type-punned pointer will break strict-aliasing rules
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mpsc.c:127: warning: dereferencing type-punned pointer will break strict-aliasing rules
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...
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
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commit 9fb3b5085787baad8a133e347ad12c5b3a022e98
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Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
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Date: Mon Jun 28 22:44:49 2010 +0400
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EHCI: zero out QH transfer overlay in ehci_submit_async()
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ehci_submit_async() doesn't really zero out the QH transfer overlay (as the EHCI
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specification suggests) which leads to the controller seeing the "token" field
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as the previous call has left it, i.e.:
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- if a timeout occured on the previous call (Active bit left as 1), controller
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incorrectly tries to complete a previous transaction on a newly programmed
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endpoint;
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- if a halt occured on the previous call (Halted bit set to 1), controller just
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ignores the newly programmed TD(s) and the function then keeps returning error
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ad infinitum.
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This turned out to be caused by the wrong orger of the arguments to the memset()
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call in ehci_alloc(), so the allocated TDs weren't cleared either.
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While at it, stop needlessly initializing the alternate next TD pointer in the
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QH transfer overlay...
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Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
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Acked-by: Remy Bohmer <linux@bohmer.net>
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commit 0d7f4abcf6bbef06504c82e03f11054468262430
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Author: Remy Bohmer <linux@bohmer.net>
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Date: Thu Jun 17 21:17:08 2010 +0200
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Fix console_buffer size conflict error.
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The console_buffer size is declared in common/main.c as
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-- char console_buffer[CONFIG_SYS_CBSIZE + 1];
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so this extern definition is wrong.
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Signed-off-by: Remy Bohmer <linux@bohmer.net>
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commit 38c38c344c200ee90cfd243671473c449b6f0815
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Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
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Date: Tue Jun 22 12:50:46 2010 +0530
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85xx/p1_p2_rdb: Added RevD board version support
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- Also modified the code to use io accessors.
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Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
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Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
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Acked-by: Kumar Gala <galak@kernel.crashing.org>
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commit c987f4753b0afadb38acd7e61df7ba11e8a0203f
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Author: Felix Radensky <felix@embedded-sol.com>
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Date: Mon Jun 28 01:57:39 2010 +0300
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tsec: Fix eTSEC2 link problem on P2020RDB
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On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII.
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Current TBI PHY settings for SGMII mode cause link problems on
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this platform, link never comes up.
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Fix this by making TBI PHY settings configurable and add a working
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configuration for P2020RDB.
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Signed-off-by: Felix Radensky <felix@embedded-sol.com>
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Acked-by: Andy Fleming <afleming@freescale.com>
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Acked-by: Peter Tyser <ptyser@xes-inc.com>
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Tested-by: Peter Tyser <ptyser@xes-inc.com>
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commit d3bee08332fbc9cc5b6dc22ecd34050a85d44d0a
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Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
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Date: Wed Jun 23 19:32:28 2010 +0530
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85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHz
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Use a slighly larger value of CLK_CTRL for DDR at 667MHz
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which fixes random crashes while linux booting.
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Applicable for both NAND and NOR boot.
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Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
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Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
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Acked-by: Andy Fleming <afleming@freescale.com>
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commit cdc6363f423900645265563d705a0a5a964ae40c
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Author: Poonam Aggrwal <poonam.aggrwal@freescale.com>
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Date: Wed Jun 23 19:42:07 2010 +0530
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85xx/p1_p2_rdb: not able to modify "$bootfile" environment variable
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Because the variable was getting defined twice.
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Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
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Acked-by: Andy Fleming <afleming@freescale.com>
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commit 4ccd5510e50b5675227a1fe0e5ca099d333f637d
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Author: Wolfgang Denk <wd@denx.de>
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Date: Tue Jun 29 01:33:35 2010 +0200
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MPC512x: workaround data corruption for unaligned local bus accesses
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Commit 460c2ce3 "MPC5200: workaround data corruption for unaligned
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local bus accesses" fixed the problem for MPC5200 only, but MPC512x is
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affected as well, so apply the same fix here, too.
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Cc: Detlev Zundel <dzu@denx.de>
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Cc: Anatolij Gustschin <agust@denx.de>
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Acked-by: Detlev Zundel <dzu@denx.de>
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commit 482126e27b3dbf0e69a6445da8b94b3551adf05d
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Author: Wolfgang Denk <wd@denx.de>
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Date: Wed Jun 23 20:50:54 2010 +0200
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Prepare v2010.06-rc3
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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commit 460c2ce362e56890c2a029e2c3b1ff2796c7fc54
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Author: Wolfgang Denk <wd@denx.de>
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Date: Mon Jun 21 22:29:59 2010 +0200
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2
MAKEALL
2
MAKEALL
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@ -393,6 +393,7 @@ LIST_85xx=" \
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MPC8536DS_NAND \
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MPC8536DS_SDCARD \
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MPC8536DS_SPIFLASH \
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MPC8536DS_36BIT \
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MPC8540ADS \
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MPC8540EVAL \
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MPC8541CDS \
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@ -453,6 +454,7 @@ LIST_85xx=" \
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LIST_86xx=" \
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MPC8610HPCD \
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MPC8641HPCN_36BIT \
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MPC8641HPCN \
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sbc8641d \
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XPEDITE5170 \
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2
Makefile
2
Makefile
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@ -24,7 +24,7 @@
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VERSION = 2010
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PATCHLEVEL = 06
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SUBLEVEL =
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EXTRAVERSION = -rc3
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EXTRAVERSION =
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ifneq "$(SUBLEVEL)" ""
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U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
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else
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@ -30,11 +30,6 @@ SOBJS = io.o firmware_sc_task_bestcomm.impl.o
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COBJS = i2c.o traps.o cpu.o cpu_init.o ide.o interrupts.o \
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loadtask.o pci_mpc5200.o serial.o speed.o usb_ohci.o usb.o
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# Workaround for local bus unaligned access problem on MPC5200
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#ifdef CONFIG_MPC5200
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COBJS += memcpy_mpc5200.o
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#endif
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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START := $(addprefix $(obj),$(START))
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|
|
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@ -40,14 +40,22 @@ COBJS-y += interrupts.o
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COBJS-$(CONFIG_CMD_KGDB) += kgdb.o
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COBJS-y += time.o
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
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# Workaround for local bus unaligned access problem on MPC5200
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# Workaround for local bus unaligned access problems
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# on MPC512x and MPC5200
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ifdef CONFIG_MPC512X
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$(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy
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COBJS-y += memcpy_mpc5200.o
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endif
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ifdef CONFIG_MPC5200
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$(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy
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COBJS-y += memcpy_mpc5200.o
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endif
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COBJS += $(sort $(COBJS-y))
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
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$(LIB): $(obj).depend $(OBJS)
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@if ! $(CROSS_COMPILE)readelf -S $(OBJS) | grep -q '\.fixup.*PROGBITS';\
|
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then \
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|
|
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|||
|
|
@ -88,7 +88,7 @@ static void galsdma_enable_rx(void);
|
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||||
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||||
/* GT64240A errata: cant read MPSC/BRG registers... so make mirrors in ram for read/modify write */
|
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#define MIRROR_HACK ((struct _tag_mirror_hack *)&(gd->mirror_hack))
|
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#define MIRROR_HACK ((struct _tag_mirror_hack *)&(gd->mirror_hack[0]))
|
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||||
#define GT_REG_WRITE_MIRROR_G(a,d) {MIRROR_HACK->a ## _M = d; GT_REG_WRITE(a,d);}
|
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#define GTREGREAD_MIRROR_G(a) (MIRROR_HACK->a ## _M)
|
||||
|
|
|
|||
|
|
@ -76,7 +76,7 @@ extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
|
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#define CONFIG_SYS_DDR_TIMING_0_667 0x55770802
|
||||
#define CONFIG_SYS_DDR_TIMING_1_667 0x5f599543
|
||||
#define CONFIG_SYS_DDR_TIMING_2_667 0x0fa074d1
|
||||
#define CONFIG_SYS_DDR_CLK_CTRL_667 0x02800000
|
||||
#define CONFIG_SYS_DDR_CLK_CTRL_667 0x03000000
|
||||
#define CONFIG_SYS_DDR_MODE_1_667 0x00040852
|
||||
#define CONFIG_SYS_DDR_MODE_2_667 0x00000000
|
||||
#define CONFIG_SYS_DDR_INTERVAL_667 0x0a280100
|
||||
|
|
|
|||
|
|
@ -54,6 +54,7 @@ DECLARE_GLOBAL_DATA_PTR;
|
|||
#define BOARDREV_MASK 0x10100000
|
||||
#define BOARDREV_B 0x10100000
|
||||
#define BOARDREV_C 0x00100000
|
||||
#define BOARDREV_D 0x00000000
|
||||
|
||||
#define SYSCLK_66 66666666
|
||||
#define SYSCLK_50 50000000
|
||||
|
|
@ -64,7 +65,7 @@ unsigned long get_board_sys_clk(ulong dummy)
|
|||
volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
|
||||
u32 val_gpdat, sysclk_gpio, board_rev_gpio;
|
||||
|
||||
val_gpdat = pgpio->gpdat;
|
||||
val_gpdat = in_be32(&pgpio->gpdat);
|
||||
sysclk_gpio = val_gpdat & SYSCLK_MASK;
|
||||
board_rev_gpio = val_gpdat & BOARDREV_MASK;
|
||||
if (board_rev_gpio == BOARDREV_C) {
|
||||
|
|
@ -77,6 +78,11 @@ unsigned long get_board_sys_clk(ulong dummy)
|
|||
return SYSCLK_66;
|
||||
else
|
||||
return SYSCLK_50;
|
||||
} else if (board_rev_gpio == BOARDREV_D) {
|
||||
if(sysclk_gpio == 0)
|
||||
return SYSCLK_66;
|
||||
else
|
||||
return SYSCLK_100;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -100,12 +106,14 @@ int checkboard (void)
|
|||
char board_rev = 0;
|
||||
struct cpu_type *cpu;
|
||||
|
||||
val_gpdat = pgpio->gpdat;
|
||||
val_gpdat = in_be32(&pgpio->gpdat);
|
||||
board_rev_gpio = val_gpdat & BOARDREV_MASK;
|
||||
if (board_rev_gpio == BOARDREV_C)
|
||||
board_rev = 'C';
|
||||
else if (board_rev_gpio == BOARDREV_B)
|
||||
board_rev = 'B';
|
||||
else if (board_rev_gpio == BOARDREV_D)
|
||||
board_rev = 'D';
|
||||
else
|
||||
panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio);
|
||||
|
||||
|
|
@ -159,6 +167,7 @@ int board_eth_init(bd_t *bis)
|
|||
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
|
||||
int num = 0;
|
||||
char *tmp;
|
||||
u32 pordevsr;
|
||||
unsigned int vscfw_addr;
|
||||
|
||||
#ifdef CONFIG_TSEC1
|
||||
|
|
@ -171,7 +180,8 @@ int board_eth_init(bd_t *bis)
|
|||
#endif
|
||||
#ifdef CONFIG_TSEC3
|
||||
SET_STD_TSEC_INFO(tsec_info[num], 3);
|
||||
if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
|
||||
pordevsr = in_be32(&gur->pordevsr);
|
||||
if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
|
||||
tsec_info[num].flags |= TSEC_SGMII;
|
||||
num++;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1018,7 +1018,7 @@ static void get_user_input(struct in_str *i)
|
|||
fflush(stdout);
|
||||
i->p = the_command;
|
||||
#else
|
||||
extern char console_buffer[CONFIG_SYS_CBSIZE];
|
||||
extern char console_buffer[];
|
||||
int n;
|
||||
static char the_command[CONFIG_SYS_CBSIZE];
|
||||
|
||||
|
|
|
|||
|
|
@ -281,12 +281,16 @@ static uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs,
|
|||
| TBIANA_FULL_DUPLEX \
|
||||
)
|
||||
|
||||
/* Force the TBI PHY into 1000Mbps full duplex when in SGMII mode */
|
||||
/* By default force the TBI PHY into 1000Mbps full duplex when in SGMII mode */
|
||||
#ifndef CONFIG_TSEC_TBICR_SETTINGS
|
||||
#define TBICR_SETTINGS ( \
|
||||
TBICR_PHY_RESET \
|
||||
| TBICR_FULL_DUPLEX \
|
||||
| TBICR_SPEED1_SET \
|
||||
)
|
||||
#else
|
||||
#define TBICR_SETTINGS CONFIG_TSEC_TBICR_SETTINGS
|
||||
#endif /* CONFIG_TSEC_TBICR_SETTINGS */
|
||||
|
||||
/* Configure the TBI for SGMII operation */
|
||||
static void tsec_configure_serdes(struct tsec_private *priv)
|
||||
|
|
|
|||
|
|
@ -275,7 +275,7 @@ static void *ehci_alloc(size_t sz, size_t align)
|
|||
return NULL;
|
||||
}
|
||||
|
||||
memset(p, sz, 0);
|
||||
memset(p, 0, sz);
|
||||
return p;
|
||||
}
|
||||
|
||||
|
|
@ -350,7 +350,6 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
|
|||
(dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
|
||||
qh->qh_endpt2 = cpu_to_hc32(endpt);
|
||||
qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
|
||||
qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
|
||||
|
||||
td = NULL;
|
||||
tdp = &qh->qh_overlay.qt_next;
|
||||
|
|
|
|||
|
|
@ -425,6 +425,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
|
|||
#define CONFIG_ETHPRIME "eTSEC1"
|
||||
|
||||
#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
|
||||
|
||||
/* TBI PHY configuration for SGMII mode */
|
||||
#define CONFIG_TSEC_TBICR_SETTINGS ( \
|
||||
TBICR_PHY_RESET \
|
||||
| TBICR_ANEG_ENABLE \
|
||||
| TBICR_FULL_DUPLEX \
|
||||
| TBICR_SPEED1_SET \
|
||||
)
|
||||
|
||||
#endif /* CONFIG_TSEC_ENET */
|
||||
|
||||
/*
|
||||
|
|
@ -568,7 +577,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
|
|||
"netdev=eth0\0" \
|
||||
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
|
||||
"loadaddr=1000000\0" \
|
||||
"bootfile=uImage\0" \
|
||||
"tftpflash=tftpboot $loadaddr $uboot; " \
|
||||
"protect off " MK_STR(TEXT_BASE) " +$filesize; " \
|
||||
"erase " MK_STR(TEXT_BASE) " +$filesize; " \
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@
|
|||
*
|
||||
* Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es
|
||||
*
|
||||
* Uses r14 to access the GOT
|
||||
* Uses r12 to access the GOT
|
||||
*/
|
||||
|
||||
#define START_GOT \
|
||||
|
|
|
|||
Loading…
Reference in New Issue