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board/w7o/fpga.c: make (mostly) checkpatch clean 

Just reformated the code.  No attempts were made to clean up warnings
about "Use of volatile is usually wrong" or "externs should be avoided".

Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk 2011-12-07 12:19:23 +00:00
parent fb82fd7a32
commit 100a4dcefd
1 changed files with 292 additions and 285 deletions
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59
board/w7o/fpga.c
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@ -54,9 +54,7 @@ fpga_img_write(unsigned long *src, unsigned long len, unsigned short *daddr)
int
fpgaDownload(unsigned char *saddr,
unsigned long size,
unsigned short *daddr)
fpgaDownload(unsigned char *saddr, unsigned long size, unsigned short *daddr)
{
int i; /* index, intr disable flag */
int start; /* timer */
@ -86,8 +84,8 @@ fpgaDownload(unsigned char *saddr,
/* Setup timeout timer */
start = get_timer(0);
/* Wait for FPGA init line */
while(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT) { /* Wait INIT line low */
/* Wait for FPGA init line to go low */
while (in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT) {
/* Check for timeout - 100us max, so use 3ms */
if (get_timer(start) > 3) {
printf(" failed to start init.\n");
@ -102,8 +100,8 @@ fpgaDownload(unsigned char *saddr,
grego |= GPIO_XCV_PROG; /* PROG line high */
out32(PPC405GP_GPIO0_OR, grego);
/* Wait for FPGA end of init period . */
while(!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT)) { /* Wait for INIT hi */
/* Wait for FPGA end of init period = init line go hi */
while (!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT)) {
/* Check for timeout */
if (get_timer(start) > 3) {
@ -161,7 +159,8 @@ fpgaDownload(unsigned char *saddr,
greg &= ~eirq; /* toggle irq/gpio */
mtdcr(CPC0_CR0, greg); /* ... just do it */
ndest = (unsigned short *)((char *)ndest + 0x00100000L); /* XXX - Next FPGA addr */
/* XXX - Next FPGA addr */
ndest = (unsigned short *) ((char *) ndest + 0x00100000L);
cnfg >>= 1; /* XXX - Next */
eirq >>= 1;
}
@ -179,8 +178,8 @@ fpgaDownload(unsigned char *saddr,
/* Setup timer */
start = get_timer(0);
/* Wait for FPGA end of programming period . */
while(!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_DONE)) { /* Test DONE low */
/* Wait for FPGA end of programming period = Test DONE low */
while (!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_DONE)) {
/* Check for timeout */
if (get_timer(start) > 3) {
@ -240,9 +239,9 @@ int init_fpga(void)
/*
* Get the file name pointer and length.
* filename length is next short
*/
fn_len = (*(unsigned short *)(buf+12) & 0xff); /* filename length
is next short */
fn_len = (*(unsigned short *) (buf + 12) & 0xff);
fn_buf = buf + 14;
/*
@ -252,7 +251,8 @@ int init_fpga(void)
xcv_len = len - 14 - fn_len; /* fpga image length */
/* Check for uninitialized FLASH */
if ((strncmp((char *)buf, "w7o", 3)!=0) || (len > 0x0007ffffL) || (len == 0))
if ((strncmp((char *) buf, "w7o", 3) != 0) || (len > 0x0007ffffL)
|| (len == 0))
goto bad_image;
/*
@ -268,7 +268,8 @@ int init_fpga(void)
printf("file name : ");
for (i = 0; i < fn_len; i++) {
bufchar = fn_buf[+i];
if (bufchar<' ' || bufchar>'~') bufchar = '.';
if (bufchar < ' ' || bufchar > '~')
bufchar = '.';
putc(bufchar);
}
@ -278,7 +279,8 @@ int init_fpga(void)
ptr = 15; /* Offset to ncd filename
length in fpga image */
j = xcv_buf[ptr]; /* Get len of ncd filename */
if (j > 32) goto bad_image;
if (j > 32)
goto bad_image;
ptr = ptr + j + 3; /* skip ncd filename string +
3 bytes more bytes */
@ -286,11 +288,13 @@ int init_fpga(void)
* output target device string
*/
j = xcv_buf[ptr++] - 1; /* len of targ str less term */
if (j > 32) goto bad_image;
if (j > 32)
goto bad_image;
printf("\n target : ");
for (i = 0; i < j; i++) {
bufchar = (xcv_buf[ptr++]);
if (bufchar<' ' || bufchar>'~') bufchar = '.';
if (bufchar < ' ' || bufchar > '~')
bufchar = '.';
putc(bufchar);
}
@ -300,20 +304,24 @@ int init_fpga(void)
ptr += 3; /* skip 2 bytes */
printf("\n synth time : ");
j = (xcv_buf[ptr++] - 1); /* len of date str less term */
if (j > 32) goto bad_image;
if (j > 32)
goto bad_image;
for (i = 0; i < j; i++) {
bufchar = (xcv_buf[ptr++]);
if (bufchar<' ' || bufchar>'~') bufchar = '.';
if (bufchar < ' ' || bufchar > '~')
bufchar = '.';
putc(bufchar);
}
ptr += 3; /* Skip 2 bytes */
printf(" - ");
j = (xcv_buf[ptr++] - 1); /* slen = targ dev str len */
if (j > 32) goto bad_image;
if (j > 32)
goto bad_image;
for (i = 0; i < j; i++) {
bufchar = (xcv_buf[ptr++]);
if (bufchar<' ' || bufchar>'~') bufchar = '.';
if (bufchar < ' ' || bufchar > '~')
bufchar = '.';
putc(bufchar);
}
@ -330,7 +338,8 @@ int init_fpga(void)
return retval;
bad_image:
printf("\n BAD FPGA image format @ %lx\n", flash_info[1].start[0]);
printf("\n BAD FPGA image format @ %lx\n",
flash_info[1].start[0]);
log_warn(ERR_XIMAGE);
done:
return retval;
@ -361,12 +370,10 @@ void test_fpga(unsigned short *daddr)
ndest[0x4801] = 0xaa55;
ndest[0x4802] = 0xc318;
if ((ndest[0x800] != 0x55aa) ||
(ndest[0x801] != 0xaa55) ||
(ndest[0x802] != 0xc318))
(ndest[0x801] != 0xaa55) || (ndest[0x802] != 0xc318))
log_warn(ERR_XRW1 + (2 * i)); /* Auto gen error code */
if ((ndest[0x4800] != 0x55aa) ||
(ndest[0x4801] != 0xaa55) ||
(ndest[0x4802] != 0xc318))
(ndest[0x4801] != 0xaa55) || (ndest[0x4802] != 0xc318))
log_warn(ERR_XRW2 + (2 * i)); /* Auto gen error code */
#else