arm,davinci: update for enbw_cmc board
- change gpio pin settings:
- gpio pin 6[13] (PLC reset) default value low
- gpio pin 6[0] (TPM reset) default value low
- 4 new GPIO pins
pin i/o name
- 3[9] input Board Type
- 2[7] input HW-ID0
- 2[6] input HW-ID1
- 2[3] input HW-ID2
- read board type and hw id from gpio pins on the enbw_cmc board,
and use board type for setting up different gpio pin settings.
- do not pass "davinci_mmc.use_dma=0" to linux, as MMC now
works with DMA.
- update logbuf support:
store post word in RTC scratch register
- add support for configuring KSZ8864RMN switch through
a config file on u-boot startup. For more infos see:
doc/README.switch_config
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
Heiko Schocher
Albert ARIBAUD
parent
2ab2810375
commit
14b9f16c40
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@ -35,6 +35,8 @@
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#include <mmc.h>
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#include <net.h>
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#include <netdev.h>
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#include <spi.h>
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#include <linux/ctype.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/da850_lowlevel.h>
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@ -86,16 +88,22 @@ static const struct pinmux_config enbw_pins[] = {
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{ pinmux(5), 1, 0 },
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{ pinmux(5), 1, 3 },
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{ pinmux(5), 1, 7 },
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{ pinmux(6), 1, 0 },
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{ pinmux(6), 1, 1 },
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{ pinmux(5), 1, 5 },
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{ pinmux(5), 1, 4 },
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{ pinmux(5), 1, 3 },
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{ pinmux(5), 1, 2 },
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{ pinmux(5), 1, 1 },
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{ pinmux(5), 1, 0 },
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{ pinmux(6), 8, 0 },
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{ pinmux(6), 8, 1 },
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{ pinmux(6), 8, 2 },
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{ pinmux(6), 8, 3 },
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{ pinmux(6), 1, 4 },
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{ pinmux(6), 8, 4 },
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{ pinmux(6), 8, 5 },
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{ pinmux(6), 1, 7 },
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{ pinmux(7), 8, 2 },
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{ pinmux(7), 1, 3 },
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{ pinmux(7), 1, 6 },
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{ pinmux(7), 8, 6 },
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{ pinmux(7), 1, 7 },
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{ pinmux(13), 8, 2 },
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{ pinmux(13), 8, 3 },
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@ -163,24 +171,37 @@ struct gpio_config {
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unsigned char value;
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};
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static const struct gpio_config enbw_gpio_config[] = {
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static const struct gpio_config enbw_gpio_config_hut[] = {
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{ "RS485 enable", 8, 11, 1, 0 },
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{ "RS485 iso", 8, 10, 1, 1 },
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{ "W2HUT RS485 Rx ena", 8, 9, 1, 0 },
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{ "W2HUT RS485 iso", 8, 8, 1, 1 },
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};
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static const struct gpio_config enbw_gpio_config_w[] = {
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{ "RS485 enable", 8, 11, 1, 0 },
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{ "RS485 iso", 8, 10, 1, 0 },
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{ "W2HUT RS485 Rx ena", 8, 9, 1, 0 },
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{ "W2HUT RS485 iso", 8, 8, 1, 0 },
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};
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static const struct gpio_config enbw_gpio_config[] = {
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{ "LAN reset", 7, 15, 1, 1 },
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{ "ena 11V PLC", 7, 14, 1, 0 },
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{ "ena 1.5V PLC", 7, 13, 1, 0 },
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{ "disable VBUS", 7, 12, 1, 1 },
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{ "PLC reset", 6, 13, 1, 1 },
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{ "PLC reset", 6, 13, 1, 0 },
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{ "LCM RS", 6, 12, 1, 0 },
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{ "LCM R/W", 6, 11, 1, 0 },
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{ "PLC pairing", 6, 10, 1, 1 },
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{ "PLC MDIO CLK", 6, 9, 1, 0 },
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{ "HK218", 6, 8, 1, 0 },
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{ "HK218 Rx", 6, 1, 1, 1 },
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{ "TPM reset", 6, 0, 1, 1 },
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{ "LCM E", 2, 2, 1, 1 },
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{ "TPM reset", 6, 0, 1, 0 },
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{ "Board-Type", 3, 9, 0, 0 },
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{ "HW-ID0", 2, 7, 0, 0 },
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{ "HW-ID1", 2, 6, 0, 0 },
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{ "HW-ID2", 2, 3, 0, 0 },
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{ "PV-IF RxD ena", 0, 15, 1, 1 },
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{ "LED1", 1, 15, 1, 1 },
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{ "LED2", 0, 1, 1, 1 },
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@ -229,33 +250,56 @@ static void enbw_cmc_switch(int port, int on)
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}
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}
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int board_init(void)
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static int enbw_cmc_init_gpio(const struct gpio_config *conf, int sz)
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{
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int i, ret;
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for (i = 0; i < sz; i++) {
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int gpio = conf[i].bank * 16 +
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conf[i].gpio;
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ret = gpio_request(gpio, conf[i].name);
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if (ret) {
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printf("%s: Could not get %s gpio\n", __func__,
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conf[i].name);
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return ret;
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}
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if (conf[i].out)
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gpio_direction_output(gpio,
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conf[i].value);
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else
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gpio_direction_input(gpio);
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}
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return 0;
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}
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int board_init(void)
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{
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int board_type, hw_id;
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#ifndef CONFIG_USE_IRQ
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irq_init();
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#endif
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/* address of boot parameters, not used as booting with DTT */
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gd->bd->bi_boot_params = 0;
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for (i = 0; i < ARRAY_SIZE(enbw_gpio_config); i++) {
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int gpio = enbw_gpio_config[i].bank * 16 +
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enbw_gpio_config[i].gpio;
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enbw_cmc_init_gpio(enbw_gpio_config, ARRAY_SIZE(enbw_gpio_config));
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ret = gpio_request(gpio, enbw_gpio_config[i].name);
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if (ret) {
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printf("%s: Could not get %s gpio\n", __func__,
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enbw_gpio_config[i].name);
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return -1;
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}
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if (enbw_gpio_config[i].out)
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gpio_direction_output(gpio,
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enbw_gpio_config[i].value);
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else
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gpio_direction_input(gpio);
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}
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/* detect HW version */
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board_type = gpio_get_value(CONFIG_ENBW_CMC_BOARD_TYPE);
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hw_id = gpio_get_value(CONFIG_ENBW_CMC_HW_ID_BIT0) +
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(gpio_get_value(CONFIG_ENBW_CMC_HW_ID_BIT1) << 1) +
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(gpio_get_value(CONFIG_ENBW_CMC_HW_ID_BIT2) << 2);
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printf("BOARD: CMC-%s hw id: %d\n", (board_type ? "w2" : "hut"),
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hw_id);
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if (board_type)
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enbw_cmc_init_gpio(enbw_gpio_config_w,
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ARRAY_SIZE(enbw_gpio_config_w));
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else
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enbw_cmc_init_gpio(enbw_gpio_config_hut,
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ARRAY_SIZE(enbw_gpio_config_hut));
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/* setup the SUSPSRC for ARM to control emulation suspend */
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clrbits_le32(&davinci_syscfg_regs->suspsrc,
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@ -267,14 +311,231 @@ int board_init(void)
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}
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#ifdef CONFIG_DRIVER_TI_EMAC
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#define KSZ_CMD_READ 0x03
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#define KSZ_CMD_WRITE 0x02
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#define KSZ_ID 0x95
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static int enbw_cmc_switch_read(struct spi_slave *spi, u8 reg, u8 *val)
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{
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unsigned long flags = SPI_XFER_BEGIN;
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int ret;
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int cmd_len;
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u8 cmd[2];
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cmd[0] = KSZ_CMD_READ;
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cmd[1] = reg;
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cmd_len = 2;
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ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
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if (ret) {
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debug("Failed to send command (%zu bytes): %d\n",
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cmd_len, ret);
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return -EINVAL;
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}
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flags |= SPI_XFER_END;
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*val = 0;
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cmd_len = 1;
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ret = spi_xfer(spi, cmd_len * 8, NULL, val, flags);
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if (ret) {
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debug("Failed to read (%zu bytes): %d\n",
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cmd_len, ret);
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return -EINVAL;
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}
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return 0;
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}
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static int enbw_cmc_switch_read_ident(struct spi_slave *spi)
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{
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int ret;
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u8 val;
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ret = enbw_cmc_switch_read(spi, 0, &val);
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if (ret) {
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debug("Failed to read\n");
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return -EINVAL;
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}
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if (val != KSZ_ID)
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return -EINVAL;
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return 0;
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}
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static int enbw_cmc_switch_write(struct spi_slave *spi, unsigned long reg,
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unsigned long val)
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{
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unsigned long flags = SPI_XFER_BEGIN;
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int ret;
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int cmd_len;
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u8 cmd[3];
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cmd[0] = KSZ_CMD_WRITE;
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cmd[1] = reg;
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cmd[2] = val;
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cmd_len = 3;
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flags |= SPI_XFER_END;
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ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
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if (ret) {
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debug("Failed to send command (%zu bytes): %d\n",
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cmd_len, ret);
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return -EINVAL;
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}
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udelay(1000);
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ret = enbw_cmc_switch_read(spi, reg, &cmd[0]);
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if (ret) {
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debug("Failed to read\n");
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return -EINVAL;
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}
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if (val != cmd[0])
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debug("warning: reg: %lx va: %x soll: %lx\n",
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reg, cmd[0], val);
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return 0;
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}
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static int enbw_cmc_eof(unsigned char *ptr)
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{
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if (*ptr == 0xff)
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return 1;
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return 0;
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}
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static char *enbw_cmc_getnewline(char *ptr)
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{
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while (*ptr != 0x0a) {
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ptr++;
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if (enbw_cmc_eof((unsigned char *)ptr))
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return NULL;
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}
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ptr++;
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return ptr;
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}
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static char *enbw_cmc_getvalue(char *ptr, int *value)
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{
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int end = 0;
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*value = -EINVAL;
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if (!isxdigit(*ptr))
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end = 1;
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while (end) {
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if ((*ptr == '#') || (*ptr == ';')) {
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ptr = enbw_cmc_getnewline(ptr);
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return ptr;
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}
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if (ptr != NULL) {
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if (isxdigit(*ptr)) {
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end = 0;
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} else if (*ptr == 0x0a) {
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ptr++;
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return ptr;
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} else {
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ptr++;
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if (enbw_cmc_eof((unsigned char *)ptr))
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return NULL;
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}
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} else {
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return NULL;
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}
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}
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*value = (int)simple_strtoul((const char *)ptr, &ptr, 16);
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ptr++;
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return ptr;
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}
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static int enbw_cmc_config_switch(unsigned long addr)
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{
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struct spi_slave *spi;
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char *ptr = (char *)addr;
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int value, reg;
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int ret;
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int bus, cs, max_hz, spi_mode;
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debug("configure switch with file on addr: 0x%lx\n", addr);
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bus = 0;
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cs = 0;
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max_hz = 1000000;
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spi_mode = 0;
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spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
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if (!spi) {
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printf("Failed to set up slave\n");
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return -EINVAL;
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}
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ret = spi_claim_bus(spi);
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if (ret) {
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debug("Failed to claim SPI bus: %d\n", ret);
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goto err_claim_bus;
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}
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ret = enbw_cmc_switch_read_ident(spi);
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if (ret)
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goto err_claim_bus;
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ptr = (char *)addr;
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while (ptr != NULL) {
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ptr = enbw_cmc_getvalue(ptr, ®);
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if (ptr != NULL) {
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ptr = enbw_cmc_getvalue(ptr, &value);
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if ((ptr != NULL) && (value >= 0))
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if (enbw_cmc_switch_write(spi, reg, value))
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goto err_read;
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}
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}
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return 0;
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err_read:
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spi_release_bus(spi);
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err_claim_bus:
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spi_free_slave(spi);
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return -EINVAL;
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}
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static int do_switch(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
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{
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unsigned long addr;
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if (argc < 2)
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return cmd_usage(cmdtp);
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addr = simple_strtoul(argv[1], NULL, 16);
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enbw_cmc_config_switch(addr);
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return 0;
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}
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U_BOOT_CMD(switch, 3, 1, do_switch,
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"switch addr",
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"[addr]"
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);
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/*
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* Initializes on-board ethernet controllers.
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*/
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int board_eth_init(bd_t *bis)
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{
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#ifdef CONFIG_DRIVER_TI_EMAC
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const char *s;
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size_t len;
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davinci_emac_mii_mode_sel(0);
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#endif /* CONFIG_DRIVER_TI_EMAC */
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/* send a config file to the switch */
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s = hwconfig_subarg("switch", "config", &len);
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if (len) {
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unsigned long addr = simple_strtoul(s, NULL, 16);
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enbw_cmc_config_switch(addr);
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}
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if (!davinci_emac_initialize()) {
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printf("Error: Ethernet init failed!\n");
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@ -546,6 +807,29 @@ ulong bootcount_load(void)
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}
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#endif
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ulong post_word_load(void)
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{
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struct davinci_rtc *reg =
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(struct davinci_rtc *)CONFIG_SYS_POST_WORD_ADDR;
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return in_be32(®->scratch2);
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}
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void post_word_store(ulong value)
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{
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struct davinci_rtc *reg =
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(struct davinci_rtc *)CONFIG_SYS_POST_WORD_ADDR;
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/*
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* write RTC kick register to enable write
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* for RTC Scratch registers. Cratch0 and 1 are
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* used for bootcount values.
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*/
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writel(RTC_KICK0R_WE, ®->kick0r);
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writel(RTC_KICK1R_WE, ®->kick1r);
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out_be32(®->scratch2, value);
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}
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void board_gpio_init(void)
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{
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struct davinci_gpio *gpio = davinci_gpio_bank01;
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@ -558,6 +842,19 @@ void board_gpio_init(void)
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clrbits_le32(&gpio->out_data, 0x8000407e);
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/* set LED 1 - 5 to state on */
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setbits_le32(&gpio->out_data, 0x8000001e);
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/*
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* set some gpio pins to low, this is needed early,
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* so we have no gpio Interface here
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* gpios:
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* 8[8] Mode PV select low
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* 8[9] Debug Rx Enable low
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* 8[10] Mode Select PV low
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* 8[11] Counter Interface RS485 Rx-Enable low
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*/
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gpio = davinci_gpio_bank8;
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clrbits_le32(&gpio->dir, 0x00000f00);
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clrbits_le32(&gpio->out_data, 0x0f00);
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}
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int board_late_init(void)
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|
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@ -0,0 +1,25 @@
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On the enbw_cmc board is a KSZ8864RMN switch which needs
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configured through spi before working. This is done on
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startup from u-boot through a config file stored at an
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address specified in the "hwconfig" environment variable,
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subcommand "config".
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For example on the enbw_cmc board:
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hwconfig=switch:lan=on,pwl=off,config=0x60160000
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The file has the following structure:
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- a comment starts with a '#' or a ';' and ends with a newline
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- The switch needs for its config a reg/value pair, so we
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have two columns in the file:
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reg : contains the register address
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value: contains a 8 bit register value
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This 2 columns are seperated through space or tab.
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example (minimal configuration on the enbw_cmc board):
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;reg value comment
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;-----------------------------------------
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0x01 0x00
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0x01 0x01 ; Start Switch with this configuration
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@ -101,6 +101,14 @@
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#define CONFIG_SYS_DTT_LOW_TEMP -30
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#define CONFIG_SYS_DTT_HYSTERESIS 3
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||||
|
||||
/*
|
||||
* SPI Configuration
|
||||
*/
|
||||
#define CONFIG_DAVINCI_SPI
|
||||
#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE
|
||||
#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
|
||||
#define CONFIG_CMD_SPI
|
||||
|
||||
/*
|
||||
* Flash & Environment
|
||||
*/
|
||||
|
|
@ -225,9 +233,9 @@
|
|||
"key_magic_2=2\0" \
|
||||
"key_magic_3=3\0" \
|
||||
"magic_keys=0123\0" \
|
||||
"hwconfig=switch:lan=on,pwl=off\0" \
|
||||
"hwconfig=switch:lan=on,pwl=off,config=0x60100000\0" \
|
||||
"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
|
||||
"addmisc=setenv bootargs ${bootargs} davinci_mmc.use_dma=0\0" \
|
||||
"addmisc=setenv bootargs ${bootargs}\0" \
|
||||
"mtdids=" MTDIDS_DEFAULT "\0" \
|
||||
"mtdparts=" MTDPARTS_DEFAULT "\0" \
|
||||
"logversion=2\0" \
|
||||
|
|
@ -336,6 +344,11 @@
|
|||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_MMC
|
||||
|
||||
/* GPIO */
|
||||
#define CONFIG_ENBW_CMC_BOARD_TYPE 57
|
||||
#define CONFIG_ENBW_CMC_HW_ID_BIT0 39
|
||||
#define CONFIG_ENBW_CMC_HW_ID_BIT1 38
|
||||
#define CONFIG_ENBW_CMC_HW_ID_BIT2 35
|
||||
|
||||
/* FDT support */
|
||||
#define CONFIG_OF_LIBFDT
|
||||
|
|
@ -438,7 +451,8 @@
|
|||
#define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11)
|
||||
|
||||
#define CONFIG_POST (CONFIG_SYS_POST_MEMORY)
|
||||
#define CONFIG_SYS_POST_WORD_ADDR 0x8001FFF0
|
||||
#define CONFIG_POST_EXTERNAL_WORD_FUNCS
|
||||
#define CONFIG_SYS_POST_WORD_ADDR DAVINCI_RTC_BASE
|
||||
#define CONFIG_LOGBUFFER
|
||||
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue