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imx6: make sure MMDC_CHx_MASK is clear to avoid warm reset failure 

Boot ROM may mask MMDC_CHx_MASK in CCM_CCDR(such as i.MX6SL TO1.2),
it will cause warm reset fail, need to clear this MMDC_CHx_MASK field
to make sure all the i.MX6 series SOCs reset function work. Otherwise,
uboot "reset" command will fail, tested on i.MX6SL EVK board with TO1.2.

Signed-off-by: Anson Huang <b20788@freescale.com>
This commit is contained in:
Anson Huang 2014-01-23 14:00:19 +08:00 committed by Stefano Babic
parent 5c92edc21c
commit 16197bb8ba
1 changed files with 11 additions and 0 deletions
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11
arch/arm/cpu/armv7/mx6/soc.c
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@ -189,10 +189,21 @@ static void set_ahb_rate(u32 val)
(div << MXC_CCM_CBCDR_AHB_PODF_OFFSET), &mxc_ccm->cbcdr);
}
static void clear_mmdc_ch_mask(void)
{
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
/* Clear MMDC channel mask */
writel(0, &mxc_ccm->ccdr);
}
int arch_cpu_init(void)
{
init_aips();
/* Need to clear MMDC_CHx_MASK to make warm reset work. */
clear_mmdc_ch_mask();
/*
* When low freq boot is enabled, ROM will not set AHB
* freq, so we need to ensure AHB freq is 132MHz in such