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arm/km: fix memory settings 

On kmcoge5un we faced some serious problems with the memory during
temperature tests. Reason was that we overwrite some registers for
memory settings which have to leave untouched. These where registers
0x20148 , 0x2014c and 0x20154.
So writing these registers is prohibited and this patch removes them
from all km related config files. Even if the problem was only
seen on kmcoge5un.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
This commit is contained in:
Holger Brunck 2012-11-02 00:15:07 +00:00 committed by Prafulla Wadaskar
parent 7528cf5f01
commit 2472216cac
4 changed files with 10 additions and 52 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
board/keymile/km_arm/kwbimage-memphis.cfg
View File

@ -55,9 +55,9 @@ DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
DATA 0xFFD100E0 0x1B1B1B1B # IO Configuration 0 Register
DATA 0xFFD20134 0x66666666 # L2 RAM Timing 0 Register
DATA 0xFFD20138 0x66666666 # L2 RAM Timing 1 Register
DATA 0xFFD20154 0x00000200 # CPU RAM Management Control3 Register
DATA 0xFFD2014C 0x00001C00 # CPU RAM Management Control1 Register
DATA 0xFFD20148 0x00000001 # CPU RAM Management Control0 Register
# NOTE: Don't write on 0x20148 , 0x2014c and 0x20154, leave them untouched!
# If not it could cause KW Exceptions during boot in Fast Corners/High Voltage
#Dram initalization
DATA 0xFFD01400 0x430004E0 # SDRAM Configuration Register

6
board/keymile/km_arm/kwbimage.cfg
View File

@ -52,9 +52,9 @@ DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
DATA 0xFFD100E0 0x1B1B1B1B # IO Configuration 0 Register
DATA 0xFFD20134 0x66666666 # L2 RAM Timing 0 Register
DATA 0xFFD20138 0x66666666 # L2 RAM Timing 1 Register
DATA 0xFFD20154 0x00000200 # CPU RAM Management Control3 Register
DATA 0xFFD2014C 0x00001C00 # CPU RAM Management Control1 Register
DATA 0xFFD20148 0x00000001 # CPU RAM Management Control0 Register
# NOTE: Don't write on 0x20148 , 0x2014c and 0x20154, leave them untouched!
# If not it could cause KW Exceptions during boot in Fast Corners/High Voltage
#Dram initalization
DATA 0xFFD01400 0x43000400 # SDRAM Configuration Register

25
board/keymile/km_arm/kwbimage_128M16_1.cfg
View File

@ -98,29 +98,8 @@ DATA 0xFFD20138 0x66666666 # L2 RAM Timing 1 Register
# bit 19-18: 1, ECC RAM WTC RAM0
# bit 31-20: ???,Reserve
DATA 0xFFD20154 0x00000200 # CPU RAM Management Control3 Register
# bit 23-0: 0x000200, Addr Config tuning
# bit 31-24: 0, Reserved
# ??? Missing register # CPU RAM Management Control2 Register
DATA 0xFFD2014C 0x00001C00 # CPU RAM Management Control1 Register
# bit 15-0: 0x1C00, Opmux Tuning
# bit 31-16: 0, Pc Dp Tuning
DATA 0xFFD20148 0x00000001 # CPU RAM Management Control0 Register
# bit 1-0: 1, addr clk tune
# bit 3-2: 0, reserved
# bit 5-4: 0, dtcmp clk tune
# bit 7-6: 0, reserved
# bit 9-8: 0, macdrv clk tune
# bit 11-10: 0, opmuxgm2 clk tune
# bit 15-14: 0, rf clk tune
# bit 17-16: 0, rfbypass clk tune
# bit 19-18: 0, pc dp clk tune
# bit 23-20: 0, icache clk tune
# bit 27:24: 0, dcache clk tune
# bit 31:28: 0, regfile tunin
# NOTE: Don't write on 0x20148 , 0x2014c and 0x20154, leave them untouched!
# If not it could cause KW Exceptions during boot in Fast Corners/High Voltage
# SDRAM initalization
DATA 0xFFD01400 0x430004E0 # SDRAM Configuration Register

25
board/keymile/km_arm/kwbimage_256M8_1.cfg
View File

@ -100,29 +100,8 @@ DATA 0xFFD20138 0x66666666 # L2 RAM Timing 1 Register
# bit 19-18: 1, ECC RAM WTC RAM0
# bit 31-20: ?,Reserved
DATA 0xFFD20154 0x00000200 # CPU RAM Management Control3 Register
# bit 23-0: 0x000200, Addr Config tuning
# bit 31-24: 0, Reserved
# ??? Missing register # CPU RAM Management Control2 Register
DATA 0xFFD2014C 0x00001C00 # CPU RAM Management Control1 Register
# bit 15-0: 0x1C00, Opmux Tuning
# bit 31-16: 0, Pc Dp Tuning
DATA 0xFFD20148 0x00000001 # CPU RAM Management Control0 Register
# bit 1-0: 1, addr clk tune
# bit 3-2: 0, reserved
# bit 5-4: 0, dtcmp clk tune
# bit 7-6: 0, reserved
# bit 9-8: 0, macdrv clk tune
# bit 11-10: 0, opmuxgm2 clk tune
# bit 15-14: 0, rf clk tune
# bit 17-16: 0, rfbypass clk tune
# bit 19-18: 0, pc dp clk tune
# bit 23-20: 0, icache clk tune
# bit 27:24: 0, dcache clk tune
# bit 31:28: 0, regfile tunin
# NOTE: Don't write on 0x20148 , 0x2014c and 0x20154, leave them untouched!
# If not it could cause KW Exceptions during boot in Fast Corners/High Voltage
# SDRAM initalization
DATA 0xFFD01400 0x430004E0 # SDRAM Configuration Register