samsung: Enable device tree for s5p_goni

Change this board to add a device tree.

This also adds a pinmux header file although it is not used as yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Simon Glass 2014-10-07 22:01:50 -06:00 committed by Minkyu Kang
parent 1d55110003
commit 311757be27
9 changed files with 170 additions and 7 deletions

View File

@ -336,6 +336,9 @@ config TARGET_BCM958622HR
config ARCH_EXYNOS
bool "Samsung EXYNOS"
config ARCH_S5PC1XX
bool "Samsung S5PC1XX"
config ARCH_HIGHBANK
bool "Calxeda Highbank"
@ -429,9 +432,6 @@ config RMOBILE
config TARGET_CM_FX6
bool "Support cm_fx6"
config TARGET_S5P_GONI
bool "Support s5p_goni"
config TARGET_SMDKC100
bool "Support smdkc100"
@ -550,6 +550,8 @@ source "arch/arm/cpu/arm926ejs/orion5x/Kconfig"
source "arch/arm/cpu/armv7/rmobile/Kconfig"
source "arch/arm/cpu/armv7/s5pc1xx/Kconfig"
source "arch/arm/cpu/armv7/tegra-common/Kconfig"
source "arch/arm/cpu/armv7/uniphier/Kconfig"
@ -657,7 +659,6 @@ source "board/raspberrypi/rpi_b/Kconfig"
source "board/ronetix/pm9261/Kconfig"
source "board/ronetix/pm9263/Kconfig"
source "board/ronetix/pm9g45/Kconfig"
source "board/samsung/goni/Kconfig"
source "board/samsung/smdk2410/Kconfig"
source "board/samsung/smdkc100/Kconfig"
source "board/sandisk/sansa_fuze_plus/Kconfig"

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@ -0,0 +1,20 @@
if ARCH_S5PC1XX
choice
prompt "S5PC1XX board select"
config TARGET_S5P_GONI
bool "S5P Goni board"
select OF_CONTROL if !SPL_BUILD
endchoice
config SYS_CPU
default "armv7"
config SYS_SOC
default "s5pc1xx"
source "board/samsung/goni/Kconfig"
endif

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@ -1,3 +1,4 @@
dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
exynos4210-universal_c210.dtb \

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@ -0,0 +1,28 @@
/*
* Samsung's S5PC110-based Goni board device tree source
*
* Copyright (c) 2014 Google, Inc
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
model = "Samsung Goni based on S5PC110";
compatible = "samsung,goni", "samsung,s5pc110";
aliases {
serial2 = "/serial@e2900800";
console = "/serial@e2900800";
};
serial@e2900800 {
compatible = "samsung,exynos4210-uart";
reg = <0xe2900800 0x400>;
id = <2>;
};
};

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@ -0,0 +1,61 @@
/*
* Copyright (C) 2012 Samsung Electronics
* Rajeshwari Shinde <rajeshwari.s@samsung.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARM_ARCH_PERIPH_H
#define __ASM_ARM_ARCH_PERIPH_H
/*
* Peripherals required for pinmux configuration. List will
* grow with support for more devices getting added.
* Numbering based on interrupt table.
*
*/
enum periph_id {
PERIPH_ID_UART0 = 51,
PERIPH_ID_UART1,
PERIPH_ID_UART2,
PERIPH_ID_UART3,
PERIPH_ID_I2C0 = 56,
PERIPH_ID_I2C1,
PERIPH_ID_I2C2,
PERIPH_ID_I2C3,
PERIPH_ID_I2C4,
PERIPH_ID_I2C5,
PERIPH_ID_I2C6,
PERIPH_ID_I2C7,
PERIPH_ID_SPI0 = 68,
PERIPH_ID_SPI1,
PERIPH_ID_SPI2,
PERIPH_ID_SDMMC0 = 75,
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
PERIPH_ID_SDMMC3,
PERIPH_ID_I2C8 = 87,
PERIPH_ID_I2C9,
PERIPH_ID_I2S0 = 98,
PERIPH_ID_I2S1 = 99,
/* Since following peripherals do
* not have shared peripheral interrupts (SPIs)
* they are numbered arbitiraly after the maximum
* SPIs Exynos has (128)
*/
PERIPH_ID_SROMC = 128,
PERIPH_ID_SPI3,
PERIPH_ID_SPI4,
PERIPH_ID_SDMMC4,
PERIPH_ID_PWM0,
PERIPH_ID_PWM1,
PERIPH_ID_PWM2,
PERIPH_ID_PWM3,
PERIPH_ID_PWM4,
PERIPH_ID_I2C10 = 203,
PERIPH_ID_NONE = -1,
};
#endif /* __ASM_ARM_ARCH_PERIPH_H */

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@ -0,0 +1,50 @@
/*
* Copyright (C) 2012 Samsung Electronics
* Abhilash Kesavan <a.kesavan@samsung.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARM_ARCH_PINMUX_H
#define __ASM_ARM_ARCH_PINMUX_H
#include "periph.h"
/*
* Flags for setting specific configarations of peripherals.
* List will grow with support for more devices getting added.
*/
enum {
PINMUX_FLAG_NONE = 0x00000000,
/* Flags for eMMC */
PINMUX_FLAG_8BIT_MODE = 1 << 0, /* SDMMC 8-bit mode */
/* Flags for SROM controller */
PINMUX_FLAG_BANK = 3 << 0, /* bank number (0-3) */
PINMUX_FLAG_16BIT = 1 << 2, /* 16-bit width */
};
/**
* Configures the pinmux for a particular peripheral.
*
* Each gpio can be configured in many different ways (4 bits on exynos)
* such as "input", "output", "special function", "external interrupt"
* etc. This function will configure the peripheral pinmux along with
* pull-up/down and drive strength.
*
* @param peripheral peripheral to be configured
* @param flags configure flags
* @return 0 if ok, -1 on error (e.g. unsupported peripheral)
*/
int exynos_pinmux_config(int peripheral, int flags);
/**
* Decode the peripheral id using the interrpt numbers.
*
* @param blob Device tree blob
* @param node FDT I2C node to find
* @return peripheral id if ok, PERIPH_ID_NONE on error
*/
int pinmux_decode_periph_id(const void *blob, int node);
#endif

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@ -1,2 +1,4 @@
CONFIG_ARM=y
CONFIG_ARCH_S5PC1XX=y
CONFIG_TARGET_S5P_GONI=y
CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni"

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@ -14,9 +14,7 @@
#include <asm/arch/mmc.h>
#include <asm/arch/clk.h>
#include <errno.h>
#ifdef CONFIG_OF_CONTROL
#include <asm/arch/pinmux.h>
#endif
static char *S5P_NAME = "SAMSUNG SDHCI";
static void s5p_sdhci_set_control_reg(struct sdhci_host *host)

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@ -53,6 +53,7 @@
#define CONFIG_MMC
#define CONFIG_SDHCI
#define CONFIG_S5P_SDHCI
#define SDHCI_MAX_HOSTS 4
/* PWM */
#define CONFIG_PWM 1
@ -106,7 +107,6 @@
",12m(modem)"\
",60m(qboot)\0"
#define CONFIG_BOOTDELAY 1
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* partitions definitions */
@ -283,4 +283,6 @@
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_GADGET_MASS_STORAGE
#define CONFIG_OF_LIBFDT
#endif /* __CONFIG_H */