nand: mxc: Add support for i.MX5
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Benoît Thébaudeau
Albert ARIBAUD
parent
2dc0aa0227
commit
35537bc773
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@ -22,7 +22,8 @@
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#include <nand.h>
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#include <linux/err.h>
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#include <asm/io.h>
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#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35)
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#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35) || \
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defined(CONFIG_MX51) || defined(CONFIG_MX53)
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#include <asm/arch/imx-regs.h>
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#endif
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#include <fsl_nfc.h>
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@ -36,6 +37,9 @@ struct mxc_nand_host {
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struct nand_chip *nand;
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struct fsl_nfc_regs __iomem *regs;
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#ifdef MXC_NFC_V3_2
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struct fsl_nfc_ip_regs __iomem *ip_regs;
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#endif
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int spare_only;
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int status_request;
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int pagesize_2k;
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@ -77,7 +81,7 @@ static struct nand_ecclayout nand_hw_eccoob2k = {
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.oobfree = { {2, 4}, {11, 11}, {27, 11}, {43, 11}, {59, 5} },
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};
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#endif
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#elif defined(MXC_NFC_V2_1)
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#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
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#ifndef CONFIG_SYS_NAND_LARGEPAGE
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static struct nand_ecclayout nand_hw_eccoob = {
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.eccbytes = 9,
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@ -127,10 +131,17 @@ static void wait_op_done(struct mxc_nand_host *host, int max_retries,
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uint32_t tmp;
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while (max_retries-- > 0) {
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#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
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tmp = readnfc(&host->regs->config2);
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if (tmp & NFC_V1_V2_CONFIG2_INT) {
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tmp &= ~NFC_V1_V2_CONFIG2_INT;
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writenfc(tmp, &host->regs->config2);
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#elif defined(MXC_NFC_V3_2)
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tmp = readnfc(&host->ip_regs->ipc);
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if (tmp & NFC_V3_IPC_INT) {
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tmp &= ~NFC_V3_IPC_INT;
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writenfc(tmp, &host->ip_regs->ipc);
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#endif
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break;
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}
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udelay(1);
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@ -182,7 +193,7 @@ static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
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if (spare_only)
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MTDDEBUG(MTD_DEBUG_LEVEL1, "send_prog_page (%d)\n", spare_only);
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if (is_mxc_nfc_21()) {
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if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
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int i;
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/*
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* The controller copies the 64 bytes of spare data from
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@ -198,11 +209,18 @@ static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
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}
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}
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#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
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writenfc(buf_id, &host->regs->buf_addr);
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#elif defined(MXC_NFC_V3_2)
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uint32_t tmp = readnfc(&host->regs->config1);
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tmp &= ~NFC_V3_CONFIG1_RBA_MASK;
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tmp |= NFC_V3_CONFIG1_RBA(buf_id);
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writenfc(tmp, &host->regs->config1);
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#endif
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/* Configure spare or page+spare access */
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if (!host->pagesize_2k) {
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uint16_t config1 = readnfc(&host->regs->config1);
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uint32_t config1 = readnfc(&host->regs->config1);
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if (spare_only)
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config1 |= NFC_CONFIG1_SP_EN;
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else
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@ -225,7 +243,14 @@ static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
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{
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MTDDEBUG(MTD_DEBUG_LEVEL3, "send_read_page (%d)\n", spare_only);
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#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
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writenfc(buf_id, &host->regs->buf_addr);
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#elif defined(MXC_NFC_V3_2)
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uint32_t tmp = readnfc(&host->regs->config1);
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tmp &= ~NFC_V3_CONFIG1_RBA_MASK;
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tmp |= NFC_V3_CONFIG1_RBA(buf_id);
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writenfc(tmp, &host->regs->config1);
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#endif
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/* Configure spare or page+spare access */
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if (!host->pagesize_2k) {
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@ -242,7 +267,7 @@ static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
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/* Wait for operation to complete */
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wait_op_done(host, TROP_US_DELAY, spare_only);
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if (is_mxc_nfc_21()) {
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if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
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int i;
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/*
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@ -262,10 +287,16 @@ static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
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/* Request the NANDFC to perform a read of the NAND device ID. */
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static void send_read_id(struct mxc_nand_host *host)
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{
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uint16_t tmp;
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uint32_t tmp;
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#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
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/* NANDFC buffer 0 is used for device ID output */
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writenfc(0x0, &host->regs->buf_addr);
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#elif defined(MXC_NFC_V3_2)
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tmp = readnfc(&host->regs->config1);
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tmp &= ~NFC_V3_CONFIG1_RBA_MASK;
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writenfc(tmp, &host->regs->config1);
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#endif
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/* Read ID into main buffer */
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tmp = readnfc(&host->regs->config1);
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@ -284,15 +315,19 @@ static void send_read_id(struct mxc_nand_host *host)
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*/
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static uint16_t get_dev_status(struct mxc_nand_host *host)
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{
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#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
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void __iomem *main_buf = host->regs->main_area[1];
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uint32_t store;
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uint16_t ret, tmp;
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#endif
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uint32_t ret, tmp;
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/* Issue status request to NAND device */
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#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
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/* store the main area1 first word, later do recovery */
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store = readl(main_buf);
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/* NANDFC buffer 1 is used for device status */
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writenfc(1, &host->regs->buf_addr);
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#endif
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/* Read status into main buffer */
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tmp = readnfc(&host->regs->config1);
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@ -304,12 +339,16 @@ static uint16_t get_dev_status(struct mxc_nand_host *host)
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/* Wait for operation to complete */
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wait_op_done(host, TROP_US_DELAY, 0);
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#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
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/*
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* Status is placed in first word of main buffer
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* get status, then recovery area 1 data
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*/
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ret = readw(main_buf);
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writel(store, main_buf);
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#elif defined(MXC_NFC_V3_2)
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ret = readnfc(&host->regs->config1) >> 16;
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#endif
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return ret;
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}
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@ -328,6 +367,7 @@ static void _mxc_nand_enable_hwecc(struct mtd_info *mtd, int on)
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{
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struct nand_chip *nand_chip = mtd->priv;
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struct mxc_nand_host *host = nand_chip->priv;
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#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
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uint16_t tmp = readnfc(&host->regs->config1);
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if (on)
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@ -335,6 +375,15 @@ static void _mxc_nand_enable_hwecc(struct mtd_info *mtd, int on)
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else
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tmp &= ~NFC_V1_V2_CONFIG1_ECC_EN;
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writenfc(tmp, &host->regs->config1);
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#elif defined(MXC_NFC_V3_2)
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uint32_t tmp = readnfc(&host->ip_regs->config2);
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if (on)
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tmp |= NFC_V3_CONFIG2_ECC_EN;
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else
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tmp &= ~NFC_V3_CONFIG2_ECC_EN;
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writenfc(tmp, &host->ip_regs->config2);
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#endif
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}
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#ifdef CONFIG_MXC_NAND_HWECC
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@ -346,7 +395,7 @@ static void mxc_nand_enable_hwecc(struct mtd_info *mtd, int mode)
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*/
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}
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#ifdef MXC_NFC_V2_1
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#if defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
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static int mxc_nand_read_oob_syndrome(struct mtd_info *mtd,
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struct nand_chip *chip,
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int page, int sndcmd)
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@ -1136,8 +1185,8 @@ static struct nand_bbt_descr bbt_mirror_descr = {
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int board_nand_init(struct nand_chip *this)
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{
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struct mtd_info *mtd;
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#ifdef MXC_NFC_V2_1
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uint16_t tmp;
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#if defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
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uint32_t tmp;
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#endif
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#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
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@ -1165,13 +1214,17 @@ int board_nand_init(struct nand_chip *this)
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this->verify_buf = mxc_nand_verify_buf;
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host->regs = (struct fsl_nfc_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
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#ifdef MXC_NFC_V3_2
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host->ip_regs =
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(struct fsl_nfc_ip_regs __iomem *)CONFIG_MXC_NAND_IP_REGS_BASE;
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#endif
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host->clk_act = 1;
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#ifdef CONFIG_MXC_NAND_HWECC
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this->ecc.calculate = mxc_nand_calculate_ecc;
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this->ecc.hwctl = mxc_nand_enable_hwecc;
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this->ecc.correct = mxc_nand_correct_data;
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if (is_mxc_nfc_21()) {
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if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
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this->ecc.mode = NAND_ECC_HW_SYNDROME;
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this->ecc.read_page = mxc_nand_read_page_syndrome;
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this->ecc.read_page_raw = mxc_nand_read_page_raw_syndrome;
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@ -1209,6 +1262,7 @@ int board_nand_init(struct nand_chip *this)
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this->ecc.layout = &nand_hw_eccoob;
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#endif
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#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
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#ifdef MXC_NFC_V2_1
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tmp = readnfc(&host->regs->config1);
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tmp |= NFC_V2_CONFIG1_ONE_CYCLE;
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@ -1243,6 +1297,49 @@ int board_nand_init(struct nand_chip *this)
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/* Unlock Block Command for given address range */
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writenfc(0x4, &host->regs->wrprot);
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#elif defined(MXC_NFC_V3_2)
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writenfc(NFC_V3_CONFIG1_RBA(0), &host->regs->config1);
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writenfc(NFC_V3_IPC_CREQ, &host->ip_regs->ipc);
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/* Unlock the internal RAM Buffer */
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writenfc(NFC_V3_WRPROT_BLS_UNLOCK | NFC_V3_WRPROT_UNLOCK,
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&host->ip_regs->wrprot);
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/* Blocks to be unlocked */
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for (tmp = 0; tmp < CONFIG_SYS_NAND_MAX_CHIPS; tmp++)
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writenfc(0x0 | 0xFFFF << 16,
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&host->ip_regs->wrprot_unlock_blkaddr[tmp]);
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writenfc(0, &host->ip_regs->ipc);
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tmp = readnfc(&host->ip_regs->config2);
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tmp &= ~(NFC_V3_CONFIG2_SPAS_MASK | NFC_V3_CONFIG2_EDC_MASK |
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NFC_V3_CONFIG2_ECC_MODE_8 | NFC_V3_CONFIG2_PS_MASK);
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tmp |= NFC_V3_CONFIG2_ONE_CYCLE;
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if (host->pagesize_2k) {
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tmp |= NFC_V3_CONFIG2_SPAS(64/2);
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tmp |= NFC_V3_CONFIG2_PS_2048;
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} else {
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tmp |= NFC_V3_CONFIG2_SPAS(16/2);
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tmp |= NFC_V3_CONFIG2_PS_512;
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}
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writenfc(tmp, &host->ip_regs->config2);
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tmp = NFC_V3_CONFIG3_NUM_OF_DEVS(0) |
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NFC_V3_CONFIG3_NO_SDMA |
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NFC_V3_CONFIG3_RBB_MODE |
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NFC_V3_CONFIG3_SBB(6) | /* Reset default */
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NFC_V3_CONFIG3_ADD_OP(0);
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if (!(this->options & NAND_BUSWIDTH_16))
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tmp |= NFC_V3_CONFIG3_FW8;
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writenfc(tmp, &host->ip_regs->config3);
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writenfc(0, &host->ip_regs->delay_line);
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#endif
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return 0;
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}
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@ -33,7 +33,8 @@
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* to support up to 2K byte pagesize nand.
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* Reading or writing a 2K page requires 4 FDI/FDO cycles.
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*
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* MX25 and MX35 have version 2.1, which has:
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* MX25 and MX35 have version 2.1, and MX51 and MX53 have version 3.2, which
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* have:
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* 8 512-byte main buffers and
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* 8 64-byte spare buffers
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* to support up to 4K byte pagesize nand.
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@ -44,20 +45,29 @@
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#define MXC_NFC_V1
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#define is_mxc_nfc_1() 1
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#define is_mxc_nfc_21() 0
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#define is_mxc_nfc_32() 0
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#elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
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#define MXC_NFC_V2_1
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#define is_mxc_nfc_1() 0
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#define is_mxc_nfc_21() 1
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#define is_mxc_nfc_32() 0
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#elif defined(CONFIG_MX51) || defined(CONFIG_MX53)
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#define MXC_NFC_V3
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#define MXC_NFC_V3_2
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#define is_mxc_nfc_1() 0
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#define is_mxc_nfc_21() 0
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#define is_mxc_nfc_32() 1
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#else
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#error "MXC NFC implementation not supported"
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#endif
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#define is_mxc_nfc_3() is_mxc_nfc_32()
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#if defined(MXC_NFC_V1)
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#define NAND_MXC_NR_BUFS 4
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#define NAND_MXC_SPARE_BUF_SIZE 16
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#define NAND_MXC_REG_OFFSET 0xe00
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#define NAND_MXC_2K_MULTI_CYCLE
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#elif defined(MXC_NFC_V2_1)
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#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
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#define NAND_MXC_NR_BUFS 8
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#define NAND_MXC_SPARE_BUF_SIZE 64
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#define NAND_MXC_REG_OFFSET 0x1e00
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@ -110,9 +120,28 @@ struct fsl_nfc_regs {
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u16 unlockend_blkaddr2;
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u16 unlockstart_blkaddr3;
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u16 unlockend_blkaddr3;
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#elif defined(MXC_NFC_V3_2)
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u32 flash_cmd;
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u32 flash_addr[12];
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u32 config1;
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u32 ecc_status_result;
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u32 status_sum;
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u32 launch;
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#endif
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};
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#ifdef MXC_NFC_V3_2
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struct fsl_nfc_ip_regs {
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u32 wrprot;
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u32 wrprot_unlock_blkaddr[8];
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u32 config2;
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u32 config3;
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u32 ipc;
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u32 err_addr;
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u32 delay_line;
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};
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#endif
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/* Set FCMD to 1, rest to 0 for Command operation */
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#define NFC_CMD 0x1
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@ -131,20 +160,66 @@ struct fsl_nfc_regs {
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/* Set FDO to 100, rest to 0 for Read Status operation */
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#define NFC_STATUS 0x20
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#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
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#define NFC_CONFIG1_SP_EN (1 << 2)
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#define NFC_CONFIG1_RST (1 << 6)
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#define NFC_CONFIG1_CE (1 << 7)
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#elif defined(MXC_NFC_V3_2)
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#define NFC_CONFIG1_SP_EN (1 << 0)
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#define NFC_CONFIG1_CE (1 << 1)
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#define NFC_CONFIG1_RST (1 << 2)
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#endif
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#define NFC_V1_V2_CONFIG1_ECC_EN (1 << 3)
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#define NFC_V1_V2_CONFIG1_INT_MSK (1 << 4)
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#define NFC_V1_V2_CONFIG1_BIG (1 << 5)
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#define NFC_V2_CONFIG1_ECC_MODE_4 (1 << 0)
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#define NFC_V2_CONFIG1_ONE_CYCLE (1 << 8)
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#define NFC_V2_CONFIG1_FP_INT (1 << 11)
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#define NFC_V3_CONFIG1_RBA_MASK (0x7 << 4)
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#define NFC_V3_CONFIG1_RBA(x) (((x) & 0x7) << 4)
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#define NFC_V1_V2_CONFIG2_INT (1 << 15)
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#define NFC_V3_CONFIG2_PS_MASK (0x3 << 0)
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#define NFC_V3_CONFIG2_PS_512 (0 << 0)
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#define NFC_V3_CONFIG2_PS_2048 (1 << 0)
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#define NFC_V3_CONFIG2_PS_4096 (2 << 0)
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#define NFC_V3_CONFIG2_ONE_CYCLE (1 << 2)
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#define NFC_V3_CONFIG2_ECC_EN (1 << 3)
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||||
#define NFC_V3_CONFIG2_2CMD_PHASES (1 << 4)
|
||||
#define NFC_V3_CONFIG2_NUM_ADDR_PH0 (1 << 5)
|
||||
#define NFC_V3_CONFIG2_ECC_MODE_8 (1 << 6)
|
||||
#define NFC_V3_CONFIG2_PPB_MASK (0x3 << 7)
|
||||
#define NFC_V3_CONFIG2_PPB(x) (((x) & 0x3) << 7)
|
||||
#define NFC_V3_CONFIG2_EDC_MASK (0x7 << 9)
|
||||
#define NFC_V3_CONFIG2_EDC(x) (((x) & 0x7) << 9)
|
||||
#define NFC_V3_CONFIG2_NUM_ADDR_PH1(x) (((x) & 0x3) << 12)
|
||||
#define NFC_V3_CONFIG2_INT_MSK (1 << 15)
|
||||
#define NFC_V3_CONFIG2_SPAS_MASK (0xff << 16)
|
||||
#define NFC_V3_CONFIG2_SPAS(x) (((x) & 0xff) << 16)
|
||||
#define NFC_V3_CONFIG2_ST_CMD_MASK (0xff << 24)
|
||||
#define NFC_V3_CONFIG2_ST_CMD(x) (((x) & 0xff) << 24)
|
||||
|
||||
#define NFC_V3_CONFIG3_ADD_OP(x) (((x) & 0x3) << 0)
|
||||
#define NFC_V3_CONFIG3_FW8 (1 << 3)
|
||||
#define NFC_V3_CONFIG3_SBB(x) (((x) & 0x7) << 8)
|
||||
#define NFC_V3_CONFIG3_NUM_OF_DEVS(x) (((x) & 0x7) << 12)
|
||||
#define NFC_V3_CONFIG3_RBB_MODE (1 << 15)
|
||||
#define NFC_V3_CONFIG3_NO_SDMA (1 << 20)
|
||||
|
||||
#define NFC_V3_WRPROT_UNLOCK (1 << 2)
|
||||
#define NFC_V3_WRPROT_BLS_UNLOCK (2 << 6)
|
||||
|
||||
#define NFC_V3_IPC_CREQ (1 << 0)
|
||||
#define NFC_V3_IPC_INT (1 << 31)
|
||||
|
||||
#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
|
||||
#define operation config2
|
||||
#define readnfc readw
|
||||
#define writenfc writew
|
||||
#elif defined(MXC_NFC_V3_2)
|
||||
#define operation launch
|
||||
#define readnfc readl
|
||||
#define writenfc writel
|
||||
#endif
|
||||
|
||||
#endif /* __FSL_NFC_H */
|
||||
|
|
|
|||
|
|
@ -30,12 +30,18 @@
|
|||
#include <asm/io.h>
|
||||
#include <fsl_nfc.h>
|
||||
|
||||
#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
|
||||
static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR;
|
||||
#elif defined(MXC_NFC_V3_2)
|
||||
static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR_AXI;
|
||||
static struct fsl_nfc_ip_regs *const nfc_ip = (void *)NFC_BASE_ADDR;
|
||||
#endif
|
||||
|
||||
static void nfc_wait_ready(void)
|
||||
{
|
||||
uint32_t tmp;
|
||||
|
||||
#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
|
||||
while (!(readnfc(&nfc->config2) & NFC_V1_V2_CONFIG2_INT))
|
||||
;
|
||||
|
||||
|
|
@ -43,11 +49,56 @@ static void nfc_wait_ready(void)
|
|||
tmp = readnfc(&nfc->config2);
|
||||
tmp &= ~NFC_V1_V2_CONFIG2_INT;
|
||||
writenfc(tmp, &nfc->config2);
|
||||
#elif defined(MXC_NFC_V3_2)
|
||||
while (!(readnfc(&nfc_ip->ipc) & NFC_V3_IPC_INT))
|
||||
;
|
||||
|
||||
/* Reset interrupt flag */
|
||||
tmp = readnfc(&nfc_ip->ipc);
|
||||
tmp &= ~NFC_V3_IPC_INT;
|
||||
writenfc(tmp, &nfc_ip->ipc);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void nfc_nand_init(void)
|
||||
{
|
||||
#if defined(MXC_NFC_V2_1)
|
||||
#if defined(MXC_NFC_V3_2)
|
||||
int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
|
||||
int tmp;
|
||||
|
||||
tmp = (readnfc(&nfc_ip->config2) & ~(NFC_V3_CONFIG2_SPAS_MASK |
|
||||
NFC_V3_CONFIG2_EDC_MASK | NFC_V3_CONFIG2_PS_MASK)) |
|
||||
NFC_V3_CONFIG2_SPAS(CONFIG_SYS_NAND_SPARE_SIZE / 2) |
|
||||
NFC_V3_CONFIG2_INT_MSK | NFC_V3_CONFIG2_ECC_EN |
|
||||
NFC_V3_CONFIG2_ONE_CYCLE;
|
||||
if (CONFIG_SYS_NAND_PAGE_SIZE == 4096)
|
||||
tmp |= NFC_V3_CONFIG2_PS_4096;
|
||||
else if (CONFIG_SYS_NAND_PAGE_SIZE == 2048)
|
||||
tmp |= NFC_V3_CONFIG2_PS_2048;
|
||||
else if (CONFIG_SYS_NAND_PAGE_SIZE == 512)
|
||||
tmp |= NFC_V3_CONFIG2_PS_512;
|
||||
/*
|
||||
* if spare size is larger that 16 bytes per 512 byte hunk
|
||||
* then use 8 symbol correction instead of 4
|
||||
*/
|
||||
if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
|
||||
tmp |= NFC_V3_CONFIG2_ECC_MODE_8;
|
||||
else
|
||||
tmp &= ~NFC_V3_CONFIG2_ECC_MODE_8;
|
||||
writenfc(tmp, &nfc_ip->config2);
|
||||
|
||||
tmp = NFC_V3_CONFIG3_NUM_OF_DEVS(0) |
|
||||
NFC_V3_CONFIG3_NO_SDMA |
|
||||
NFC_V3_CONFIG3_RBB_MODE |
|
||||
NFC_V3_CONFIG3_SBB(6) | /* Reset default */
|
||||
NFC_V3_CONFIG3_ADD_OP(0);
|
||||
#ifndef CONFIG_SYS_NAND_BUSWIDTH_16
|
||||
tmp |= NFC_V3_CONFIG3_FW8;
|
||||
#endif
|
||||
writenfc(tmp, &nfc_ip->config3);
|
||||
|
||||
writenfc(0, &nfc_ip->delay_line);
|
||||
#elif defined(MXC_NFC_V2_1)
|
||||
int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
|
||||
int config1;
|
||||
|
||||
|
|
@ -123,7 +174,13 @@ static void nfc_nand_data_output(void)
|
|||
int i;
|
||||
#endif
|
||||
|
||||
#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
|
||||
writenfc(0, &nfc->buf_addr);
|
||||
#elif defined(MXC_NFC_V3_2)
|
||||
int config1 = readnfc(&nfc->config1);
|
||||
config1 &= ~NFC_V3_CONFIG1_RBA_MASK;
|
||||
writenfc(config1, &nfc->config1);
|
||||
#endif
|
||||
writenfc(NFC_OUTPUT, &nfc->operation);
|
||||
nfc_wait_ready();
|
||||
#ifdef NAND_MXC_2K_MULTI_CYCLE
|
||||
|
|
@ -144,7 +201,7 @@ static int nfc_nand_check_ecc(void)
|
|||
#if defined(MXC_NFC_V1)
|
||||
u16 ecc_status = readw(&nfc->ecc_status_result);
|
||||
return (ecc_status & 0x3) == 2 || (ecc_status >> 2) == 2;
|
||||
#elif defined(MXC_NFC_V2_1)
|
||||
#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
|
||||
u32 ecc_status = readl(&nfc->ecc_status_result);
|
||||
int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
|
||||
int err_limit = CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16 ? 8 : 4;
|
||||
|
|
@ -163,7 +220,13 @@ static int nfc_nand_check_ecc(void)
|
|||
static void nfc_nand_read_page(unsigned int page_address)
|
||||
{
|
||||
/* read in first 0 buffer */
|
||||
#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
|
||||
writenfc(0, &nfc->buf_addr);
|
||||
#elif defined(MXC_NFC_V3_2)
|
||||
int config1 = readnfc(&nfc->config1);
|
||||
config1 &= ~NFC_V3_CONFIG1_RBA_MASK;
|
||||
writenfc(config1, &nfc->config1);
|
||||
#endif
|
||||
nfc_nand_command(NAND_CMD_READ0);
|
||||
nfc_nand_page_address(page_address);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue