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sf: probe: Enable RD_FULL and WR_QPP 

This patch enabled RD_FULL and WR_QPP for supported flashes
in micron, winbond and spansion.

Remaining parts will be add in future patches.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
This commit is contained in:
Jagannadha Sutradharudu Teki 2013-12-23 16:39:06 +05:30
parent d08a1baf61
commit 35ba667df4
1 changed files with 30 additions and 30 deletions
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60
drivers/mtd/spi/sf_probe.c
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@ -78,15 +78,15 @@ static const struct spi_flash_params spi_flash_params_table[] = {
{"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0, 0},
{"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0, 0},
{"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0, 0},
{"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, 0, 0},
{"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, 0, 0},
{"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, 0, 0},
{"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, 0, 0},
{"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, 0, 0},
{"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL, WR_QPP},
{"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL, WR_QPP},
{"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL, WR_QPP},
{"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL, WR_QPP},
{"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL, WR_QPP},
{"S25FL256S_256K", 0x010219, 0x4d00, 64 * 1024, 512, RD_FULL, WR_QPP},
{"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL, WR_QPP},
{"S25FL512S_256K", 0x010220, 0x4d00, 64 * 1024, 1024, 0, 0},
{"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, 0, 0},
{"S25FL512S_256K", 0x010220, 0x4d00, 64 * 1024, 1024, RD_FULL, WR_QPP},
{"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL, WR_QPP},
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
{"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0, 0},
@ -97,18 +97,18 @@ static const struct spi_flash_params spi_flash_params_table[] = {
{"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0, 0},
{"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0, 0},
{"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0, 0},
{"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, 0, SECT_4K},
{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, 0, SECT_4K},
{"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, 0, SECT_4K},
{"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, 0, SECT_4K},
{"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, 0, SECT_4K},
{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, 0, SECT_4K},
{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, 0, SECT_4K},
{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, 0, SECT_4K},
{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, 0, E_FSR | SECT_4K},
{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, 0, E_FSR | SECT_4K},
{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, 0, E_FSR | SECT_4K},
{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, 0, E_FSR | SECT_4K},
{"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
{"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
{"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
{"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K},
{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K},
{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_SST /* SST */
{"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, 0, SECT_4K | SST_WP},
@ -130,17 +130,17 @@ static const struct spi_flash_params spi_flash_params_table[] = {
{"W25X16", 0xef3015, 0x0, 64 * 1024, 32, 0, SECT_4K},
{"W25X32", 0xef3016, 0x0, 64 * 1024, 64, 0, SECT_4K},
{"W25X64", 0xef3017, 0x0, 64 * 1024, 128, 0, SECT_4K},
{"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, 0, SECT_4K},
{"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, 0, SECT_4K},
{"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, 0, SECT_4K},
{"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, 0, SECT_4K},
{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, 0, SECT_4K},
{"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, 0, SECT_4K},
{"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, 0, SECT_4K},
{"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, 0, SECT_4K},
{"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, 0, SECT_4K},
{"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, 0, SECT_4K},
{"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, 0, SECT_4K},
{"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP | SECT_4K},
{"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K},
{"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
{"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K},
{"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
{"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP | SECT_4K},
{"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K},
{"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
{"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
{"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K},
#endif
/*
* Note: