arm925t: Fix CONFIG_SYS_HZ to 1000
Let CONFIG_SYS_HZ to have value of 1000 effectively fixing all users of get_timer. Changes since original version: * Set PTV=2 (divisor 8) for boards using 12MHz timer clock source to improve timer resolution. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
This commit is contained in:
Ladislav Michl
Jean-Christophe PLAGNIOL-VILLARD
parent
42bf4b2248
commit
3791a1187c
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@ -1,4 +1,7 @@
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/*
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* (C) Copyright 2009
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* 2N Telekomunikace, <www.2n.cz>
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*
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* (C) Copyright 2003
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* Texas Instruments, <www.ti.com>
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*
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@ -37,7 +40,8 @@
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#include <configs/omap1510.h>
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#include <asm/io.h>
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#define TIMER_LOAD_VAL 0xffffffff
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#define TIMER_LOAD_VAL 0xffffffff
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#define TIMER_CLOCK (CONFIG_SYS_CLK_FREQ / (2 << CONFIG_SYS_PTV))
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static uint32_t timestamp;
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static uint32_t lastdec;
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@ -79,85 +83,41 @@ void set_timer (ulong t)
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/* delay x useconds AND preserve advance timestamp value */
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void udelay (unsigned long usec)
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{
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ulong tmo, tmp;
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int32_t tmo = usec * (TIMER_CLOCK / 1000) / 1000;
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uint32_t now, last = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM);
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if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
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tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
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tmo /= 1000; /* finish normalize. */
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} else { /* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CONFIG_SYS_HZ;
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tmo /= (1000*1000);
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while (tmo > 0) {
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now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM);
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if (last < now) /* count down timer underflow */
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tmo -= TIMER_LOAD_VAL - now + last;
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else
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tmo -= last - now;
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last = now;
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}
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tmp = get_timer (0); /* get current timestamp */
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if ((tmo + tmp + 1) < tmp) /* if setting this fordward will roll time stamp */
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reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
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else
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tmo += tmp; /* else, set advancing stamp wake up time */
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while (get_timer_masked () < tmo) /* loop till event */
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/*NOP*/;
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}
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void reset_timer_masked (void)
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{
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/* reset time */
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lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM);
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lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
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(TIMER_CLOCK / CONFIG_SYS_HZ);
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timestamp = 0; /* start "advancing" time stamp from 0 */
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}
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ulong get_timer_masked (void)
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{
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uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM);
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if (lastdec >= now) { /* normal mode (non roll) */
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/* normal mode */
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timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
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} else { /* we have overflow of the count down timer */
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/* nts = ts + ld + (TLV - now)
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* ts=old stamp, ld=time that passed before passing through -1
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* (TLV-now) amount of time after passing though -1
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* nts = new "advancing time stamp"...it could also roll and cause problems.
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*/
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timestamp += lastdec + TIMER_LOAD_VAL - now;
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}
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uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
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(TIMER_CLOCK / CONFIG_SYS_HZ);
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if (lastdec < now) /* count down timer underflow */
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timestamp += TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ) -
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now + lastdec;
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else
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timestamp += lastdec - now;
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lastdec = now;
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return timestamp;
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}
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/* waits specified delay value and resets timestamp */
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void udelay_masked (unsigned long usec)
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{
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#ifdef CONFIG_INNOVATOROMAP1510
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#define LOOPS_PER_MSEC 60 /* tuned on omap1510 */
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volatile int i, time_remaining = LOOPS_PER_MSEC*usec;
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for (i=time_remaining; i>0; i--) { }
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#else
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ulong tmo;
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ulong endtime;
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signed long diff;
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if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
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tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
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tmo /= 1000; /* finish normalize. */
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} else { /* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CONFIG_SYS_HZ;
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tmo /= (1000*1000);
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}
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endtime = get_timer_masked () + tmo;
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do {
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ulong now = get_timer_masked ();
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diff = endtime - now;
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} while (diff >= 0);
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#endif
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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@ -135,12 +135,12 @@
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#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
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/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
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/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
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* This time is further subdivided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */
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#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
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#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#define CONFIG_SYS_HZ 1000
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/*-----------------------------------------------------------------------
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* Stack sizes
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@ -222,12 +222,12 @@
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#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */
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/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
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/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
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* This time is further subdivided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
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#define CONFIG_SYS_PTV 7 /* 2^(pvt+1), divide by 256 */
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#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
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#define CONFIG_SYS_PTV 7
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#define CONFIG_SYS_HZ 1000
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#define OMAP5910_DPLL_DIV 1
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#define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
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@ -132,12 +132,12 @@
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#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
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/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
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/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
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* This time is further subdivided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */
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#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
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#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#define CONFIG_SYS_HZ 1000
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/*-----------------------------------------------------------------------
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* Stack sizes
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@ -210,12 +210,12 @@
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
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#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - PHYS_SDRAM_1_RESERVED
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/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
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/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
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* This time is further subdivided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
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#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
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#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
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#define CONFIG_SYS_HZ 1000
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#define OMAP5910_DPLL_DIV 1
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#define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
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