ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 3
Clean up odd multiline loop, no functional change. Signed-off-by: Marek Vasut <marex@denx.de>
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@ -1633,8 +1633,7 @@ static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(u32 grp)
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}
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/* The dtap increment to find the failing edge is done here. */
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/* The dtap increment to find the failing edge is done here. */
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for (; d <= IO_DQS_EN_DELAY_MAX;
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for (; d <= IO_DQS_EN_DELAY_MAX; d++) {
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d++, work_end += IO_DELAY_PER_DQS_EN_DCHAIN_TAP) {
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debug_cond(DLEVEL == 2, "%s:%d end-2: dtap=%u\n",
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debug_cond(DLEVEL == 2, "%s:%d end-2: dtap=%u\n",
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__func__, __LINE__, d);
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__func__, __LINE__, d);
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@ -1645,6 +1644,8 @@ static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(u32 grp)
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&bit_chk, 0)) {
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&bit_chk, 0)) {
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break;
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break;
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}
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}
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work_end += IO_DELAY_PER_DQS_EN_DCHAIN_TAP;
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}
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}
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/* Go back to working dtap */
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/* Go back to working dtap */
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