net/Blackfin: move on-chip MAC driver into drivers/net/
The Blackfin on-chip MAC driver was being managed in the BF537-STAMP board directory, but it is not board specific, so relocate it to the drivers dir so that other Blackfin ports can utilize it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger
Wolfgang Denk
parent
8a30b47009
commit
395bce4f59
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@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).a
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COBJS := $(BOARD).o ether_bf537.o post-memory.o stm_m25p64.o cmd_bf537led.o nand.o
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COBJS := $(BOARD).o post-memory.o stm_m25p64.o cmd_bf537led.o nand.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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@ -27,6 +27,7 @@ LIB := $(obj)libnet.a
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COBJS-y += 3c589.o
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COBJS-y += bcm570x.o bcm570x_autoneg.o 5701rls.o
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COBJS-$(CONFIG_BFIN_MAC) += bfin_mac.o
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COBJS-y += cs8900.o
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COBJS-y += dc2114x.o
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COBJS-y += dm9000x.o
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@ -1,39 +1,24 @@
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/*
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* ADI Blackfin 537 MAC Ethernet
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* Driver for Blackfin On-Chip MAC device
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*
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* Copyright (c) 2005 Analog Device, Inc.
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* Copyright (c) 2005-2008 Analog Device, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <config.h>
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#include <asm/blackfin.h>
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#include <net.h>
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#include <command.h>
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#include <malloc.h>
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#include "ether_bf537.h"
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#include <asm/blackfin.h>
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#include <asm/mach-common/bits/dma.h>
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#include <asm/mach-common/bits/emac.h>
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#include <asm/mach-common/bits/pll.h>
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#include "bfin_mac.h"
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#ifdef CONFIG_POST
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#include <post.h>
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#endif
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@ -41,66 +26,50 @@
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#undef DEBUG_ETHERNET
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#ifdef DEBUG_ETHERNET
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#define DEBUGF(fmt,args...) printf(fmt,##args)
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#define DEBUGF(fmt, args...) printf(fmt, ##args)
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#else
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#define DEBUGF(fmt,args...)
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#define DEBUGF(fmt, args...)
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#endif
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#if defined(CONFIG_CMD_NET)
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#define RXBUF_BASE_ADDR 0xFF900000
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#define TXBUF_BASE_ADDR 0xFF800000
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#define TX_BUF_CNT 1
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#define TOUT_LOOP 1000000
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#define TOUT_LOOP 1000000
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ADI_ETHER_BUFFER *txbuf[TX_BUF_CNT];
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ADI_ETHER_BUFFER *rxbuf[PKTBUFSRX];
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static u16 txIdx; /* index of the current RX buffer */
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static u16 rxIdx; /* index of the current TX buffer */
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u8 SrcAddr[6];
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u16 PHYregs[NO_PHY_REGS]; /* u16 PHYADDR; */
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/* DMAx_CONFIG values at DMA Restart */
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const ADI_DMA_CONFIG_REG rxdmacfg = { 1, 1, 2, 0, 0, 0, 0, 5, 7 };
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const ADI_DMA_CONFIG_REG rxdmacfg = {
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.b_DMA_EN = 1, /* enabled */
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.b_WNR = 1, /* write to memory */
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.b_WDSIZE = 2, /* wordsize is 32 bits */
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.b_DMA2D = 0,
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.b_RESTART = 0,
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.b_DI_SEL = 0,
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.b_DI_EN = 0, /* no interrupt */
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.b_NDSIZE = 5, /* 5 half words is desc size */
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.b_FLOW = 7 /* large desc flow */
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};
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#if 0
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rxdmacfg.b_DMA_EN = 1; /* enabled */
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rxdmacfg.b_WNR = 1; /* write to memory */
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rxdmacfg.b_WDSIZE = 2; /* wordsize is 32 bits */
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rxdmacfg.b_DMA2D = 0; /* N/A */
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rxdmacfg.b_RESTART= 0; /* N/A */
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rxdmacfg.b_DI_SEL = 0; /* N/A */
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rxdmacfg.b_DI_EN = 0; /* no interrupt */
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rxdmacfg.b_NDSIZE = 5; /* 5 half words is desc size. */
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rxdmacfg.b_FLOW = 7; /* large desc flow */
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#endif
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const ADI_DMA_CONFIG_REG txdmacfg = {
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.b_DMA_EN = 1, /* enabled */
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.b_WNR = 0, /* read from memory */
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.b_WDSIZE = 2, /* wordsize is 32 bits */
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.b_DMA2D = 0,
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.b_RESTART = 0,
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.b_DI_SEL = 0,
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.b_DI_EN = 0, /* no interrupt */
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.b_NDSIZE = 5, /* 5 half words is desc size */
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.b_FLOW = 7 /* large desc flow */
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};
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const ADI_DMA_CONFIG_REG txdmacfg = { 1, 0, 2, 0, 0, 0, 0, 5, 7 };
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#if 0
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txdmacfg.b_DMA_EN = 1; /* enabled */
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txdmacfg.b_WNR = 0; /* read from memory */
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txdmacfg.b_WDSIZE = 2; /* wordsize is 32 bits */
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txdmacfg.b_DMA2D = 0; /* N/A */
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txdmacfg.b_RESTART= 0; /* N/A */
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txdmacfg.b_DI_SEL = 0; /* N/A */
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txdmacfg.b_DI_EN = 0; /* no interrupt */
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txdmacfg.b_NDSIZE = 5; /* 5 half words is desc size. */
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txdmacfg.b_FLOW = 7; /* large desc flow */
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#endif
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ADI_ETHER_BUFFER *SetupRxBuffer(int no);
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ADI_ETHER_BUFFER *SetupTxBuffer(int no);
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static int bfin_EMAC_init(struct eth_device *dev, bd_t * bd);
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static void bfin_EMAC_halt(struct eth_device *dev);
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static int bfin_EMAC_send(struct eth_device *dev, volatile void *packet,
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int length);
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static int bfin_EMAC_recv(struct eth_device *dev);
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int bfin_EMAC_initialize(bd_t * bis)
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int bfin_EMAC_initialize(bd_t *bis)
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{
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struct eth_device *dev;
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dev = (struct eth_device *)malloc(sizeof(*dev));
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@ -108,7 +77,7 @@ int bfin_EMAC_initialize(bd_t * bis)
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hang();
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memset(dev, 0, sizeof(*dev));
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sprintf(dev->name, "BF537 ETHERNET");
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sprintf(dev->name, "Blackfin EMAC");
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dev->iobase = 0;
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dev->priv = 0;
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@ -165,7 +134,7 @@ static int bfin_EMAC_send(struct eth_device *dev, volatile void *packet,
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txIdx = 0;
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else
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txIdx++;
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out:
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out:
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DEBUGF("BFIN EMAC send: length = %d\n", length);
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return result;
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}
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@ -212,7 +181,7 @@ static int bfin_EMAC_recv(struct eth_device *dev)
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*
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*************************************************************/
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static int bfin_EMAC_init(struct eth_device *dev, bd_t * bd)
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static int bfin_EMAC_init(struct eth_device *dev, bd_t *bd)
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{
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u32 opmode;
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int dat;
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@ -227,7 +196,7 @@ static int bfin_EMAC_init(struct eth_device *dev, bd_t * bd)
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return -1;
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/* Initialize EMAC address */
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SetupMacAddr(SrcAddr);
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bfin_EMAC_setup_addr(bd);
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/* Initialize TX and RX buffer */
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for (i = 0; i < PKTBUFSRX; i++) {
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@ -289,37 +258,25 @@ static void bfin_EMAC_halt(struct eth_device *dev)
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}
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void SetupMacAddr(u8 * MACaddr)
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void bfin_EMAC_setup_addr(bd_t *bd)
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{
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char *tmp, *end;
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int i;
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/* this depends on a little-endian machine */
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tmp = getenv("ethaddr");
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if (tmp) {
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for (i = 0; i < 6; i++) {
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MACaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
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if (tmp)
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tmp = (*end) ? end + 1 : end;
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}
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#ifndef CONFIG_NETCONSOLE
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printf("Using MAC Address %02X:%02X:%02X:%02X:%02X:%02X\n",
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MACaddr[0], MACaddr[1],
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MACaddr[2], MACaddr[3], MACaddr[4], MACaddr[5]);
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#endif
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*pEMAC_ADDRLO = MACaddr[0] | MACaddr[1] << 8 |
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MACaddr[2] << 16 | MACaddr[3] << 24;
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*pEMAC_ADDRHI = MACaddr[4] | MACaddr[5] << 8;
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}
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*pEMAC_ADDRLO =
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bd->bi_enetaddr[0] |
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bd->bi_enetaddr[1] << 8 |
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bd->bi_enetaddr[2] << 16 |
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bd->bi_enetaddr[3] << 24;
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*pEMAC_ADDRHI =
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bd->bi_enetaddr[4] |
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bd->bi_enetaddr[5] << 8;
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}
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void PollMdcDone(void)
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static void PollMdcDone(void)
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{
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/* poll the STABUSY bit */
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while (*pEMAC_STAADD & STABUSY) ;
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}
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void WrPHYReg(u16 PHYAddr, u16 RegAddr, u16 Data)
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static void WrPHYReg(u16 PHYAddr, u16 RegAddr, u16 Data)
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{
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PollMdcDone();
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@ -332,7 +289,7 @@ void WrPHYReg(u16 PHYAddr, u16 RegAddr, u16 Data)
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/*********************************************************************************
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* Read an off-chip register in a PHY through the MDC/MDIO port *
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*********************************************************************************/
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u16 RdPHYReg(u16 PHYAddr, u16 RegAddr)
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static u16 RdPHYReg(u16 PHYAddr, u16 RegAddr)
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{
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u16 Data;
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@ -350,7 +307,8 @@ u16 RdPHYReg(u16 PHYAddr, u16 RegAddr)
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return Data;
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}
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void SoftResetPHY(void)
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#if 0 /* dead code ? */
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static void SoftResetPHY(void)
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{
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u16 phydat;
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/* set the reset bit */
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@ -362,13 +320,30 @@ void SoftResetPHY(void)
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phydat = RdPHYReg(PHYADDR, PHY_MODECTL);
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} while ((phydat & PHY_RESET) != 0);
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}
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#endif
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int SetupSystemRegs(int *opmode)
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static int SetupSystemRegs(int *opmode)
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{
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u16 sysctl, phydat;
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int count = 0;
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/* Enable PHY output */
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*pVR_CTL |= CLKBUFOE;
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/* Set all the pins to peripheral mode */
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#ifndef CONFIG_BFIN_MAC_RMII
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*pPORTH_FER = 0xFFFF;
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#ifdef __ADSPBF52x__
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*pPORTH_MUX = PORT_x_MUX_0_FUNC_2 | PORT_x_MUX_1_FUNC_2 | PORT_x_MUX_2_FUNC_2;
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#endif
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#else
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#if defined(__ADSPBF536__) || defined(__ADSPBF537__)
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*pPORTH_FER = 0xC373;
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#endif
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#ifdef __ADSPBF52x__
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*pPORTH_FER = 0x01FF;
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*pPORTH_MUX = PORT_x_MUX_0_FUNC_2 | PORT_x_MUX_1_FUNC_2;
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#endif
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#endif
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/* MDC = 2.5 MHz */
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sysctl = SET_MDCDIV(24);
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/* Odd word alignment for Receive Frame DMA word */
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@ -546,4 +521,3 @@ int ether_post_test(int flags)
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return 0;
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}
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#endif
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#endif
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@ -1,3 +1,14 @@
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/*
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* bfin_mac.h - some defines/structures for the Blackfin on-chip MAC.
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*
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* Copyright (c) 2005-2008 Analog Device, Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __BFIN_MAC_H__
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#define __BFIN_MAC_H__
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#define PHYADDR 0x01
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#define NO_PHY_REGS 0x20
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@ -60,12 +71,19 @@ typedef struct adi_ether_buffer {
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} ADI_ETHER_BUFFER;
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/* 40 bytes/struct in 44 bytes */
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void SetupMacAddr(u8 * MACaddr);
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static ADI_ETHER_BUFFER *SetupRxBuffer(int no);
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static ADI_ETHER_BUFFER *SetupTxBuffer(int no);
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void PollMdcDone(void);
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void WrPHYReg(u16 PHYAddr, u16 RegAddr, u16 Data);
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u16 RdPHYReg(u16 PHYAddr, u16 RegAddr);
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void SoftResetPHY(void);
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void DumpPHYRegs(void);
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static int bfin_EMAC_init(struct eth_device *dev, bd_t *bd);
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static void bfin_EMAC_halt(struct eth_device *dev);
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static int bfin_EMAC_send(struct eth_device *dev, volatile void *packet, int length);
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static int bfin_EMAC_recv(struct eth_device *dev);
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int SetupSystemRegs(int *opmode);
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static void PollMdcDone(void);
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static void WrPHYReg(u16 PHYAddr, u16 RegAddr, u16 Data);
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static u16 RdPHYReg(u16 PHYAddr, u16 RegAddr);
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static int SetupSystemRegs(int *opmode);
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static void bfin_EMAC_setup_addr(bd_t *bd);
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#endif
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