ARM: S5P: pwm driver support
This is common pwm driver of S5P. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Donghwa Lee
Albert Aribaud
parent
ecc7cedd5a
commit
3f129280b3
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@ -27,6 +27,7 @@ LIB = $(obj)libs5p-common.o
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COBJS-y += cpu_info.o
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COBJS-y += timer.o
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COBJS-$(CONFIG_PWM) += pwm.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
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@ -0,0 +1,189 @@
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/*
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* Copyright (C) 2011 Samsung Electronics
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*
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* Donghwa Lee <dh09.lee@samsung.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <errno.h>
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#include <pwm.h>
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#include <asm/io.h>
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#include <asm/arch/pwm.h>
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#include <asm/arch/clk.h>
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int pwm_enable(int pwm_id)
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{
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const struct s5p_timer *pwm =
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(struct s5p_timer *)samsung_get_base_timer();
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unsigned long tcon;
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tcon = readl(&pwm->tcon);
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tcon |= TCON_START(pwm_id);
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writel(tcon, &pwm->tcon);
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return 0;
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}
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void pwm_disable(int pwm_id)
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{
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const struct s5p_timer *pwm =
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(struct s5p_timer *)samsung_get_base_timer();
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unsigned long tcon;
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tcon = readl(&pwm->tcon);
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tcon &= ~TCON_START(pwm_id);
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writel(tcon, &pwm->tcon);
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}
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static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
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{
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unsigned long tin_parent_rate;
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unsigned int div;
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tin_parent_rate = get_pwm_clk();
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for (div = 2; div <= 16; div *= 2) {
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if ((tin_parent_rate / (div << 16)) < freq)
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return tin_parent_rate / div;
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}
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return tin_parent_rate / 16;
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}
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#define NS_IN_HZ (1000000000UL)
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int pwm_config(int pwm_id, int duty_ns, int period_ns)
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{
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const struct s5p_timer *pwm =
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(struct s5p_timer *)samsung_get_base_timer();
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unsigned int offset;
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unsigned long tin_rate;
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unsigned long tin_ns;
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unsigned long period;
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unsigned long tcon;
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unsigned long tcnt;
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unsigned long timer_rate_hz;
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unsigned long tcmp;
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/*
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* We currently avoid using 64bit arithmetic by using the
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* fact that anything faster than 1GHz is easily representable
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* by 32bits.
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*/
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if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
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return -ERANGE;
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if (duty_ns > period_ns)
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return -EINVAL;
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period = NS_IN_HZ / period_ns;
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/* Check to see if we are changing the clock rate of the PWM */
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tin_rate = pwm_calc_tin(pwm_id, period);
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timer_rate_hz = tin_rate;
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tin_ns = NS_IN_HZ / tin_rate;
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tcnt = period_ns / tin_ns;
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/* Note, counters count down */
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tcmp = duty_ns / tin_ns;
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tcmp = tcnt - tcmp;
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/*
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* the pwm hw only checks the compare register after a decrement,
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* so the pin never toggles if tcmp = tcnt
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*/
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if (tcmp == tcnt)
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tcmp--;
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if (tcmp < 0)
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tcmp = 0;
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/* Update the PWM register block. */
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offset = pwm_id * 3;
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if (pwm_id < 4) {
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writel(tcnt, &pwm->tcntb0 + offset);
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writel(tcmp, &pwm->tcmpb0 + offset);
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}
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tcon = readl(&pwm->tcon);
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tcon |= TCON_UPDATE(pwm_id);
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if (pwm_id < 4)
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tcon |= TCON_AUTO_RELOAD(pwm_id);
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else
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tcon |= TCON4_AUTO_RELOAD;
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writel(tcon, &pwm->tcon);
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tcon &= ~TCON_UPDATE(pwm_id);
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writel(tcon, &pwm->tcon);
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return 0;
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}
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int pwm_init(int pwm_id, int div, int invert)
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{
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u32 val;
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const struct s5p_timer *pwm =
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(struct s5p_timer *)samsung_get_base_timer();
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unsigned long timer_rate_hz;
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unsigned int offset, prescaler;
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/*
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* Timer Freq(HZ) =
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* PWM_CLK / { (prescaler_value + 1) * (divider_value) }
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*/
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val = readl(&pwm->tcfg0);
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if (pwm_id < 2) {
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prescaler = PRESCALER_0;
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val &= ~0xff;
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val |= (prescaler & 0xff);
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} else {
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prescaler = PRESCALER_1;
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val &= ~(0xff << 8);
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val |= (prescaler & 0xff) << 8;
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}
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writel(val, &pwm->tcfg0);
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val = readl(&pwm->tcfg1);
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val &= ~(0xf << MUX_DIV_SHIFT(pwm_id));
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val |= (div & 0xf) << MUX_DIV_SHIFT(pwm_id);
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writel(val, &pwm->tcfg1);
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timer_rate_hz = get_pwm_clk() / ((prescaler + 1) *
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(div + 1));
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timer_rate_hz = timer_rate_hz / 100;
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/* set count value */
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offset = pwm_id * 3;
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writel(timer_rate_hz, &pwm->tcntb0 + offset);
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val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id));
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if (invert && (pwm_id < 4))
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val |= TCON_INVERTER(pwm_id);
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writel(val, &pwm->tcon);
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pwm_enable(pwm_id);
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return 0;
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}
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@ -22,6 +22,18 @@
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#ifndef __ASM_ARM_ARCH_PWM_H_
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#define __ASM_ARM_ARCH_PWM_H_
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#define PRESCALER_0 (8 - 1) /* prescaler of timer 0, 1 */
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#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */
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/* Divider MUX */
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#define MUX_DIV_1 0 /* 1/1 period */
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#define MUX_DIV_2 1 /* 1/2 period */
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#define MUX_DIV_4 2 /* 1/4 period */
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#define MUX_DIV_8 3 /* 1/8 period */
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#define MUX_DIV_16 4 /* 1/16 period */
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#define MUX_DIV_SHIFT(x) (x * 4)
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/* Interval mode(Auto Reload) of PWM Timer 4 */
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#define TCON4_AUTO_RELOAD (1 << 22)
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/* Update TCNTB4 */
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@ -29,6 +41,13 @@
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/* start bit of PWM Timer 4 */
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#define TCON4_START (1 << 20)
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#define TCON_OFFSET(x) ((x + 1) * (!!x) << 2)
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#define TCON_START(x) (1 << TCON_OFFSET(x))
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#define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1))
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#define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2))
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#define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3))
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#ifndef __ASSEMBLY__
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struct s5p_timer {
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unsigned int tcfg0;
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@ -22,6 +22,18 @@
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#ifndef __ASM_ARM_ARCH_PWM_H_
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#define __ASM_ARM_ARCH_PWM_H_
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#define PRESCALER_0 (8 - 1) /* prescaler of timer 0, 1 */
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#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */
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/* Divider MUX */
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#define MUX_DIV_1 0 /* 1/1 period */
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#define MUX_DIV_2 1 /* 1/2 period */
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#define MUX_DIV_4 2 /* 1/4 period */
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#define MUX_DIV_8 3 /* 1/8 period */
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#define MUX_DIV_16 4 /* 1/16 period */
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#define MUX_DIV_SHIFT(x) (x * 4)
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/* Interval mode(Auto Reload) of PWM Timer 4 */
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#define TCON4_AUTO_RELOAD (1 << 22)
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/* Update TCNTB4 */
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@ -29,6 +41,13 @@
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/* start bit of PWM Timer 4 */
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#define TCON4_START (1 << 20)
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#define TCON_OFFSET(x) ((x + 1) * (!!x) << 2)
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#define TCON_START(x) (1 << TCON_OFFSET(x))
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#define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1))
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#define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2))
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#define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3))
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#ifndef __ASSEMBLY__
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struct s5p_timer {
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unsigned int tcfg0;
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@ -0,0 +1,31 @@
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/*
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* header file for pwm driver.
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*
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* Copyright (c) 2011 samsung electronics
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* Donghwa Lee <dh09.lee@samsung.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _pwm_h_
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#define _pwm_h_
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int pwm_init (int pwm_id, int div, int invert);
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int pwm_config (int pwm_id, int duty_ns, int period_ns);
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int pwm_enable (int pwm_id);
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void pwm_disable (int pwm_id);
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#endif /* _pwm_h_ */
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