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usb: s3c-otg: Allow custom gusbcfg 

Allow passing in a custom configuration of the gusbcfg register
via platform data.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
This commit is contained in:
Marek Vasut 2014-11-04 04:23:25 +01:00
parent d1b6c77e1f
commit 481a11c552
3 changed files with 14 additions and 7 deletions
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18
drivers/usb/gadget/s3c_udc_otg.c
View File

@ -104,7 +104,7 @@ static void stop_activity(struct s3c_udc *dev,
struct usb_gadget_driver *driver);
static int udc_enable(struct s3c_udc *dev);
static void udc_set_address(struct s3c_udc *dev, unsigned char address);
static void reconfig_usbd(void);
static void reconfig_usbd(struct s3c_udc *dev);
static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed);
static void nuke(struct s3c_ep *ep, int status);
static int s3c_udc_set_halt(struct usb_ep *_ep, int value);
@ -215,7 +215,7 @@ static int udc_enable(struct s3c_udc *dev)
debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
otg_phy_init(dev);
reconfig_usbd();
reconfig_usbd(dev);
debug_cond(DEBUG_SETUP != 0,
"S3C USB 2.0 OTG Controller Core Initialized : 0x%x\n",
@ -396,15 +396,17 @@ static void stop_activity(struct s3c_udc *dev,
udc_reinit(dev);
}
static void reconfig_usbd(void)
static void reconfig_usbd(struct s3c_udc *dev)
{
/* 2. Soft-reset OTG Core and then unreset again. */
int i;
unsigned int uTemp = writel(CORE_SOFT_RESET, &reg->grstctl);
uint32_t dflt_gusbcfg;
debug("Reseting OTG controller\n");
writel(0<<15 /* PHY Low Power Clock sel*/
dflt_gusbcfg =
0<<15 /* PHY Low Power Clock sel*/
|1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
|0x5<<10 /* Turnaround time*/
|0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
@ -413,8 +415,12 @@ static void reconfig_usbd(void)
|0<<6 /* 0: high speed utmi+, 1: full speed serial*/
|0<<4 /* 0: utmi+, 1:ulpi*/
|1<<3 /* phy i/f 0:8bit, 1:16bit*/
|0x7<<0, /* HS/FS Timeout**/
&reg->gusbcfg);
|0x7<<0; /* HS/FS Timeout**/
if (dev->pdata->usb_gusbcfg)
dflt_gusbcfg = dev->pdata->usb_gusbcfg;
writel(dflt_gusbcfg, &reg->gusbcfg);
/* 3. Put the OTG device core in the disconnected state.*/
uTemp = readl(&reg->dctl);

2
drivers/usb/gadget/s3c_udc_otg_xfer_dma.c
View File

@ -551,7 +551,7 @@ static int s3c_udc_irq(int irq, void *_dev)
debug_cond(DEBUG_ISR,
"\t\tOTG core got reset (%d)!!\n",
reset_available);
reconfig_usbd();
reconfig_usbd(dev);
dev->ep0state = WAIT_FOR_SETUP;
reset_available = 0;
s3c_udc_pre_setup();

1
include/usb/s3c_udc.h
View File

@ -108,5 +108,6 @@ struct s3c_plat_otg_data {
unsigned int regs_otg;
unsigned int usb_phy_ctrl;
unsigned int usb_flags;
unsigned int usb_gusbcfg;
};
#endif