ARM: cmd_clock: generalize command usage description

The usage description of commands refers to headers of sources,
that is not correct. This patch is intended to fix it.
Also generalize code in order to reduce SoC dependent #ifdefs.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
This commit is contained in:
Khoronzhuk, Ivan 2014-10-22 16:01:28 +03:00 committed by Tom Rini
parent bc0e8d7c5d
commit 529ce1eedf
4 changed files with 61 additions and 61 deletions

View File

@ -58,20 +58,11 @@ pll_cmd_usage:
return cmd_usage(cmdtp);
}
#ifdef CONFIG_SOC_K2HK
U_BOOT_CMD(
pllset, 5, 0, do_pll_cmd,
"set pll multiplier and pre divider",
"<pa|arm|ddr3a|ddr3b> <mult> <div> <OD>\n"
);
#endif
#ifdef CONFIG_SOC_K2E
U_BOOT_CMD(
pllset, 5, 0, do_pll_cmd,
"set pll multiplier and pre divider",
"<pa|ddr3> <mult> <div> <OD>\n"
PLLSET_CMD_LIST " <mult> <div> <OD>\n"
);
#endif
int do_getclk_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
@ -95,12 +86,8 @@ U_BOOT_CMD(
getclk, 2, 0, do_getclk_cmd,
"get clock rate",
"<clk index>\n"
#ifdef CONFIG_SOC_K2HK
"See the 'enum clk_e' in the clock-k2hk.h for clk indexes\n"
#endif
#ifdef CONFIG_SOC_K2E
"See the 'enum clk_e' in the clock-k2e.h for clk indexes\n"
#endif
"The indexes for clocks:\n"
CLOCK_INDEXES_LIST
);
int do_psc_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@ -141,5 +128,8 @@ U_BOOT_CMD(
psc, 3, 0, do_psc_cmd,
"<enable/disable psc module os disable domain>",
"<mod/domain index> <en|di|domain>\n"
"See the hardware.h for Power and Sleep Controller (PSC) Domains\n"
"Intended to control Power and Sleep Controller (PSC) domains and\n"
"modules. The module or domain index exectly corresponds to ones\n"
"listed in official TRM. For instance, to enable MSMC RAM clock\n"
"domain use command: psc 14 en.\n"
);

View File

@ -25,27 +25,28 @@ enum ext_clk_e {
extern unsigned int external_clk[ext_clk_count];
enum clk_e {
core_pll_clk,
pass_pll_clk,
ddr3_pll_clk,
sys_clk0_clk,
sys_clk0_1_clk,
sys_clk0_2_clk,
sys_clk0_3_clk,
sys_clk0_4_clk,
sys_clk0_6_clk,
sys_clk0_8_clk,
sys_clk0_12_clk,
sys_clk0_24_clk,
sys_clk1_clk,
sys_clk1_3_clk,
sys_clk1_4_clk,
sys_clk1_6_clk,
sys_clk1_12_clk,
sys_clk2_clk,
sys_clk3_clk
};
#define CLK_LIST(CLK)\
CLK(0, core_pll_clk)\
CLK(1, pass_pll_clk)\
CLK(2, ddr3_pll_clk)\
CLK(3, sys_clk0_clk)\
CLK(4, sys_clk0_1_clk)\
CLK(5, sys_clk0_2_clk)\
CLK(6, sys_clk0_3_clk)\
CLK(7, sys_clk0_4_clk)\
CLK(8, sys_clk0_6_clk)\
CLK(9, sys_clk0_8_clk)\
CLK(10, sys_clk0_12_clk)\
CLK(11, sys_clk0_24_clk)\
CLK(12, sys_clk1_clk)\
CLK(13, sys_clk1_3_clk)\
CLK(14, sys_clk1_4_clk)\
CLK(15, sys_clk1_6_clk)\
CLK(16, sys_clk1_12_clk)\
CLK(17, sys_clk2_clk)\
CLK(18, sys_clk3_clk)
#define PLLSET_CMD_LIST "<pa|ddr3>"
#define KS2_CLK1_6 sys_clk0_6_clk

View File

@ -28,29 +28,30 @@ enum ext_clk_e {
extern unsigned int external_clk[ext_clk_count];
enum clk_e {
core_pll_clk,
pass_pll_clk,
tetris_pll_clk,
ddr3a_pll_clk,
ddr3b_pll_clk,
sys_clk0_clk,
sys_clk0_1_clk,
sys_clk0_2_clk,
sys_clk0_3_clk,
sys_clk0_4_clk,
sys_clk0_6_clk,
sys_clk0_8_clk,
sys_clk0_12_clk,
sys_clk0_24_clk,
sys_clk1_clk,
sys_clk1_3_clk,
sys_clk1_4_clk,
sys_clk1_6_clk,
sys_clk1_12_clk,
sys_clk2_clk,
sys_clk3_clk
};
#define CLK_LIST(CLK)\
CLK(0, core_pll_clk)\
CLK(1, pass_pll_clk)\
CLK(2, tetris_pll_clk)\
CLK(3, ddr3a_pll_clk)\
CLK(4, ddr3b_pll_clk)\
CLK(5, sys_clk0_clk)\
CLK(6, sys_clk0_1_clk)\
CLK(7, sys_clk0_2_clk)\
CLK(8, sys_clk0_3_clk)\
CLK(9, sys_clk0_4_clk)\
CLK(10, sys_clk0_6_clk)\
CLK(11, sys_clk0_8_clk)\
CLK(12, sys_clk0_12_clk)\
CLK(13, sys_clk0_24_clk)\
CLK(14, sys_clk1_clk)\
CLK(15, sys_clk1_3_clk)\
CLK(16, sys_clk1_4_clk)\
CLK(17, sys_clk1_6_clk)\
CLK(18, sys_clk1_12_clk)\
CLK(19, sys_clk2_clk)\
CLK(20, sys_clk3_clk)
#define PLLSET_CMD_LIST "<pa|arm|ddr3a|ddr3b>"
#define KS2_CLK1_6 sys_clk0_6_clk

View File

@ -24,6 +24,14 @@
#include <asm/types.h>
#define GENERATE_ENUM(NUM, ENUM) ENUM = NUM,
#define GENERATE_INDX_STR(NUM, STRING) #NUM"\t- "#STRING"\n"
#define CLOCK_INDEXES_LIST CLK_LIST(GENERATE_INDX_STR)
enum clk_e {
CLK_LIST(GENERATE_ENUM)
};
struct keystone_pll_regs {
u32 reg0;
u32 reg1;