arm: socfpga: Enabling MTD default partitions
Enabling MTD default partitions if its not defined in board configuration file. The layout as below device nor0 <ff705000.spi.0>, # parts = 6 #: name size offset mask_flags 0: u-boot 0x00100000 0x00000000 0 1: env1 0x00040000 0x00100000 0 2: env2 0x00040000 0x00140000 0 3: UBI 0x03e80000 0x00180000 0 4: boot 0x00e80000 0x00180000 0 5: rootfs 0x01000000 0x01000000 0 Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
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@ -196,7 +196,7 @@ unsigned int cm_get_l4_sp_clk_hz(void);
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_MTD_PARTITIONS
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#define MTDIDS_DEFAULT "nor0=ff705000.spi"
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#define MTDIDS_DEFAULT "nor0=ff705000.spi.0"
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#endif
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#endif
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/* QSPI reference clock */
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/* QSPI reference clock */
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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@ -276,6 +276,29 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
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#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
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#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
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#endif
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#endif
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/*
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* mtd partitioning for serial NOR flash
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*
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* device nor0 <ff705000.spi.0>, # parts = 6
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* #: name size offset mask_flags
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* 0: u-boot 0x00100000 0x00000000 0
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* 1: env1 0x00040000 0x00100000 0
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* 2: env2 0x00040000 0x00140000 0
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* 3: UBI 0x03e80000 0x00180000 0
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* 4: boot 0x00e80000 0x00180000 0
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* 5: rootfs 0x01000000 0x01000000 0
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*
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*/
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#if defined(CONFIG_CMD_SF) && !defined(MTDPARTS_DEFAULT)
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#define MTDPARTS_DEFAULT "mtdparts=ff705000.spi.0:"\
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"1m(u-boot)," \
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"256k(env1)," \
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"256k(env2)," \
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"14848k(boot)," \
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"16m(rootfs)," \
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"-@1536k(UBI)\0"
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#endif
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/*
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/*
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* SPL
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* SPL
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*
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*
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