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arm: mvebu: Disable L2 cache before enabling d-cache 

L2 cache may still be enabled by the BootROM. We need to first disable
it before enabling d-cache support.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
This commit is contained in:
Stefan Roese 2015-05-18 16:09:43 +00:00 committed by Luka Perkov
parent a0aad12346
commit 5730360efc
1 changed files with 8 additions and 0 deletions
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8
arch/arm/mach-mvebu/cpu.c
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@ -7,6 +7,7 @@
#include <common.h>
#include <netdev.h>
#include <asm/io.h>
#include <asm/pl310.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
@ -240,6 +241,13 @@ int cpu_eth_init(bd_t *bis)
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
{
struct pl310_regs *const pl310 =
(struct pl310_regs *)CONFIG_SYS_PL310_BASE;
/* First disable L2 cache - may still be enable from BootROM */
if (mvebu_soc_family() == MVEBU_SOC_A38X)
clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
/* Avoid problem with e.g. neta ethernet driver */
invalidate_dcache_all();